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From: Harry Sung1 <hsung1@lenovo.com>
To: Patrick Venture <venture@google.com>, Oskar Senft <osk@google.com>
Cc: Andrew MS1 Peng <pengms1@lenovo.com>,
	"openbmc@lists.ozlabs.org" <openbmc@lists.ozlabs.org>
Subject: phosphor-ipmi-flash: Update over eSPI interface
Date: Wed, 11 Sep 2019 08:59:00 +0000	[thread overview]
Message-ID: <2634903dafda431988ffabd873710768@lenovo.com> (raw)


> On Mon, Sep 9, 2019 at 7:01 AM Oskar Senft <osk@google.com> wrote:
> >
> > Hi Harry
> >
> > What's the behavior on eSPI? I assume you still have the aspeed-lpc-ctrl
> enabled, right?
> >
> > Thanks
> > Oskar.

Hi Oskar, 
Yes, I still enabled the aspeed-lpc-ctrl in my build. Because phosphor-ipmi-flash has some mandatory actions on /dev/aspeed-lpc-ctrl before flash (settings for HICR5, HICR7 and HICR8) even though these settings are meaningless for eSPI.

Currently, I set ESPI084 (source address) and ESPI088 (target address) registers manually because linux seems not have a driver can help us to set ESPI084 and ESPI088.

Due to the limitation of AST2500, we can only write 256 bytes in one write operation (write shared memory).
Based on the test result, it takes about 30 mins to transfer a 32MB image over eSPI.

Thanks,
Harry
> >
> > On Mon, Sep 9, 2019 at 4:41 AM Harry Sung1 <hsung1@lenovo.com> wrote:
> >>
> >> Hi Patrick,
> >>
> >>
> >>
> >> I found “phosphor-ipmi-flash” have not support flash over eSPI yet.
> >>
> >> May I ask if you have any plans to support flash over eSPI?
> >>
> >>
> >>
> >> I have done a simple test about shared memory between host and BMC :
> >>
> >> The shared memory is work after I set ESPI084 (source address) and ESPI088
> (target address) registers.
> >>
> >> But it has an limitation that only 256 bytes are available on each page (4KB).
> >>
> >>
> >> For example, if host address starts to write from 0xFE0B0000 (BMC
> >> reserved enough memory already)
> >>
> >> Writable area are:
> >>
> >> 0xFE0B0000 ~ 0xFE0B00FF
> >>
> >> 0xFE0B1000 ~ 0xFE0B10FF
> >>
> >> 0xFE0B2000 ~ 0xFE0B20FF
> >>
> >> 0xFE0B3000 ~ 0xFE0B30FF
> >>
> >> …
> >>
> >> …
> >>
> >> …
> >>
> >>
> >>
> >>
> >>
> >> Thanks,
> >> Harry
> 
> Harry, currently there's no plan to implement it as I have no method of testing
> it,  However, it should prove fairly straightforward to add another option to
> the transport mechanism list.  Please let me know if you run into any
> blockers.

Hi Patrick,
Got it. The better way to set eSPI register is setting them by the driver, right?
For quick validation, I am going to use the " ipmilpc" interface and set necessary eSPI registers manually. 

Thanks,
Harry

             reply	other threads:[~2019-09-11  8:59 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-11  8:59 Harry Sung1 [this message]
2019-09-11 14:45 ` phosphor-ipmi-flash: Update over eSPI interface Patrick Venture
2019-09-11 15:23   ` Oskar Senft
2019-09-12 16:36     ` Oskar Senft
  -- strict thread matches above, loose matches on Subject: below --
2019-09-09  8:40 Harry Sung1
2019-09-09 14:01 ` Oskar Senft
2019-09-09 16:53   ` Patrick Venture

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