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From: BALATON Zoltan <balaton@eik.bme.hu>
To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: clg@kaod.org, Daniel Henrique Barboza <danielhb413@gmail.com>,
	Peter Maydell <peter.maydell@linaro.org>
Subject: [PATCH 17/20] ppc4xx_sdram: Use hwaddr for memory bank size
Date: Fri, 19 Aug 2022 18:55:56 +0200 (CEST)	[thread overview]
Message-ID: <26a79f2074b7a5543be4d3a77ad190b9d16b4612.1660926381.git.balaton@eik.bme.hu> (raw)
In-Reply-To: <cover.1660926381.git.balaton@eik.bme.hu>

This resolves the target_ulong dependency that's clearly wrong and was
also noted in a fixme comment.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
 hw/ppc/ppc4xx_sdram.c | 14 ++++----------
 1 file changed, 4 insertions(+), 10 deletions(-)

diff --git a/hw/ppc/ppc4xx_sdram.c b/hw/ppc/ppc4xx_sdram.c
index 8683207179..69b670737f 100644
--- a/hw/ppc/ppc4xx_sdram.c
+++ b/hw/ppc/ppc4xx_sdram.c
@@ -34,7 +34,6 @@
 #include "qapi/error.h"
 #include "qemu/log.h"
 #include "exec/address-spaces.h" /* get_system_memory() */
-#include "exec/cpu-defs.h" /* target_ulong */
 #include "hw/irq.h"
 #include "hw/qdev-properties.h"
 #include "qapi/error.h"
@@ -122,11 +121,6 @@ static void sdram_bank_unmap(Ppc4xxSdramBank *bank)
 
 /*****************************************************************************/
 /* DDR SDRAM controller */
-/*
- * XXX: TOFIX: some patches have made this code become inconsistent:
- *      there are type inconsistencies, mixing hwaddr, target_ulong
- *      and uint32_t
- */
 static uint32_t sdram_ddr_bcr(hwaddr ram_base, hwaddr ram_size)
 {
     uint32_t bcr;
@@ -170,9 +164,9 @@ static inline hwaddr sdram_ddr_base(uint32_t bcr)
     return bcr & 0xFF800000;
 }
 
-static target_ulong sdram_ddr_size(uint32_t bcr)
+static hwaddr sdram_ddr_size(uint32_t bcr)
 {
-    target_ulong size;
+    hwaddr size;
     int sh;
 
     sh = (bcr >> 17) & 0x7;
@@ -513,9 +507,9 @@ static inline hwaddr sdram_ddr2_base(uint32_t bcr)
     return (bcr & 0xffe00000) << 2;
 }
 
-static uint64_t sdram_ddr2_size(uint32_t bcr)
+static hwaddr sdram_ddr2_size(uint32_t bcr)
 {
-    uint64_t size;
+    hwaddr size;
     int sh;
 
     sh = 1024 - ((bcr >> 6) & 0x3ff);
-- 
2.30.4



  parent reply	other threads:[~2022-08-19 17:32 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-19 16:55 [PATCH 00/20] ppc4xx_sdram QOMify and clean ups BALATON Zoltan
2022-08-19 16:55 ` [PATCH 01/20] ppc440_bamboo: Remove unnecessary memsets BALATON Zoltan
2022-08-19 16:55 ` [PATCH 02/20] ppc4xx: Introduce Ppc4xxSdramBank struct BALATON Zoltan
2022-09-04 11:44   ` Philippe Mathieu-Daudé via
2022-08-19 16:55 ` [PATCH 03/20] ppc4xx_sdram: Get rid of the init RAM hack BALATON Zoltan
2022-09-02 10:46   ` Cédric Le Goater
2022-09-02 15:48     ` BALATON Zoltan
2022-08-19 16:55 ` [PATCH 04/20] ppc4xx: Use Ppc4xxSdramBank in ppc4xx_sdram_banks() BALATON Zoltan
2022-09-02 10:49   ` Cédric Le Goater
2022-09-02 18:54     ` BALATON Zoltan
2022-09-09 19:32       ` BALATON Zoltan
2022-08-19 16:55 ` [PATCH 05/20] ppc440_bamboo: Add missing 4 MiB valid memory size BALATON Zoltan
2022-09-07 13:17   ` Cédric Le Goater
2022-08-19 16:55 ` [PATCH 06/20] ppc4xx_sdram: Move size check to ppc4xx_sdram_init() BALATON Zoltan
2022-09-07 13:24   ` Cédric Le Goater
2022-09-07 14:53     ` BALATON Zoltan
2022-08-19 16:55 ` [PATCH 07/20] ppc4xx_sdram: QOM'ify BALATON Zoltan
2022-09-07 13:29   ` Cédric Le Goater
2022-08-19 16:55 ` [PATCH 08/20] ppc4xx_sdram: Drop extra zeros for readability BALATON Zoltan
2022-09-07 13:30   ` Cédric Le Goater
2022-09-07 14:32     ` BALATON Zoltan
2022-08-19 16:55 ` [PATCH 09/20] ppc440_sdram: Split off map/unmap of sdram banks for later reuse BALATON Zoltan
2022-09-07 13:34   ` Cédric Le Goater
2022-09-07 14:34     ` BALATON Zoltan
2022-08-19 16:55 ` [PATCH 10/20] ppc440_sdram: Implement enable bit in the DDR2 SDRAM controller BALATON Zoltan
2022-09-04 11:53   ` Philippe Mathieu-Daudé via
2022-09-04 11:59     ` BALATON Zoltan
2022-09-07 13:38   ` Cédric Le Goater
2022-09-07 14:37     ` BALATON Zoltan
2022-08-19 16:55 ` [PATCH 11/20] ppc440_sdram: Get rid of the init RAM hack BALATON Zoltan
2022-08-19 16:55 ` [PATCH 12/20] ppc440_sdram: Rename local variable for readibility BALATON Zoltan
2022-09-07 13:46   ` Cédric Le Goater
2022-08-19 16:55 ` [PATCH 13/20] ppc4xx_sdram: Rename functions to prevent name clashes BALATON Zoltan
2022-09-07 13:47   ` Cédric Le Goater
2022-09-07 14:38     ` BALATON Zoltan
2022-08-19 16:55 ` [PATCH 14/20] ppc440_sdram: Move RAM size check to ppc440_sdram_init BALATON Zoltan
2022-09-07 13:51   ` Cédric Le Goater
2022-09-07 14:41     ` BALATON Zoltan
2022-08-19 16:55 ` [PATCH 15/20] ppc440_sdram: QOM'ify BALATON Zoltan
2022-09-07 13:52   ` Cédric Le Goater
2022-08-19 16:55 ` [PATCH 16/20] ppc4xx_sdram: Move ppc4xx DDR and DDR2 SDRAM controller models together BALATON Zoltan
2022-08-19 16:55 ` BALATON Zoltan [this message]
2022-09-04 11:57   ` [PATCH 17/20] ppc4xx_sdram: Use hwaddr for memory bank size Philippe Mathieu-Daudé via
2022-08-19 16:55 ` [PATCH 18/20] ppc4xx_sdram: Rename local state variable for brevity BALATON Zoltan
2022-08-19 16:55 ` [PATCH 19/20] ppc4xx_sdram: Generalise bank setup BALATON Zoltan
2022-08-19 16:55 ` [PATCH 20/20] ppc4xx_sdram: Convert DDR SDRAM controller to new bank handling BALATON Zoltan
2022-09-01 21:02 ` [PATCH 00/20] ppc4xx_sdram QOMify and clean ups BALATON Zoltan
2022-09-02  8:35   ` Cédric Le Goater
2022-09-02  8:41     ` Cédric Le Goater
2022-09-02 10:29       ` BALATON Zoltan

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