From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Bin Meng <bmeng.cn@gmail.com>,
Peter Maydell <peter.maydell@linaro.org>,
Jean-Christophe Dubois <jcd@tribudubois.net>,
Alistair Francis <alistair.francis@wdc.com>,
qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: Bin Meng <bin.meng@windriver.com>
Subject: Re: [PATCH v9 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value
Date: Fri, 29 Jan 2021 15:00:28 +0100 [thread overview]
Message-ID: <26c7af92-ae7f-a522-b27c-854575a5b078@amsat.org> (raw)
In-Reply-To: <20210129132323.30946-5-bmeng.cn@gmail.com>
On 1/29/21 2:23 PM, Bin Meng wrote:
> From: Philippe Mathieu-Daudé <f4bug@amsat.org>
>
> When the block is disabled, all registers are reset with the
> exception of the ECSPI_CONREG. It is initialized to zero
> when the instance is created.
>
> Ref: i.MX 6DQ Applications Processor Reference Manual (IMX6DQRM),
> chapter 21.7.3: Control Register (ECSPIx_CONREG)
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> [bmeng: add a 'common_reset' function that does most of reset operation]
> Signed-off-by: Bin Meng <bin.meng@windriver.com>
>
> ---
>
> Changes in v9:
> - Add a 'common_reset' function that does most of reset operation,
> leaving ECSPI_CONREG clear in imx_spi_reset().
>
> Changes in v7:
> - remove the RFC tag
>
> Changes in v6:
> - new patch: [RFC] rework imx_spi_reset() to keep CONREG register value
>
> hw/ssi/imx_spi.c | 32 ++++++++++++++++++++++++--------
> 1 file changed, 24 insertions(+), 8 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
next prev parent reply other threads:[~2021-01-29 14:02 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-29 13:23 [PATCH v9 00/10] hw/ssi: imx_spi: Fix various bugs in the imx_spi model Bin Meng
2021-01-29 13:23 ` [PATCH v9 01/10] hw/ssi: imx_spi: Use a macro for number of chip selects supported Bin Meng
2021-01-29 13:23 ` [PATCH v9 02/10] hw/ssi: imx_spi: Remove imx_spi_update_irq() in imx_spi_reset() Bin Meng
2021-01-29 13:23 ` [PATCH v9 03/10] hw/ssi: imx_spi: Remove pointless variable initialization Bin Meng
2021-01-29 13:23 ` [PATCH v9 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value Bin Meng
2021-01-29 14:00 ` Philippe Mathieu-Daudé [this message]
2021-01-29 13:23 ` [PATCH v9 05/10] hw/ssi: imx_spi: Rework imx_spi_read() to handle block disabled Bin Meng
2021-01-29 13:23 ` [PATCH v9 06/10] hw/ssi: imx_spi: Rework imx_spi_write() " Bin Meng
2021-01-29 13:23 ` [PATCH v9 07/10] hw/ssi: imx_spi: Disable chip selects when controller is disabled Bin Meng
2021-01-29 13:23 ` [PATCH v9 08/10] hw/ssi: imx_spi: Round up the burst length to be multiple of 8 Bin Meng
2021-01-29 13:23 ` [PATCH v9 09/10] hw/ssi: imx_spi: Correct the burst length > 32 bit transfer logic Bin Meng
2021-01-29 13:23 ` [PATCH v9 10/10] hw/ssi: imx_spi: Correct tx and rx fifo endianness Bin Meng
2021-02-02 11:39 ` [PATCH v9 00/10] hw/ssi: imx_spi: Fix various bugs in the imx_spi model Peter Maydell
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