From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6F847C433EF for ; Fri, 21 Jan 2022 14:01:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1380836AbiAUOBy (ORCPT ); Fri, 21 Jan 2022 09:01:54 -0500 Received: from alexa-out.qualcomm.com ([129.46.98.28]:44320 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350404AbiAUOBy (ORCPT ); Fri, 21 Jan 2022 09:01:54 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1642773714; x=1674309714; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=5IqRLRAOCUN5N8x7XtvNl4hgMj0+RLgbF9Z13Lxi2w4=; b=CLblmgaKeS6G8cIhMD0YZsLA3EPs+9JeSURWtSojeL/Brwm1mLI4amY5 sgnOuVR8n310Z5IEzrOh0AOoqhJW0lg3lBqgCdloWx+IXX60xR3fDECiE /jA2/wEuRkg4JY7xyATk72n0UY+8VufA5li0tSbFxTGWiRfo9OxrQ468+ 4=; Received: from ironmsg08-lv.qualcomm.com ([10.47.202.152]) by alexa-out.qualcomm.com with ESMTP; 21 Jan 2022 06:01:54 -0800 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg08-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jan 2022 06:01:54 -0800 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.19; Fri, 21 Jan 2022 06:01:53 -0800 Received: from [10.253.75.234] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.19; Fri, 21 Jan 2022 06:01:50 -0800 Message-ID: <2703bf83-3a87-e69f-2392-7e0568e91712@quicinc.com> Date: Fri, 21 Jan 2022 22:01:47 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.3.0 Subject: Re: [PATCH v2 2/9] Coresight: Add coresight TPDM source driver Content-Language: en-US To: Mathieu Poirier , Mike Leach CC: Suzuki K Poulose , Alexander Shishkin , Leo Yan , "Greg Kroah-Hartman" , , , , Tingwei Zhang , Yuanfang Zhang , Tao Zhang , Trilok Soni , References: <20211209141543.21314-1-quic_jinlmao@quicinc.com> <20211209141543.21314-3-quic_jinlmao@quicinc.com> <20211214185714.GB1549991@p14s> <85ad17fb-c885-831d-d841-4c6f10920355@quicinc.com> <20211216190223.GA78825@p14s> From: Jinlong Mao In-Reply-To: <20211216190223.GA78825@p14s> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Hi Mathieu, Good Day. On 12/17/2021 3:02 AM, Mathieu Poirier wrote: > [...] > >>>>> + >>>>> +static void tpdm_init_default_data(struct tpdm_drvdata *drvdata) >>>>> +{ >>>>> + static int traceid = TPDM_TRACE_ID_START; >>>>> + >>>>> + drvdata->traceid = traceid++; >>>>> +} >>>> I have been specific on how to properly do this in the last revision. Given the >>>> above about the MAINTAINERS file, I am not sure that I will continue reviewing this set. >>>> >>>> There is also no need to rush another revision as I won't have the bandwidth to >>>> process it before the holidays. >>>> >>>> Thanks, >>>> Mathieu >>> Hi Mathieu, >>> >>> Sorry, not addressed your previous comments here. >>> >>> For the trace id, each coresight component has 7 bits to store the trace >>> id. So the trace id should be from 1 to 127 as 0 is invalid. >> IDs 0x70 - 0x7F (`112 - 127 ) are reserved - see the ARM Coresight >> Architecture specification v3.0 >> > Correct > >>> Apart from TPDMs/STM/ETMs, we also have other coresight components in >>> our internal device. About 80 ids are already used. >>> >>> Some components have fixed trace id in HW. If we use functions below to >>> count the trace id, there will be conflict to other components. >>> >>> Can we use 1-15 for etm trace ids and 16 - 127 for other coresight >>> components ? And handle trace ids in its' own driver ? >>> >> This will limit systems to 15 cores - some have more! >> > Correct > >>> static inline int coresight_get_system_trace_id(int id) >>> { >>> /* Start system IDs above the highest per CPU trace ID. */ >>> return coresigth_get_trace_id(cpumask_last(cpu_possible_mask) + 1); >>> } > Looking at my own suggestion again this won't work since it returns the same traceID > when called multiple times. > > For this patchset and _without_ taking into account internal devices that have > their traceID set in HW: > > 1. Define a bitmask that is 7 bit wide. Should it be a 128 bit wide bitmask  (0--127)? > 2. By default, set bits under 0x10 and between 0x70 - 0x7F. > 3. In coresight_get_system_trace_id(), drop the @id parameter and allocate the > first available bit after cpumask_last(cpu_possible_mask) + 1. Should it allocate the first available bit after (cpumask_last(cpu_possible_mask) *2 ) + 0x10 ? Return the first zero bit position as the trace id and set the bit. > 4. Define a new function called coresight_put_system_trace_id(int id) that > clears the bit in the mask corresponding to @id. > > For now that should work. > >>> static inline int coresight_get_trace_id(int cpu) >>> { >>> /* >>> * A trace ID of value 0 is invalid, so let's start at some >>> * random value that fits in 7 bits and go from there. Since >>> * the common convention is to have data trace IDs be I(N) + 1, >>> * set instruction trace IDs as a function of the CPU number. >>> */ >>> return (CORESIGHT_ETM_PMU_SEED + (cpu * 2)); >>> } >>> >> This fixed relationship between cpu and trace ID is used in the perf >> tooling to populate the elements in the perf.data file to correctly >> allow association between CPU and trace data, and thus allow correct >> trace decode. > TraceIDs associated to CPUs are communicated to the perf tooling by way of the > perf header - theoretically we should be able to change the allocation scheme > without impacting the decoding process. > >> It should be possible to create another more dynamic mapping scheme - >> but this must include a way to support the perf requirements too. >> > TraceIDs have been a lurking problem for as long as the subsystem has existed. > For now what I have suggested above should be sufficient to provide an > in-between solution that doesn't hold back this patchset. > > That being said, we need to start thinking about the best way to do this. I > will put a patchset together in the new year that aims in that direction. > >> Regards >> >> Mike >> >>> Thanks >>> >>> Jinlong Mao >>> >>>>> + >>>>> +static int tpdm_probe(struct amba_device *adev, const struct amba_id *id) >>>>> +{ >>>>> + struct device *dev = &adev->dev; >>>>> + struct coresight_platform_data *pdata; >>>>> + struct tpdm_drvdata *drvdata; >>>>> + struct coresight_desc desc = { 0 }; >>>>> + >>>>> + desc.name = coresight_alloc_device_name(&tpdm_devs, dev); >>>>> + if (!desc.name) >>>>> + return -ENOMEM; >>>>> + pdata = coresight_get_platform_data(dev); >>>>> + if (IS_ERR(pdata)) >>>>> + return PTR_ERR(pdata); >>>>> + adev->dev.platform_data = pdata; >>>>> + >>>>> + drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); >>>>> + if (!drvdata) >>>>> + return -ENOMEM; >>>>> + drvdata->dev = &adev->dev; >>>>> + dev_set_drvdata(dev, drvdata); >>>>> + >>>>> + drvdata->base = devm_ioremap_resource(dev, &adev->res); >>>>> + if (!drvdata->base) >>>>> + return -ENOMEM; >>>>> + >>>>> + mutex_init(&drvdata->lock); >>>>> + >>>>> + desc.type = CORESIGHT_DEV_TYPE_SOURCE; >>>>> + desc.subtype.source_subtype = CORESIGHT_DEV_SUBTYPE_SOURCE_SYS; >>>>> + desc.ops = &tpdm_cs_ops; >>>>> + desc.pdata = adev->dev.platform_data; >>>>> + desc.dev = &adev->dev; >>>>> + drvdata->csdev = coresight_register(&desc); >>>>> + if (IS_ERR(drvdata->csdev)) >>>>> + return PTR_ERR(drvdata->csdev); >>>>> + >>>>> + tpdm_init_default_data(drvdata); >>>>> + pm_runtime_put(&adev->dev); >>>>> + >>>>> + return 0; >>>>> +} >>>>> + >>>>> +static void __exit tpdm_remove(struct amba_device *adev) >>>>> +{ >>>>> + struct tpdm_drvdata *drvdata = dev_get_drvdata(&adev->dev); >>>>> + >>>>> + coresight_unregister(drvdata->csdev); >>>>> +} >>>>> + >>>>> +static struct amba_id tpdm_ids[] = { >>>>> + { >>>>> + .id = 0x000f0e00, >>>>> + .mask = 0x000fff00, >>>>> + }, >>>>> + { 0, 0}, >>>>> +}; >>>>> + >>>>> +static struct amba_driver tpdm_driver = { >>>>> + .drv = { >>>>> + .name = "coresight-tpdm", >>>>> + .owner = THIS_MODULE, >>>>> + .suppress_bind_attrs = true, >>>>> + }, >>>>> + .probe = tpdm_probe, >>>>> + .id_table = tpdm_ids, >>>>> +}; >>>>> + >>>>> +module_amba_driver(tpdm_driver); >>>>> + >>>>> +MODULE_LICENSE("GPL v2"); >>>>> +MODULE_DESCRIPTION("Trace, Profiling & Diagnostic Monitor driver"); >>>>> diff --git a/drivers/hwtracing/coresight/coresight-tpdm.h b/drivers/hwtracing/coresight/coresight-tpdm.h >>>>> new file mode 100644 >>>>> index 000000000000..980ae90ff1c8 >>>>> --- /dev/null >>>>> +++ b/drivers/hwtracing/coresight/coresight-tpdm.h >>>>> @@ -0,0 +1,31 @@ >>>>> +/* SPDX-License-Identifier: GPL-2.0 */ >>>>> +/* >>>>> + * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. >>>>> + */ >>>>> + >>>>> +#ifndef _CORESIGHT_CORESIGHT_TPDM_H >>>>> +#define _CORESIGHT_CORESIGHT_TPDM_H >>>>> + >>>>> +/* Default value of the traceid */ >>>>> +#define TPDM_TRACE_ID_START 128 >>>>> + >>>>> +/** >>>>> + * struct tpdm_drvdata - specifics associated to an TPDM component >>>>> + * @base: memory mapped base address for this component. >>>>> + * @dev: The device entity associated to this component. >>>>> + * @csdev: component vitals needed by the framework. >>>>> + * @lock: lock for the enable value. >>>>> + * @enable: enable status of the component. >>>>> + * @traceid: value of the current ID for this component. >>>>> + */ >>>>> + >>>>> +struct tpdm_drvdata { >>>>> + void __iomem *base; >>>>> + struct device *dev; >>>>> + struct coresight_device *csdev; >>>>> + struct mutex lock; >>>>> + bool enable; >>>>> + int traceid; >>>>> +}; >>>>> + >>>>> +#endif /* _CORESIGHT_CORESIGHT_TPDM_H */ >>>>> diff --git a/include/linux/coresight.h b/include/linux/coresight.h >>>>> index 93a2922b7653..e48d463be63b 100644 >>>>> --- a/include/linux/coresight.h >>>>> +++ b/include/linux/coresight.h >>>>> @@ -65,6 +65,7 @@ enum coresight_dev_subtype_source { >>>>> CORESIGHT_DEV_SUBTYPE_SOURCE_PROC, >>>>> CORESIGHT_DEV_SUBTYPE_SOURCE_BUS, >>>>> CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE, >>>>> + CORESIGHT_DEV_SUBTYPE_SOURCE_SYS, >>>>> }; >>>>> >>>>> enum coresight_dev_subtype_helper { >>>>> -- >>>>> 2.17.1 >>>>> >> >> >> -- >> Mike Leach >> Principal Engineer, ARM Ltd. >> Manchester Design Centre. UK From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 66879C433EF for ; Fri, 21 Jan 2022 14:03:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:From:References:CC:To:Subject: MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=XCxhIcFnj+LFo+njfpNTthIymvAaif4+VOxt7s2Z8YE=; b=bkw1uf0Qd5uYb3 lO8lZzLJ4tl6aJafvFcg84zj37B/qPiQW1120MmClE3fwC0qucBj3oy91dNTjP8FnLlrZSjYNwj3h lnqW5jrvQlyn4SpO1ote5Jhp48YA+1ZyI0xb1BGmxLPL71UPXK7wca43myIXaGlDd+QQwkb6NPOEw vuDrXT8WAq/C9LNqtOjTfrAanNI8Y/NLfpRPL3lYqzqmV7QUnJs5Z9WGacr21xUXwVjKRMU783/2Y 3ELfi5VIw6ppjqIeqtGsu9p0T+84StrCjGejO+FJhuFjQJOlQFIOBvISLT3yzEeJEmsrIhNp/Letn DD8OrCtuusXy2Obh4eCw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nAuUW-00FH65-Pu; Fri, 21 Jan 2022 14:02:13 +0000 Received: from alexa-out.qualcomm.com ([129.46.98.28]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nAuUS-00FH0O-69 for linux-arm-kernel@lists.infradead.org; Fri, 21 Jan 2022 14:02:10 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1642773728; x=1674309728; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=5IqRLRAOCUN5N8x7XtvNl4hgMj0+RLgbF9Z13Lxi2w4=; b=LgviMyQMPIo57Q51PAcl8QajUeu5i6/76vAZm98gRRqM5iIhY5EssEib 1SRMv0DAKOWlKZr+5dvM7iczscQxlZMhFwXSJR36NahLzR10aQaou/1SQ Gd1TesWhMreU23wHhlnyZCkgfpBc/1bpjt2ySqgCj9+gFb5ic3ut0HKOC E=; Received: from ironmsg08-lv.qualcomm.com ([10.47.202.152]) by alexa-out.qualcomm.com with ESMTP; 21 Jan 2022 06:01:54 -0800 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg08-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jan 2022 06:01:54 -0800 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.19; Fri, 21 Jan 2022 06:01:53 -0800 Received: from [10.253.75.234] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.19; Fri, 21 Jan 2022 06:01:50 -0800 Message-ID: <2703bf83-3a87-e69f-2392-7e0568e91712@quicinc.com> Date: Fri, 21 Jan 2022 22:01:47 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.3.0 Subject: Re: [PATCH v2 2/9] Coresight: Add coresight TPDM source driver Content-Language: en-US To: Mathieu Poirier , Mike Leach CC: Suzuki K Poulose , Alexander Shishkin , Leo Yan , "Greg Kroah-Hartman" , , , , Tingwei Zhang , Yuanfang Zhang , Tao Zhang , Trilok Soni , References: <20211209141543.21314-1-quic_jinlmao@quicinc.com> <20211209141543.21314-3-quic_jinlmao@quicinc.com> <20211214185714.GB1549991@p14s> <85ad17fb-c885-831d-d841-4c6f10920355@quicinc.com> <20211216190223.GA78825@p14s> From: Jinlong Mao In-Reply-To: <20211216190223.GA78825@p14s> X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220121_060208_295622_0E238D70 X-CRM114-Status: GOOD ( 34.67 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: base64 Content-Type: text/plain; charset="utf-8"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org SGkgTWF0aGlldSwKCkdvb2QgRGF5LgoKT24gMTIvMTcvMjAyMSAzOjAyIEFNLCBNYXRoaWV1IFBv aXJpZXIgd3JvdGU6Cj4gWy4uLl0KPgo+Pj4+PiArCj4+Pj4+ICtzdGF0aWMgdm9pZCB0cGRtX2lu aXRfZGVmYXVsdF9kYXRhKHN0cnVjdCB0cGRtX2RydmRhdGEgKmRydmRhdGEpCj4+Pj4+ICt7Cj4+ Pj4+ICsgICAgc3RhdGljIGludCB0cmFjZWlkID0gVFBETV9UUkFDRV9JRF9TVEFSVDsKPj4+Pj4g Kwo+Pj4+PiArICAgIGRydmRhdGEtPnRyYWNlaWQgPSB0cmFjZWlkKys7Cj4+Pj4+ICt9Cj4+Pj4g SSBoYXZlIGJlZW4gc3BlY2lmaWMgb24gaG93IHRvIHByb3Blcmx5IGRvIHRoaXMgaW4gdGhlIGxh c3QgcmV2aXNpb24uICBHaXZlbiB0aGUKPj4+PiBhYm92ZSBhYm91dCB0aGUgTUFJTlRBSU5FUlMg ZmlsZSwgSSBhbSBub3Qgc3VyZSB0aGF0IEkgd2lsbCBjb250aW51ZSByZXZpZXdpbmcgdGhpcyBz ZXQuCj4+Pj4KPj4+PiBUaGVyZSBpcyBhbHNvIG5vIG5lZWQgdG8gcnVzaCBhbm90aGVyIHJldmlz aW9uIGFzIEkgd29uJ3QgaGF2ZSB0aGUgYmFuZHdpZHRoIHRvCj4+Pj4gcHJvY2VzcyBpdCBiZWZv cmUgdGhlIGhvbGlkYXlzLgo+Pj4+Cj4+Pj4gVGhhbmtzLAo+Pj4+IE1hdGhpZXUKPj4+IEhpIE1h dGhpZXUsCj4+Pgo+Pj4gU29ycnksIG5vdCBhZGRyZXNzZWQgeW91ciBwcmV2aW91cyBjb21tZW50 cyBoZXJlLgo+Pj4KPj4+IEZvciB0aGUgdHJhY2UgaWQsIGVhY2ggY29yZXNpZ2h0IGNvbXBvbmVu dCBoYXMgNyBiaXRzIHRvIHN0b3JlIHRoZSB0cmFjZQo+Pj4gaWQuIFNvIHRoZSB0cmFjZSBpZCBz aG91bGQgYmUgZnJvbSAxIHRvIDEyNyBhcyAwIGlzIGludmFsaWQuCj4+IElEcyAweDcwIC0gMHg3 RiAoYDExMiAtIDEyNyApIGFyZSByZXNlcnZlZCAtIHNlZSB0aGUgQVJNIENvcmVzaWdodAo+PiBB cmNoaXRlY3R1cmUgc3BlY2lmaWNhdGlvbiB2My4wCj4+Cj4gQ29ycmVjdAo+Cj4+PiBBcGFydCBm cm9tIFRQRE1zL1NUTS9FVE1zLCB3ZSBhbHNvIGhhdmUgb3RoZXIgY29yZXNpZ2h0IGNvbXBvbmVu dHMgaW4KPj4+IG91ciBpbnRlcm5hbCBkZXZpY2UuIEFib3V0IDgwIGlkcyBhcmUgYWxyZWFkeSB1 c2VkLgo+Pj4KPj4+IFNvbWUgY29tcG9uZW50cyBoYXZlIGZpeGVkIHRyYWNlIGlkIGluIEhXLiBJ ZiB3ZSB1c2UgZnVuY3Rpb25zIGJlbG93IHRvCj4+PiBjb3VudCB0aGUgdHJhY2UgaWQsIHRoZXJl IHdpbGwgYmUgY29uZmxpY3QgdG8gb3RoZXIgY29tcG9uZW50cy4KPj4+Cj4+PiBDYW4gd2UgdXNl IDEtMTUgZm9yIGV0bSB0cmFjZSBpZHMgIGFuZCAxNiAtIDEyNyBmb3Igb3RoZXIgY29yZXNpZ2h0 Cj4+PiBjb21wb25lbnRzID8gQW5kIGhhbmRsZSB0cmFjZSBpZHMgaW4gaXRzJyBvd24gZHJpdmVy ID8KPj4+Cj4+IFRoaXMgd2lsbCBsaW1pdCBzeXN0ZW1zIHRvIDE1IGNvcmVzIC0gc29tZSBoYXZl IG1vcmUhCj4+Cj4gQ29ycmVjdAo+Cj4+PiBzdGF0aWMgaW5saW5lIGludCBjb3Jlc2lnaHRfZ2V0 X3N5c3RlbV90cmFjZV9pZChpbnQgaWQpCj4+PiB7Cj4+PiAgICAgICAgICAgLyogU3RhcnQgc3lz dGVtIElEcyBhYm92ZSB0aGUgaGlnaGVzdCBwZXIgQ1BVIHRyYWNlIElELiAqLwo+Pj4gICAgICAg ICAgIHJldHVybiBjb3Jlc2lndGhfZ2V0X3RyYWNlX2lkKGNwdW1hc2tfbGFzdChjcHVfcG9zc2li bGVfbWFzaykgKyAxKTsKPj4+IH0KPiBMb29raW5nIGF0IG15IG93biBzdWdnZXN0aW9uIGFnYWlu IHRoaXMgd29uJ3Qgd29yayBzaW5jZSBpdCByZXR1cm5zIHRoZSBzYW1lIHRyYWNlSUQKPiB3aGVu IGNhbGxlZCBtdWx0aXBsZSB0aW1lcy4KPgo+IEZvciB0aGlzIHBhdGNoc2V0IGFuZCBfd2l0aG91 dF8gdGFraW5nIGludG8gYWNjb3VudCBpbnRlcm5hbCBkZXZpY2VzIHRoYXQgaGF2ZQo+IHRoZWly IHRyYWNlSUQgc2V0IGluIEhXOgo+Cj4gMS4gRGVmaW5lIGEgYml0bWFzayB0aGF0IGlzIDcgYml0 IHdpZGUuClNob3VsZCBpdCBiZSBhIDEyOCBiaXQgd2lkZSBiaXRtYXNrwqAgKDAtLTEyNyk/Cj4g Mi4gQnkgZGVmYXVsdCwgc2V0IGJpdHMgdW5kZXIgMHgxMCBhbmQgYmV0d2VlbiAweDcwIC0gMHg3 Ri4KPiAzLiBJbiBjb3Jlc2lnaHRfZ2V0X3N5c3RlbV90cmFjZV9pZCgpLCBkcm9wIHRoZSBAaWQg cGFyYW1ldGVyIGFuZCBhbGxvY2F0ZSB0aGUKPiBmaXJzdCBhdmFpbGFibGUgYml0IGFmdGVyIGNw dW1hc2tfbGFzdChjcHVfcG9zc2libGVfbWFzaykgKyAxLgoKU2hvdWxkIGl0IGFsbG9jYXRlIHRo ZSBmaXJzdCBhdmFpbGFibGUgYml0IGFmdGVyIChjcHVtYXNrX2xhc3QoY3B1X3Bvc3NpYmxlX21h c2spICoyICkgKyAweDEwID8KUmV0dXJuIHRoZSBmaXJzdCB6ZXJvIGJpdCBwb3NpdGlvbiBhcyB0 aGUgdHJhY2UgaWQgYW5kIHNldCB0aGUgYml0LgoKPiA0LiBEZWZpbmUgYSBuZXcgZnVuY3Rpb24g Y2FsbGVkIGNvcmVzaWdodF9wdXRfc3lzdGVtX3RyYWNlX2lkKGludCBpZCkgdGhhdAo+IGNsZWFy cyB0aGUgYml0IGluIHRoZSBtYXNrIGNvcnJlc3BvbmRpbmcgdG8gQGlkLgo+Cj4gRm9yIG5vdyB0 aGF0IHNob3VsZCB3b3JrLgo+Cj4+PiBzdGF0aWMgaW5saW5lIGludCBjb3Jlc2lnaHRfZ2V0X3Ry YWNlX2lkKGludCBjcHUpCj4+PiB7Cj4+PiAgICAgICAvKgo+Pj4gICAgICAgICogQSB0cmFjZSBJ RCBvZiB2YWx1ZSAwIGlzIGludmFsaWQsIHNvIGxldCdzIHN0YXJ0IGF0IHNvbWUKPj4+ICAgICAg ICAqIHJhbmRvbSB2YWx1ZSB0aGF0IGZpdHMgaW4gNyBiaXRzIGFuZCBnbyBmcm9tIHRoZXJlLiAg U2luY2UKPj4+ICAgICAgICAqIHRoZSBjb21tb24gY29udmVudGlvbiBpcyB0byBoYXZlIGRhdGEg dHJhY2UgSURzIGJlIEkoTikgKyAxLAo+Pj4gICAgICAgICogc2V0IGluc3RydWN0aW9uIHRyYWNl IElEcyBhcyBhIGZ1bmN0aW9uIG9mIHRoZSBDUFUgbnVtYmVyLgo+Pj4gICAgICAgICovCj4+PiAg ICAgICByZXR1cm4gKENPUkVTSUdIVF9FVE1fUE1VX1NFRUQgKyAoY3B1ICogMikpOwo+Pj4gfQo+ Pj4KPj4gVGhpcyBmaXhlZCByZWxhdGlvbnNoaXAgYmV0d2VlbiBjcHUgYW5kIHRyYWNlIElEIGlz IHVzZWQgaW4gdGhlIHBlcmYKPj4gdG9vbGluZyB0byBwb3B1bGF0ZSB0aGUgZWxlbWVudHMgaW4g dGhlIHBlcmYuZGF0YSBmaWxlIHRvIGNvcnJlY3RseQo+PiBhbGxvdyBhc3NvY2lhdGlvbiBiZXR3 ZWVuIENQVSBhbmQgdHJhY2UgZGF0YSwgYW5kIHRodXMgYWxsb3cgY29ycmVjdAo+PiB0cmFjZSBk ZWNvZGUuCj4gVHJhY2VJRHMgYXNzb2NpYXRlZCB0byBDUFVzIGFyZSBjb21tdW5pY2F0ZWQgdG8g dGhlIHBlcmYgdG9vbGluZyBieSB3YXkgb2YgdGhlCj4gcGVyZiBoZWFkZXIgLSB0aGVvcmV0aWNh bGx5IHdlIHNob3VsZCBiZSBhYmxlIHRvIGNoYW5nZSB0aGUgYWxsb2NhdGlvbiBzY2hlbWUKPiB3 aXRob3V0IGltcGFjdGluZyB0aGUgZGVjb2RpbmcgcHJvY2Vzcy4KPgo+PiBJdCBzaG91bGQgYmUg cG9zc2libGUgdG8gY3JlYXRlIGFub3RoZXIgbW9yZSBkeW5hbWljIG1hcHBpbmcgc2NoZW1lIC0K Pj4gYnV0IHRoaXMgbXVzdCBpbmNsdWRlIGEgd2F5IHRvIHN1cHBvcnQgdGhlIHBlcmYgcmVxdWly ZW1lbnRzIHRvby4KPj4KPiBUcmFjZUlEcyBoYXZlIGJlZW4gYSBsdXJraW5nIHByb2JsZW0gZm9y IGFzIGxvbmcgYXMgdGhlIHN1YnN5c3RlbSBoYXMgZXhpc3RlZC4KPiBGb3Igbm93IHdoYXQgSSBo YXZlIHN1Z2dlc3RlZCBhYm92ZSBzaG91bGQgYmUgc3VmZmljaWVudCB0byBwcm92aWRlIGFuCj4g aW4tYmV0d2VlbiBzb2x1dGlvbiB0aGF0IGRvZXNuJ3QgaG9sZCBiYWNrIHRoaXMgcGF0Y2hzZXQu Cj4KPiBUaGF0IGJlaW5nIHNhaWQsIHdlIG5lZWQgdG8gc3RhcnQgdGhpbmtpbmcgYWJvdXQgdGhl IGJlc3Qgd2F5IHRvIGRvIHRoaXMuICBJCj4gd2lsbCBwdXQgYSBwYXRjaHNldCB0b2dldGhlciBp biB0aGUgbmV3IHllYXIgdGhhdCBhaW1zIGluIHRoYXQgZGlyZWN0aW9uLgo+Cj4+IFJlZ2FyZHMK Pj4KPj4gTWlrZQo+Pgo+Pj4gVGhhbmtzCj4+Pgo+Pj4gSmlubG9uZyBNYW8KPj4+Cj4+Pj4+ICsK Pj4+Pj4gK3N0YXRpYyBpbnQgdHBkbV9wcm9iZShzdHJ1Y3QgYW1iYV9kZXZpY2UgKmFkZXYsIGNv bnN0IHN0cnVjdCBhbWJhX2lkICppZCkKPj4+Pj4gK3sKPj4+Pj4gKyAgICBzdHJ1Y3QgZGV2aWNl ICpkZXYgPSAmYWRldi0+ZGV2Owo+Pj4+PiArICAgIHN0cnVjdCBjb3Jlc2lnaHRfcGxhdGZvcm1f ZGF0YSAqcGRhdGE7Cj4+Pj4+ICsgICAgc3RydWN0IHRwZG1fZHJ2ZGF0YSAqZHJ2ZGF0YTsKPj4+ Pj4gKyAgICBzdHJ1Y3QgY29yZXNpZ2h0X2Rlc2MgZGVzYyA9IHsgMCB9Owo+Pj4+PiArCj4+Pj4+ ICsgICAgZGVzYy5uYW1lID0gY29yZXNpZ2h0X2FsbG9jX2RldmljZV9uYW1lKCZ0cGRtX2RldnMs IGRldik7Cj4+Pj4+ICsgICAgaWYgKCFkZXNjLm5hbWUpCj4+Pj4+ICsgICAgICAgICAgICByZXR1 cm4gLUVOT01FTTsKPj4+Pj4gKyAgICBwZGF0YSA9IGNvcmVzaWdodF9nZXRfcGxhdGZvcm1fZGF0 YShkZXYpOwo+Pj4+PiArICAgIGlmIChJU19FUlIocGRhdGEpKQo+Pj4+PiArICAgICAgICAgICAg cmV0dXJuIFBUUl9FUlIocGRhdGEpOwo+Pj4+PiArICAgIGFkZXYtPmRldi5wbGF0Zm9ybV9kYXRh ID0gcGRhdGE7Cj4+Pj4+ICsKPj4+Pj4gKyAgICBkcnZkYXRhID0gZGV2bV9remFsbG9jKGRldiwg c2l6ZW9mKCpkcnZkYXRhKSwgR0ZQX0tFUk5FTCk7Cj4+Pj4+ICsgICAgaWYgKCFkcnZkYXRhKQo+ Pj4+PiArICAgICAgICAgICAgcmV0dXJuIC1FTk9NRU07Cj4+Pj4+ICsgICAgZHJ2ZGF0YS0+ZGV2 ID0gJmFkZXYtPmRldjsKPj4+Pj4gKyAgICBkZXZfc2V0X2RydmRhdGEoZGV2LCBkcnZkYXRhKTsK Pj4+Pj4gKwo+Pj4+PiArICAgIGRydmRhdGEtPmJhc2UgPSBkZXZtX2lvcmVtYXBfcmVzb3VyY2Uo ZGV2LCAmYWRldi0+cmVzKTsKPj4+Pj4gKyAgICBpZiAoIWRydmRhdGEtPmJhc2UpCj4+Pj4+ICsg ICAgICAgICAgICByZXR1cm4gLUVOT01FTTsKPj4+Pj4gKwo+Pj4+PiArICAgIG11dGV4X2luaXQo JmRydmRhdGEtPmxvY2spOwo+Pj4+PiArCj4+Pj4+ICsgICAgZGVzYy50eXBlID0gQ09SRVNJR0hU X0RFVl9UWVBFX1NPVVJDRTsKPj4+Pj4gKyAgICBkZXNjLnN1YnR5cGUuc291cmNlX3N1YnR5cGUg PSBDT1JFU0lHSFRfREVWX1NVQlRZUEVfU09VUkNFX1NZUzsKPj4+Pj4gKyAgICBkZXNjLm9wcyA9 ICZ0cGRtX2NzX29wczsKPj4+Pj4gKyAgICBkZXNjLnBkYXRhID0gYWRldi0+ZGV2LnBsYXRmb3Jt X2RhdGE7Cj4+Pj4+ICsgICAgZGVzYy5kZXYgPSAmYWRldi0+ZGV2Owo+Pj4+PiArICAgIGRydmRh dGEtPmNzZGV2ID0gY29yZXNpZ2h0X3JlZ2lzdGVyKCZkZXNjKTsKPj4+Pj4gKyAgICBpZiAoSVNf RVJSKGRydmRhdGEtPmNzZGV2KSkKPj4+Pj4gKyAgICAgICAgICAgIHJldHVybiBQVFJfRVJSKGRy dmRhdGEtPmNzZGV2KTsKPj4+Pj4gKwo+Pj4+PiArICAgIHRwZG1faW5pdF9kZWZhdWx0X2RhdGEo ZHJ2ZGF0YSk7Cj4+Pj4+ICsgICAgcG1fcnVudGltZV9wdXQoJmFkZXYtPmRldik7Cj4+Pj4+ICsK Pj4+Pj4gKyAgICByZXR1cm4gMDsKPj4+Pj4gK30KPj4+Pj4gKwo+Pj4+PiArc3RhdGljIHZvaWQg X19leGl0IHRwZG1fcmVtb3ZlKHN0cnVjdCBhbWJhX2RldmljZSAqYWRldikKPj4+Pj4gK3sKPj4+ Pj4gKyAgICBzdHJ1Y3QgdHBkbV9kcnZkYXRhICpkcnZkYXRhID0gZGV2X2dldF9kcnZkYXRhKCZh ZGV2LT5kZXYpOwo+Pj4+PiArCj4+Pj4+ICsgICAgY29yZXNpZ2h0X3VucmVnaXN0ZXIoZHJ2ZGF0 YS0+Y3NkZXYpOwo+Pj4+PiArfQo+Pj4+PiArCj4+Pj4+ICtzdGF0aWMgc3RydWN0IGFtYmFfaWQg dHBkbV9pZHNbXSA9IHsKPj4+Pj4gKyAgICB7Cj4+Pj4+ICsgICAgICAgICAgICAuaWQgPSAweDAw MGYwZTAwLAo+Pj4+PiArICAgICAgICAgICAgLm1hc2sgPSAweDAwMGZmZjAwLAo+Pj4+PiArICAg IH0sCj4+Pj4+ICsgICAgeyAwLCAwfSwKPj4+Pj4gK307Cj4+Pj4+ICsKPj4+Pj4gK3N0YXRpYyBz dHJ1Y3QgYW1iYV9kcml2ZXIgdHBkbV9kcml2ZXIgPSB7Cj4+Pj4+ICsgICAgLmRydiA9IHsKPj4+ Pj4gKyAgICAgICAgICAgIC5uYW1lICAgPSAiY29yZXNpZ2h0LXRwZG0iLAo+Pj4+PiArICAgICAg ICAgICAgLm93bmVyICA9IFRISVNfTU9EVUxFLAo+Pj4+PiArICAgICAgICAgICAgLnN1cHByZXNz X2JpbmRfYXR0cnMgPSB0cnVlLAo+Pj4+PiArICAgIH0sCj4+Pj4+ICsgICAgLnByb2JlICAgICAg ICAgID0gdHBkbV9wcm9iZSwKPj4+Pj4gKyAgICAuaWRfdGFibGUgICAgICAgPSB0cGRtX2lkcywK Pj4+Pj4gK307Cj4+Pj4+ICsKPj4+Pj4gK21vZHVsZV9hbWJhX2RyaXZlcih0cGRtX2RyaXZlcik7 Cj4+Pj4+ICsKPj4+Pj4gK01PRFVMRV9MSUNFTlNFKCJHUEwgdjIiKTsKPj4+Pj4gK01PRFVMRV9E RVNDUklQVElPTigiVHJhY2UsIFByb2ZpbGluZyAmIERpYWdub3N0aWMgTW9uaXRvciBkcml2ZXIi KTsKPj4+Pj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvaHd0cmFjaW5nL2NvcmVzaWdodC9jb3Jlc2ln aHQtdHBkbS5oIGIvZHJpdmVycy9od3RyYWNpbmcvY29yZXNpZ2h0L2NvcmVzaWdodC10cGRtLmgK Pj4+Pj4gbmV3IGZpbGUgbW9kZSAxMDA2NDQKPj4+Pj4gaW5kZXggMDAwMDAwMDAwMDAwLi45ODBh ZTkwZmYxYzgKPj4+Pj4gLS0tIC9kZXYvbnVsbAo+Pj4+PiArKysgYi9kcml2ZXJzL2h3dHJhY2lu Zy9jb3Jlc2lnaHQvY29yZXNpZ2h0LXRwZG0uaAo+Pj4+PiBAQCAtMCwwICsxLDMxIEBACj4+Pj4+ ICsvKiBTUERYLUxpY2Vuc2UtSWRlbnRpZmllcjogR1BMLTIuMCAqLwo+Pj4+PiArLyoKPj4+Pj4g KyAqIENvcHlyaWdodCAoYykgMjAyMSBRdWFsY29tbSBJbm5vdmF0aW9uIENlbnRlciwgSW5jLiBB bGwgcmlnaHRzIHJlc2VydmVkLgo+Pj4+PiArICovCj4+Pj4+ICsKPj4+Pj4gKyNpZm5kZWYgX0NP UkVTSUdIVF9DT1JFU0lHSFRfVFBETV9ICj4+Pj4+ICsjZGVmaW5lIF9DT1JFU0lHSFRfQ09SRVNJ R0hUX1RQRE1fSAo+Pj4+PiArCj4+Pj4+ICsvKiBEZWZhdWx0IHZhbHVlIG9mIHRoZSB0cmFjZWlk ICovCj4+Pj4+ICsjZGVmaW5lIFRQRE1fVFJBQ0VfSURfU1RBUlQgMTI4Cj4+Pj4+ICsKPj4+Pj4g Ky8qKgo+Pj4+PiArICogc3RydWN0IHRwZG1fZHJ2ZGF0YSAtIHNwZWNpZmljcyBhc3NvY2lhdGVk IHRvIGFuIFRQRE0gY29tcG9uZW50Cj4+Pj4+ICsgKiBAYmFzZTogICAgICAgbWVtb3J5IG1hcHBl ZCBiYXNlIGFkZHJlc3MgZm9yIHRoaXMgY29tcG9uZW50Lgo+Pj4+PiArICogQGRldjogICAgICAg IFRoZSBkZXZpY2UgZW50aXR5IGFzc29jaWF0ZWQgdG8gdGhpcyBjb21wb25lbnQuCj4+Pj4+ICsg KiBAY3NkZXY6ICAgICAgY29tcG9uZW50IHZpdGFscyBuZWVkZWQgYnkgdGhlIGZyYW1ld29yay4K Pj4+Pj4gKyAqIEBsb2NrOiAgICAgICBsb2NrIGZvciB0aGUgZW5hYmxlIHZhbHVlLgo+Pj4+PiAr ICogQGVuYWJsZTogICAgIGVuYWJsZSBzdGF0dXMgb2YgdGhlIGNvbXBvbmVudC4KPj4+Pj4gKyAq IEB0cmFjZWlkOiAgICB2YWx1ZSBvZiB0aGUgY3VycmVudCBJRCBmb3IgdGhpcyBjb21wb25lbnQu Cj4+Pj4+ICsgKi8KPj4+Pj4gKwo+Pj4+PiArc3RydWN0IHRwZG1fZHJ2ZGF0YSB7Cj4+Pj4+ICsg ICAgdm9pZCBfX2lvbWVtICAgICAgICAgICAgKmJhc2U7Cj4+Pj4+ICsgICAgc3RydWN0IGRldmlj ZSAgICAgICAgICAgKmRldjsKPj4+Pj4gKyAgICBzdHJ1Y3QgY29yZXNpZ2h0X2RldmljZSAqY3Nk ZXY7Cj4+Pj4+ICsgICAgc3RydWN0IG11dGV4ICAgICAgICAgICAgbG9jazsKPj4+Pj4gKyAgICBi b29sICAgICAgICAgICAgICAgICAgICBlbmFibGU7Cj4+Pj4+ICsgICAgaW50ICAgICAgICAgICAg ICAgICAgICAgdHJhY2VpZDsKPj4+Pj4gK307Cj4+Pj4+ICsKPj4+Pj4gKyNlbmRpZiAgLyogX0NP UkVTSUdIVF9DT1JFU0lHSFRfVFBETV9IICovCj4+Pj4+IGRpZmYgLS1naXQgYS9pbmNsdWRlL2xp bnV4L2NvcmVzaWdodC5oIGIvaW5jbHVkZS9saW51eC9jb3Jlc2lnaHQuaAo+Pj4+PiBpbmRleCA5 M2EyOTIyYjc2NTMuLmU0OGQ0NjNiZTYzYiAxMDA2NDQKPj4+Pj4gLS0tIGEvaW5jbHVkZS9saW51 eC9jb3Jlc2lnaHQuaAo+Pj4+PiArKysgYi9pbmNsdWRlL2xpbnV4L2NvcmVzaWdodC5oCj4+Pj4+ IEBAIC02NSw2ICs2NSw3IEBAIGVudW0gY29yZXNpZ2h0X2Rldl9zdWJ0eXBlX3NvdXJjZSB7Cj4+ Pj4+ICAgICAgIENPUkVTSUdIVF9ERVZfU1VCVFlQRV9TT1VSQ0VfUFJPQywKPj4+Pj4gICAgICAg Q09SRVNJR0hUX0RFVl9TVUJUWVBFX1NPVVJDRV9CVVMsCj4+Pj4+ICAgICAgIENPUkVTSUdIVF9E RVZfU1VCVFlQRV9TT1VSQ0VfU09GVFdBUkUsCj4+Pj4+ICsgICAgQ09SRVNJR0hUX0RFVl9TVUJU WVBFX1NPVVJDRV9TWVMsCj4+Pj4+ICAgIH07Cj4+Pj4+Cj4+Pj4+ICAgIGVudW0gY29yZXNpZ2h0 X2Rldl9zdWJ0eXBlX2hlbHBlciB7Cj4+Pj4+IC0tCj4+Pj4+IDIuMTcuMQo+Pj4+Pgo+Pgo+Pgo+ PiAtLSAKPj4gTWlrZSBMZWFjaAo+PiBQcmluY2lwYWwgRW5naW5lZXIsIEFSTSBMdGQuCj4+IE1h bmNoZXN0ZXIgRGVzaWduIENlbnRyZS4gVUsKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fCmxpbnV4LWFybS1rZXJuZWwgbWFpbGluZyBsaXN0CmxpbnV4LWFy bS1rZXJuZWxAbGlzdHMuaW5mcmFkZWFkLm9yZwpodHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9t YWlsbWFuL2xpc3RpbmZvL2xpbnV4LWFybS1rZXJuZWwK