From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751791AbdITIEa convert rfc822-to-8bit (ORCPT ); Wed, 20 Sep 2017 04:04:30 -0400 Received: from hermes.aosc.io ([199.195.250.187]:56267 "EHLO hermes.aosc.io" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751572AbdITIEZ (ORCPT ); Wed, 20 Sep 2017 04:04:25 -0400 Date: Wed, 20 Sep 2017 16:04:02 +0800 In-Reply-To: <20170920075223.jaeswlhcqgu4yhse@flea.home> References: <20170914145251.21784-1-icenowy@aosc.io> <20170914145251.21784-2-icenowy@aosc.io> <20170918073336.j7finend3g76chsu@flea.lan> <310CE549-B8CE-4C0C-95B1-B545E38BDAF5@aosc.io> <20170918083045.7bfiialtbm7w6i7j@flea.lan> <20170920075223.jaeswlhcqgu4yhse@flea.home> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8BIT Subject: Re: [linux-sunxi] Re: [PATCH v4 1/6] dt-bindings: update the Allwinner GPADC device tree binding for H3 To: maxime.ripard@free-electrons.com, Maxime Ripard CC: Lee Jones , Rob Herring , Chen-Yu Tsai , Jonathan Cameron , Quentin Schulz , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, linux-sunxi@googlegroups.com From: Icenowy Zheng Message-ID: <27449039-F0D4-4663-B596-C95D4408D471@aosc.io> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 于 2017年9月20日 GMT+08:00 下午3:52:23, Maxime Ripard 写到: >On Mon, Sep 18, 2017 at 03:47:25PM +0000, icenowy@aosc.io wrote: >> 在 2017-09-18 16:30，Maxime Ripard 写道： >> > On Mon, Sep 18, 2017 at 03:36:43PM +0800, Icenowy Zheng wrote: >> > > 于 2017年9月18日 GMT+08:00 下午3:33:36, Maxime Ripard >> > > 写到: >> > > >On Thu, Sep 14, 2017 at 10:52:46PM +0800, Icenowy Zheng wrote: >> > > >> Allwinner H3 features a thermal sensor like the one in A33, >but has >> > > >its >> > > >> register re-arranged, the clock divider moved to CCU >(originally the >> > > >> clock divider is in ADC) and added a pair of bus clock and >reset. >> > > >> >> > > >> Update the binding document to cover H3. >> > > >> >> > > >> Signed-off-by: Icenowy Zheng >> > > >> Reviewed-by: Chen-Yu Tsai >> > > >> --- >> > > >> Changes in v4: >> > > >> - Add nvmem calibration data (not yet used by the driver) >> > > >> Changes in v3: >> > > >> - Clock name changes. >> > > >> - Example node name changes. >> > > >> - Add interupts (not yet used by the driver). >> > > >> >> > > >> .../devicetree/bindings/mfd/sun4i-gpadc.txt | 30 >> > > >++++++++++++++++++++-- >> > > >> 1 file changed, 28 insertions(+), 2 deletions(-) >> > > >> >> > > >> diff --git >a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt >> > > >b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt >> > > >> index badff3611a98..6c470d584bf9 100644 >> > > >> --- a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt >> > > >> +++ b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt >> > > >> @@ -4,12 +4,26 @@ The Allwinner SoCs all have an ADC that can >also >> > > >act as a thermal sensor >> > > >> and sometimes as a touchscreen controller. >> > > >> >> > > >> Required properties: >> > > >> - - compatible: "allwinner,sun8i-a33-ths", >> > > >> + - compatible: must contain one of the following >compatibles: >> > > >> + - "allwinner,sun8i-a33-ths" >> > > >> + - "allwinner,sun8i-h3-ths" >> > > >> - reg: mmio address range of the chip, >> > > >> - #thermal-sensor-cells: shall be 0, >> > > >> - #io-channel-cells: shall be 0, >> > > >> >> > > >> -Example: >> > > >> +Optional properties: >> > > >> + - nvmem-cells: A phandle to the calibration data provided >by a >> > > >nvmem device. >> > > >> + If unspecified default values shall be used. >> > > >> + - nvmem-cell-names: Should be "calibration-data" >> > > > >> > > >I'd prefer to have which sensor it applies to here. It wouldn't >change >> > > >anything for the H3, but it definitely does for example for the >A83t >> > > >that has two sensors, one for each cluster, and one for the GPU, >each >> > > >with calibration data. >> > > > >> > > >What about cluster0-calibration? >> >> I prefer sensor0-calibration to sensor3-calibration now. >> (Theortically the new generation THS can support up to 4 sensors) > >The mapping that explains what sensor0 means can change in the >future. It's better to be explicit here, and just say upfront what >it's about. I think for some SoC (e.g. A64) there's no clear explain on the functions of the sensors. In addition, in the THS controller the sensors has a explicit sequence, and when referencing it in the DT the number is still needed (in thermal zones). > >Maxime From mboxrd@z Thu Jan 1 00:00:00 1970 From: Icenowy Zheng Subject: Re: Re: [PATCH v4 1/6] dt-bindings: update the Allwinner GPADC device tree binding for H3 Date: Wed, 20 Sep 2017 16:04:02 +0800 Message-ID: <27449039-F0D4-4663-B596-C95D4408D471@aosc.io> References: <20170914145251.21784-1-icenowy@aosc.io> <20170914145251.21784-2-icenowy@aosc.io> <20170918073336.j7finend3g76chsu@flea.lan> <310CE549-B8CE-4C0C-95B1-B545E38BDAF5@aosc.io> <20170918083045.7bfiialtbm7w6i7j@flea.lan> <20170920075223.jaeswlhcqgu4yhse@flea.home> Reply-To: icenowy-h8G6r0blFSE@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org In-Reply-To: <20170920075223.jaeswlhcqgu4yhse-YififvaboMKzQB+pC5nmwQ@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.orgMaxime Ripard Cc: Lee Jones , Rob Herring , Chen-Yu Tsai , Jonathan Cameron , Quentin Schulz , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-iio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org List-Id: devicetree@vger.kernel.org =E4=BA=8E 2017=E5=B9=B49=E6=9C=8820=E6=97=A5 GMT+08:00 =E4=B8=8B=E5=8D=883:= 52:23, Maxime Ripard =E5=86=99=E5=88=B0: >On Mon, Sep 18, 2017 at 03:47:25PM +0000, icenowy-h8G6r0blFSE@public.gmane.org wrote: >> =E5=9C=A8 2017-09-18 16:30=EF=BC=8CMaxime Ripard =E5=86=99=E9=81=93=EF= =BC=9A >> > On Mon, Sep 18, 2017 at 03:36:43PM +0800, Icenowy Zheng wrote: >> > > =E4=BA=8E 2017=E5=B9=B49=E6=9C=8818=E6=97=A5 GMT+08:00 =E4=B8=8B=E5= =8D=883:33:36, Maxime Ripard >> > > =E5=86=99=E5=88=B0: >> > > >On Thu, Sep 14, 2017 at 10:52:46PM +0800, Icenowy Zheng wrote: >> > > >> Allwinner H3 features a thermal sensor like the one in A33, >but has >> > > >its >> > > >> register re-arranged, the clock divider moved to CCU >(originally the >> > > >> clock divider is in ADC) and added a pair of bus clock and >reset. >> > > >> >> > > >> Update the binding document to cover H3. >> > > >> >> > > >> Signed-off-by: Icenowy Zheng >> > > >> Reviewed-by: Chen-Yu Tsai >> > > >> --- >> > > >> Changes in v4: >> > > >> - Add nvmem calibration data (not yet used by the driver) >> > > >> Changes in v3: >> > > >> - Clock name changes. >> > > >> - Example node name changes. >> > > >> - Add interupts (not yet used by the driver). >> > > >> >> > > >> .../devicetree/bindings/mfd/sun4i-gpadc.txt | 30 >> > > >++++++++++++++++++++-- >> > > >> 1 file changed, 28 insertions(+), 2 deletions(-) >> > > >> >> > > >> diff --git >a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt >> > > >b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt >> > > >> index badff3611a98..6c470d584bf9 100644 >> > > >> --- a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt >> > > >> +++ b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt >> > > >> @@ -4,12 +4,26 @@ The Allwinner SoCs all have an ADC that can >also >> > > >act as a thermal sensor >> > > >> and sometimes as a touchscreen controller. >> > > >> >> > > >> Required properties: >> > > >> - - compatible: "allwinner,sun8i-a33-ths", >> > > >> + - compatible: must contain one of the following >compatibles: >> > > >> + - "allwinner,sun8i-a33-ths" >> > > >> + - "allwinner,sun8i-h3-ths" >> > > >> - reg: mmio address range of the chip, >> > > >> - #thermal-sensor-cells: shall be 0, >> > > >> - #io-channel-cells: shall be 0, >> > > >> >> > > >> -Example: >> > > >> +Optional properties: >> > > >> + - nvmem-cells: A phandle to the calibration data provided >by a >> > > >nvmem device. >> > > >> + If unspecified default values shall be used. >> > > >> + - nvmem-cell-names: Should be "calibration-data" >> > > > >> > > >I'd prefer to have which sensor it applies to here. It wouldn't >change >> > > >anything for the H3, but it definitely does for example for the >A83t >> > > >that has two sensors, one for each cluster, and one for the GPU, >each >> > > >with calibration data. >> > > > >> > > >What about cluster0-calibration? >>=20 >> I prefer sensor0-calibration to sensor3-calibration now. >> (Theortically the new generation THS can support up to 4 sensors) > >The mapping that explains what sensor0 means can change in the >future. It's better to be explicit here, and just say upfront what >it's about. I think for some SoC (e.g. A64) there's no clear explain on the functions of the sensors. In addition, in the THS controller the sensors has a explicit sequence, and when referencing it in the DT the number is still needed (in thermal zones). > >Maxime --=20 You received this message because you are subscribed to the Google Groups "= linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an e= mail to linux-sunxi+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/Ez6ZCGd0@public.gmane.org For more options, visit https://groups.google.com/d/optout. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Date: Wed, 20 Sep 2017 16:04:02 +0800 In-Reply-To: <20170920075223.jaeswlhcqgu4yhse@flea.home> References: <20170914145251.21784-1-icenowy@aosc.io> <20170914145251.21784-2-icenowy@aosc.io> <20170918073336.j7finend3g76chsu@flea.lan> <310CE549-B8CE-4C0C-95B1-B545E38BDAF5@aosc.io> <20170918083045.7bfiialtbm7w6i7j@flea.lan> <20170920075223.jaeswlhcqgu4yhse@flea.home> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Subject: Re: [linux-sunxi] Re: [PATCH v4 1/6] dt-bindings: update the Allwinner GPADC device tree binding for H3 To: maxime.ripard@free-electrons.com,Maxime Ripard CC: Lee Jones ,Rob Herring ,Chen-Yu Tsai ,Jonathan Cameron ,Quentin Schulz ,devicetree@vger.kernel.org,linux-arm-kernel@lists.infradead.org,linux-kernel@vger.kernel.org,linux-iio@vger.kernel.org,linux-sunxi@googlegroups.com From: Icenowy Zheng Message-ID: <27449039-F0D4-4663-B596-C95D4408D471@aosc.io> List-ID: =E4=BA=8E 2017=E5=B9=B49=E6=9C=8820=E6=97=A5 GMT+08:00 =E4=B8=8B=E5=8D=883= :52:23, Maxime Ripard =E5=86=99=E5= =88=B0: >On Mon, Sep 18, 2017 at 03:47:25PM +0000, icenowy@aosc=2Eio wrote: >> =E5=9C=A8 2017-09-18 16:30=EF=BC=8CMaxime Ripard =E5=86=99=E9=81=93=EF= =BC=9A >> > On Mon, Sep 18, 2017 at 03:36:43PM +0800, Icenowy Zheng wrote: >> > > =E4=BA=8E 2017=E5=B9=B49=E6=9C=8818=E6=97=A5 GMT+08:00 =E4=B8=8B=E5= =8D=883:33:36, Maxime Ripard >> > > =E5=86=99=E5=88=B0: >> > > >On Thu, Sep 14, 2017 at 10:52:46PM +0800, Icenowy Zheng wrote: >> > > >> Allwinner H3 features a thermal sensor like the one in A33, >but has >> > > >its >> > > >> register re-arranged, the clock divider moved to CCU >(originally the >> > > >> clock divider is in ADC) and added a pair of bus clock and >reset=2E >> > > >> >> > > >> Update the binding document to cover H3=2E >> > > >> >> > > >> Signed-off-by: Icenowy Zheng >> > > >> Reviewed-by: Chen-Yu Tsai >> > > >> --- >> > > >> Changes in v4: >> > > >> - Add nvmem calibration data (not yet used by the driver) >> > > >> Changes in v3: >> > > >> - Clock name changes=2E >> > > >> - Example node name changes=2E >> > > >> - Add interupts (not yet used by the driver)=2E >> > > >> >> > > >> =2E=2E=2E/devicetree/bindings/mfd/sun4i-gpadc=2Etxt | 30 >> > > >++++++++++++++++++++-- >> > > >> 1 file changed, 28 insertions(+), 2 deletions(-) >> > > >> >> > > >> diff --git >a/Documentation/devicetree/bindings/mfd/sun4i-gpadc=2Etxt >> > > >b/Documentation/devicetree/bindings/mfd/sun4i-gpadc=2Etxt >> > > >> index badff3611a98=2E=2E6c470d584bf9 100644 >> > > >> --- a/Documentation/devicetree/bindings/mfd/sun4i-gpadc=2Etxt >> > > >> +++ b/Documentation/devicetree/bindings/mfd/sun4i-gpadc=2Etxt >> > > >> @@ -4,12 +4,26 @@ The Allwinner SoCs all have an ADC that can >also >> > > >act as a thermal sensor >> > > >> and sometimes as a touchscreen controller=2E >> > > >> >> > > >> Required properties: >> > > >> - - compatible: "allwinner,sun8i-a33-ths", >> > > >> + - compatible: must contain one of the following >compatibles: >> > > >> + - "allwinner,sun8i-a33-ths" >> > > >> + - "allwinner,sun8i-h3-ths" >> > > >> - reg: mmio address range of the chip, >> > > >> - #thermal-sensor-cells: shall be 0, >> > > >> - #io-channel-cells: shall be 0, >> > > >> >> > > >> -Example: >> > > >> +Optional properties: >> > > >> + - nvmem-cells: A phandle to the calibration data provided >by a >> > > >nvmem device=2E >> > > >> + If unspecified default values shall be used=2E >> > > >> + - nvmem-cell-names: Should be "calibration-data" >> > > > >> > > >I'd prefer to have which sensor it applies to here=2E It wouldn't >change >> > > >anything for the H3, but it definitely does for example for the >A83t >> > > >that has two sensors, one for each cluster, and one for the GPU, >each >> > > >with calibration data=2E >> > > > >> > > >What about cluster0-calibration? >>=20 >> I prefer sensor0-calibration to sensor3-calibration now=2E >> (Theortically the new generation THS can support up to 4 sensors) > >The mapping that explains what sensor0 means can change in the >future=2E It's better to be explicit here, and just say upfront what >it's about=2E I think for some SoC (e=2Eg=2E A64) there's no clear explain on the functions of the sensors=2E In addition, in the THS controller the sensors has a explicit sequence, and when referencing it in the DT the number is still needed (in thermal zones)=2E > >Maxime From mboxrd@z Thu Jan 1 00:00:00 1970 From: icenowy@aosc.io (Icenowy Zheng) Date: Wed, 20 Sep 2017 16:04:02 +0800 Subject: [linux-sunxi] Re: [PATCH v4 1/6] dt-bindings: update the Allwinner GPADC device tree binding for H3 In-Reply-To: <20170920075223.jaeswlhcqgu4yhse@flea.home> References: <20170914145251.21784-1-icenowy@aosc.io> <20170914145251.21784-2-icenowy@aosc.io> <20170918073336.j7finend3g76chsu@flea.lan> <310CE549-B8CE-4C0C-95B1-B545E38BDAF5@aosc.io> <20170918083045.7bfiialtbm7w6i7j@flea.lan> <20170920075223.jaeswlhcqgu4yhse@flea.home> Message-ID: <27449039-F0D4-4663-B596-C95D4408D471@aosc.io> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org ? 2017?9?20? GMT+08:00 ??3:52:23, Maxime Ripard ??: >On Mon, Sep 18, 2017 at 03:47:25PM +0000, icenowy at aosc.io wrote: >> ? 2017-09-18 16:30?Maxime Ripard ??? >> > On Mon, Sep 18, 2017 at 03:36:43PM +0800, Icenowy Zheng wrote: >> > > ? 2017?9?18? GMT+08:00 ??3:33:36, Maxime Ripard >> > > ??: >> > > >On Thu, Sep 14, 2017 at 10:52:46PM +0800, Icenowy Zheng wrote: >> > > >> Allwinner H3 features a thermal sensor like the one in A33, >but has >> > > >its >> > > >> register re-arranged, the clock divider moved to CCU >(originally the >> > > >> clock divider is in ADC) and added a pair of bus clock and >reset. >> > > >> >> > > >> Update the binding document to cover H3. >> > > >> >> > > >> Signed-off-by: Icenowy Zheng >> > > >> Reviewed-by: Chen-Yu Tsai >> > > >> --- >> > > >> Changes in v4: >> > > >> - Add nvmem calibration data (not yet used by the driver) >> > > >> Changes in v3: >> > > >> - Clock name changes. >> > > >> - Example node name changes. >> > > >> - Add interupts (not yet used by the driver). >> > > >> >> > > >> .../devicetree/bindings/mfd/sun4i-gpadc.txt | 30 >> > > >++++++++++++++++++++-- >> > > >> 1 file changed, 28 insertions(+), 2 deletions(-) >> > > >> >> > > >> diff --git >a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt >> > > >b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt >> > > >> index badff3611a98..6c470d584bf9 100644 >> > > >> --- a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt >> > > >> +++ b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt >> > > >> @@ -4,12 +4,26 @@ The Allwinner SoCs all have an ADC that can >also >> > > >act as a thermal sensor >> > > >> and sometimes as a touchscreen controller. >> > > >> >> > > >> Required properties: >> > > >> - - compatible: "allwinner,sun8i-a33-ths", >> > > >> + - compatible: must contain one of the following >compatibles: >> > > >> + - "allwinner,sun8i-a33-ths" >> > > >> + - "allwinner,sun8i-h3-ths" >> > > >> - reg: mmio address range of the chip, >> > > >> - #thermal-sensor-cells: shall be 0, >> > > >> - #io-channel-cells: shall be 0, >> > > >> >> > > >> -Example: >> > > >> +Optional properties: >> > > >> + - nvmem-cells: A phandle to the calibration data provided >by a >> > > >nvmem device. >> > > >> + If unspecified default values shall be used. >> > > >> + - nvmem-cell-names: Should be "calibration-data" >> > > > >> > > >I'd prefer to have which sensor it applies to here. It wouldn't >change >> > > >anything for the H3, but it definitely does for example for the >A83t >> > > >that has two sensors, one for each cluster, and one for the GPU, >each >> > > >with calibration data. >> > > > >> > > >What about cluster0-calibration? >> >> I prefer sensor0-calibration to sensor3-calibration now. >> (Theortically the new generation THS can support up to 4 sensors) > >The mapping that explains what sensor0 means can change in the >future. It's better to be explicit here, and just say upfront what >it's about. I think for some SoC (e.g. A64) there's no clear explain on the functions of the sensors. In addition, in the THS controller the sensors has a explicit sequence, and when referencing it in the DT the number is still needed (in thermal zones). > >Maxime