From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thomas Monjalon Subject: Re: [PATCH v9 0/3] support c11 memory model barrier in librte_ring Date: Mon, 29 Jan 2018 16:11:39 +0100 Message-ID: <2756445.xh3I1VZFvI@xps> References: <1516161831-28719-1-git-send-email-hejianet@gmail.com> <1516596088-10364-1-git-send-email-hejianet@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7Bit Cc: dev@dpdk.org, Hemant Agrawal , Jerin Jacob , Jianbo Liu , Jan Viktorin , Olivier Matz , konstantin.ananyev@intel.com, bruce.richardson@intel.com To: Jia He Return-path: Received: from out3-smtp.messagingengine.com (out3-smtp.messagingengine.com [66.111.4.27]) by dpdk.org (Postfix) with ESMTP id 062DC1B680 for ; Mon, 29 Jan 2018 16:12:27 +0100 (CET) In-Reply-To: <1516596088-10364-1-git-send-email-hejianet@gmail.com> List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" 22/01/2018 05:41, Jia He: > There are 2 model barrier options in librte_ring suggested by Jerin: > 1. use rte_smp_rmb > 2. use load_acquire/store_release > > CONFIG_RTE_RING_USE_C11_MEM_MODEL is provided for supporting C11 memory > model barrier in librte_ring. By default it is "y" on arm64, "n" on any > other architectures so far. > > Already fuctionally tested on the machines as follows: > - on X86 > - on arm64 with CONFIG_RTE_RING_USE_C11_MEM_MODEL=y > - on arm64 with CONFIG_RTE_RING_USE_C11_MEM_MODEL=n Applied, thanks