From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41140) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fOTzV-0003Mq-4i for qemu-devel@nongnu.org; Thu, 31 May 2018 16:16:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fOTzU-0007l3-3K for qemu-devel@nongnu.org; Thu, 31 May 2018 16:16:09 -0400 References: <20180516152026.2920-1-shameerali.kolothum.thodi@huawei.com> <20180516152026.2920-6-shameerali.kolothum.thodi@huawei.com> <20180528170226.3ynif3r34yejf7tp@kamzik.brq.redhat.com> From: Auger Eric Message-ID: <27825c1d-07a2-f03e-477a-03e3d778ac35@redhat.com> Date: Thu, 31 May 2018 22:15:56 +0200 MIME-Version: 1.0 In-Reply-To: <20180528170226.3ynif3r34yejf7tp@kamzik.brq.redhat.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [RFC v2 5/6] hw/arm: ACPI SRAT changes to accommodate non-contiguous mem List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Andrew Jones , Shameer Kolothum Cc: peter.maydell@linaro.org, zhaoshenglong@huawei.com, linuxarm@huawei.com, qemu-devel@nongnu.org, alex.williamson@redhat.com, qemu-arm@nongnu.org, jonathan.cameron@huawei.com, imammedo@redhat.com Hi Shameer, On 05/28/2018 07:02 PM, Andrew Jones wrote: > On Wed, May 16, 2018 at 04:20:25PM +0100, Shameer Kolothum wrote: >> This is in preparation for the next patch where initial ram is split >> into a non-pluggable chunk and a pc-dimm modeled mem if the vaild >> iova regions are non-contiguous. >> >> Signed-off-by: Shameer Kolothum >> --- >> hw/arm/virt-acpi-build.c | 24 ++++++++++++++++++++---- >> 1 file changed, 20 insertions(+), 4 deletions(-) >> >> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c >> index c7c6a57..8d17b40 100644 >> --- a/hw/arm/virt-acpi-build.c >> +++ b/hw/arm/virt-acpi-build.c >> @@ -488,7 +488,7 @@ build_srat(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) >> AcpiSratProcessorGiccAffinity *core; >> AcpiSratMemoryAffinity *numamem; >> int i, srat_start; >> - uint64_t mem_base; >> + uint64_t mem_base, mem_sz, mem_len; >> MachineClass *mc = MACHINE_GET_CLASS(vms); >> const CPUArchIdList *cpu_list = mc->possible_cpu_arch_ids(MACHINE(vms)); >> >> @@ -505,12 +505,28 @@ build_srat(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) >> core->flags = cpu_to_le32(1); >> } >> >> - mem_base = vms->memmap[VIRT_MEM].base; >> + mem_base = vms->bootinfo.loader_start; >> + mem_sz = vms->bootinfo.loader_start; > > mem_sz = vms->bootinfo.ram_size; > > Assuming the DT generator was correct, meaning bootinfo.ram_size will > be the size of the non-pluggable dimm. > > >> for (i = 0; i < nb_numa_nodes; ++i) { >> numamem = acpi_data_push(table_data, sizeof(*numamem)); >> - build_srat_memory(numamem, mem_base, numa_info[i].node_mem, i, >> + mem_len = MIN(numa_info[i].node_mem, mem_sz); >> + build_srat_memory(numamem, mem_base, mem_len, i, >> MEM_AFFINITY_ENABLED); >> - mem_base += numa_info[i].node_mem; >> + mem_base += mem_len; >> + mem_sz -= mem_len; >> + if (!mem_sz) { >> + break; >> + } >> + } >> + >> + /* Create table for initial pc-dimm ram, if any */ >> + if (vms->bootinfo.dimm_mem) { >> + numamem = acpi_data_push(table_data, sizeof(*numamem)); >> + build_srat_memory(numamem, vms->bootinfo.dimm_mem->base, >> + vms->bootinfo.dimm_mem->size, >> + vms->bootinfo.dimm_mem->node, >> + MEM_AFFINITY_ENABLED); If my understanding is correct the SRAT table is built only if nb_numa_nodes > 0. I don't get how the PC-DIMM region is exposed if NUMA nodes are not set? Thanks Eric >> + >> } >> >> build_header(linker, table_data, (void *)(table_data->data + srat_start), >> -- >> 2.7.4 >> >> >> >