From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:36955) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QNieY-0000C1-Bc for qemu-devel@nongnu.org; Sat, 21 May 2011 05:39:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QNieX-0004IJ-IJ for qemu-devel@nongnu.org; Sat, 21 May 2011 05:39:22 -0400 Received: from fmmailgate02.web.de ([217.72.192.227]:50298) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QNieX-0004IF-2n for qemu-devel@nongnu.org; Sat, 21 May 2011 05:39:21 -0400 Message-Id: <27B8983F-C159-4D58-8F1C-8F608A0E4CD2@web.de> From: =?ISO-8859-1?Q?Andreas_F=E4rber?= In-Reply-To: <59FF36D6-4D4B-46BB-8906-27D4B87B1F37@suse.de> Content-Type: text/plain; charset=ISO-8859-1; format=flowed; delsp=yes Content-Transfer-Encoding: quoted-printable Mime-Version: 1.0 (Apple Message framework v936) Date: Sat, 21 May 2011 11:39:18 +0200 References: <1305862499-12328-1-git-send-email-david@gibson.dropbear.id.au> <4645A3FE-8472-4688-9596-4EA973821BFF@web.de> <59FF36D6-4D4B-46BB-8906-27D4B87B1F37@suse.de> Sender: andreas.faerber@web.de Subject: Re: [Qemu-devel] [PATCH] Fix a bug in mtsr/mtsrin emulation on ppc64 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf Cc: Kenneth Salerno , "paulus@samba.org" , QEMU-devel Developers , David Gibson Am 21.05.2011 um 03:58 schrieb Alexander Graf: > Am 21.05.2011 um 00:37 schrieb Andreas F=E4rber =20 > : > >> Am 20.05.2011 um 09:40 schrieb Alexander Graf: >> >>> On 20.05.2011, at 05:34, David Gibson wrote: >>> >>>> Early ppc64 CPUs include a hack to partially simulate the ppc32 =20 >>>> segment >>>> registers, by translating writes to them into writes to the SLB. =20= >>>> This is >>>> not used by any current Linux kernel, but it is used by the =20 >>>> openbios used >>>> in the qemu mac99 model. >>>> >>>> Commit 81762d6dd0d430d87024f2c83e9c4dcc4329fb7d, cleaning up the =20= >>>> SLB >>>> handling introduced a bug in this code, breaking the openbios =20 >>>> currently in >>>> qemu. Specifically, there was an off by one error bitshuffling the >>>> register format used by mtsr into the format needed for the SLB =20 >>>> load, >>>> causing the flag bits to end up in the wrong place. This caused =20= >>>> the >>>> storage keys to be wrong under openbios, meaning that the =20 >>>> translation code >>>> incorrectly thought a legitimate access was a permission violation. >>>> >>>> This patch fixes the bug, at the same time it fixes some build =20 >>>> bug in the >>>> MMU debugging code (only exposed when DEBUG_MMU is enabled). >>> >>> Thanks, applied to ppc-next :) >> >> Nack, this does not fix ppc64 for me! How did you test it, Alex??? > > I booted a ppc64 kernel on a ppc64 Linux system with tcg and it =20 > booted fine for me. Maybe you're hitting yet another issue? Which OpenBIOS did you use? The 32-bit version using mtsrin works now, =20= but not the 64-bit HEAD version that I attached, which uses slb* =20 instructions instead. Andreas=