From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41355) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ehPWM-0005zD-2p for qemu-devel@nongnu.org; Thu, 01 Feb 2018 19:49:08 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ehPVH-0000Xn-VU for qemu-devel@nongnu.org; Thu, 01 Feb 2018 19:48:02 -0500 Received: from mail-co1nam03on0052.outbound.protection.outlook.com ([104.47.40.52]:26673 helo=NAM03-CO1-obe.outbound.protection.outlook.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ehPVH-0000WB-HN for qemu-devel@nongnu.org; Thu, 01 Feb 2018 19:46:55 -0500 From: Alistair Francis Date: Thu, 1 Feb 2018 16:42:07 -0800 Message-ID: <27f3505be8815decc8566040654592c1e26c0b2b.1517532021.git.alistair.francis@xilinx.com> In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH v5 2/6] netduino2: Specify the valid CPUs List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: alistair.francis@xilinx.com, alistair23@gmail.com, ehabkost@redhat.com, marcel@redhat.com, imammedo@redhat.com, f4bug@amsat.org, peter.maydell@linaro.org List all possible valid CPU options. Although the board only ever has a Cortex-M3 we mark the Cortex-M4 as supported because the Netduino2 Plus supports the Cortex-M4 and the Netduino2 Plus is similar to the Netduino2. Signed-off-by: Alistair Francis Reviewed-by: Eduardo Habkost Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- V5: - Use cpu_model names V3: - Add static property V2: - Fixup allignment RFC v2: - Use a NULL terminated list - Add the Cortex-M4 for testing hw/arm/netduino2.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/hw/arm/netduino2.c b/hw/arm/netduino2.c index f936017d4a..91c925a56c 100644 --- a/hw/arm/netduino2.c +++ b/hw/arm/netduino2.c @@ -34,18 +34,26 @@ static void netduino2_init(MachineState *machine) DeviceState *dev; =20 dev =3D qdev_create(NULL, TYPE_STM32F205_SOC); - qdev_prop_set_string(dev, "cpu-type", ARM_CPU_TYPE_NAME("cortex-m3")); + qdev_prop_set_string(dev, "cpu-type", machine->cpu_type); object_property_set_bool(OBJECT(dev), true, "realized", &error_fatal); =20 armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename, FLASH_SIZE); } =20 +static const char *netduino_valid_cpus[] =3D { + "cortex-m3", + "cortex-m4", + NULL +}; + static void netduino2_machine_init(MachineClass *mc) { mc->desc =3D "Netduino 2 Machine"; mc->init =3D netduino2_init; mc->ignore_memory_transaction_failures =3D true; + mc->default_cpu_type =3D ARM_CPU_TYPE_NAME("cortex-m3"); + mc->valid_cpu_types =3D netduino_valid_cpus; } =20 DEFINE_MACHINE("netduino2", netduino2_machine_init) --=20 2.14.1