From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753740AbcBJUlK (ORCPT ); Wed, 10 Feb 2016 15:41:10 -0500 Received: from mout.kundenserver.de ([212.227.126.134]:55273 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753701AbcBJUlI (ORCPT ); Wed, 10 Feb 2016 15:41:08 -0500 From: Arnd Bergmann To: Paul Burton Cc: Bharat Kumar Gogada , "bhelgaas@google.com" , Michal Simek , "lorenzo.pieralisi@arm.com" , "yinghai@kernel.org" , "wangyijing@huawei.com" , "robh@kernel.org" , "russell.joyce@york.ac.uk" , Soren Brinkmann , "jiang.liu@linux.intel.com" , "pawel.moll@arm.com" , "mark.rutland@arm.com" , "ijc+devicetree@hellion.org.uk" , "galak@codeaurora.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linux-pci@vger.kernel.org" , Ravikiran Gummaluri Subject: Re: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze Date: Wed, 10 Feb 2016 21:40:11 +0100 Message-ID: <2818168.2fmZIs86hN@wuerfel> User-Agent: KMail/4.11.5 (Linux/3.16.0-10-generic; KDE/4.11.5; x86_64; ; ) In-Reply-To: <20160210172707.GA29590@NP-P-BURTON> References: <1455014518-8708-1-git-send-email-bharatku@xilinx.com> <8520D5D51A55D047800579B09414719825881780@XAP-PVEXMBX01.xlnx.xilinx.com> <20160210172707.GA29590@NP-P-BURTON> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Provags-ID: V03:K0:fGswVpr9exWPLEfp9JgDt8AQBQUpQKEO5B5jKsCkBnw+08GS31d XCXg3G5EQWXxevBaCtaaYec5VM8fKDY4R4MMYsko4qRpxu282RwpV+SZjvgSPLW+d7ew6wD hRts8Kmo2U8FPwID2xmF/0Wgq21UpkN8PIOtW7bRQFEnqAYtl8nOCENJ5FlAbP3c7f3ORnR aGONxbKSzQRN7rp7VbR1A== X-UI-Out-Filterresults: notjunk:1;V01:K0:wH7IQMDCx/s=:Y6qqptYoY6eo+UiUcOwCwY C4L9/bcNyasuew28N9ChGnD9vvUZIoxCNaAKH2UI0Qc/725yKpB8Aw2TaZQqTa+uV/ibHN/G7 9CQ2yM+HO9KtLrajx9vIFQniJF+I4UxxmvyRiSSq8uCV8tViukdj4Bwe3KAWa7V3V7geOPTDY uBtuPWIKTY8jaVoU14ZMNMrsPXwKbV6c3H3sZUCWF9ElVG+PociUeUNkpabJ4Aw+e1TNlf6nR NB29k/b6S1FEZao8Sdyv4WwdTHNfKIj/nl7HbHoMW5fDSbamBd/or8DfNktDd9vctXIZUjI9A sMTSmOJNVfOrNDFqs7EjClWJmIQhD6xy6Je+dLdUquqVIFvMKHlQuOuhi0xgVgZ3puoVsLWGQ xCT6zgImb5zkKs1CE4H0KZwM/Zvh+0Ikwh5nxya/2mK1nyml2SGU0wSGYBi4wARu+CnSmVLS3 kTyhWjg+OqU0ybMbMasSR3pM13L6hm9prhhCVuIkr+p+WBGDmDVNg9kfiZaR3bZCqle06ahnc W+2+CYC/kTHS6z3tw6TsXaelnj0qYSIp/ke61jaCq5rkksX9Y9BgO9s+vKm+ASy3Cg37N5jgN lnkZDia5uU2r05nePNLRWMu3ZQumrdejA5EXGYuMnadZS155nOZWg5p7yIr4TZMwU64zs824b hm+pqMzKVbRTAUoGc4jhsLdnAqMn3EQiwTm64m2kTf/ZuUO3EipH+Uyr0ODacPHdQyunfomx+ Ryue4RoMbJUAIYYS Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wednesday 10 February 2016 09:27:07 Paul Burton wrote: > On Wed, Feb 10, 2016 at 05:55:51AM +0000, Bharat Kumar Gogada wrote: > > > On Tue, Feb 09, 2016 at 04:11:56PM +0530, Bharat Kumar Gogada wrote: > > > > Modifying Xilinx AXI PCIe Host Bridge Soft IP driver to work on both > > > > Zynq and Microblaze Architectures. > > > > With these modifications drivers/pci/host/pcie-xilinx.c, will work on > > > > both Zynq and Microblaze Architectures. > > > > > > > > Signed-off-by: Bharat Kumar Gogada > > > > Signed-off-by: Ravi Kiran Gummaluri > > > > --- > > > > Changes: > > > > Removed unneccessary architecture dependent number of MSI's. > > > > Added #ifdef to pci_fixup_irqs which is ARM specific API. > > > > > > Hi Bharat, > > > > > > Why do you say pci_fixup_irqs is ARM-specific? It's declared in > > > include/linux/pci.h, defined in drivers/pci/setup-irq.c & used by multiple > > > architectures (alpha, arm, m68k, mips, sh, sparc, tile, > > > unicore32 from a quick grep). > > > > > > Will you not break INTX-style interrupts by removing this? > > > > > I meant to say ARM specific w.r.t Microblaze architecture, which is > > what this patch series are for. This has been already discussed in my > > previous patch by Arnd Bergmann and Lorenzo Pieralisi . > > (https://lkml.org/lkml/2016/1/12/707) > > Hi Bharat, > > Ok, so you don't need it for microblaze but do need it for zynq/ARM. We > also need it for MIPS, where my recent patches enable this driver. So if > #ifdef'ing this is the current way forwards could you please invert the > condition to #ifndef CONFIG_MICROBLAZE? I think we are getting to the point where we should try much harder to make sure nobody needs that hack and it all works out of the box. Arnd From mboxrd@z Thu Jan 1 00:00:00 1970 From: Arnd Bergmann Subject: Re: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze Date: Wed, 10 Feb 2016 21:40:11 +0100 Message-ID: <2818168.2fmZIs86hN@wuerfel> References: <1455014518-8708-1-git-send-email-bharatku@xilinx.com> <8520D5D51A55D047800579B09414719825881780@XAP-PVEXMBX01.xlnx.xilinx.com> <20160210172707.GA29590@NP-P-BURTON> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7Bit Return-path: In-Reply-To: <20160210172707.GA29590@NP-P-BURTON> Sender: linux-kernel-owner@vger.kernel.org To: Paul Burton Cc: Bharat Kumar Gogada , "bhelgaas@google.com" , Michal Simek , "lorenzo.pieralisi@arm.com" , "yinghai@kernel.org" , "wangyijing@huawei.com" , "robh@kernel.org" , "russell.joyce@york.ac.uk" , Soren Brinkmann , "jiang.liu@linux.intel.com" , "pawel.moll@arm.com" , "mark.rutland@arm.com" , "ijc+devicetree@hellion.org.uk" , "galak@codeaurora.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" linu List-Id: devicetree@vger.kernel.org On Wednesday 10 February 2016 09:27:07 Paul Burton wrote: > On Wed, Feb 10, 2016 at 05:55:51AM +0000, Bharat Kumar Gogada wrote: > > > On Tue, Feb 09, 2016 at 04:11:56PM +0530, Bharat Kumar Gogada wrote: > > > > Modifying Xilinx AXI PCIe Host Bridge Soft IP driver to work on both > > > > Zynq and Microblaze Architectures. > > > > With these modifications drivers/pci/host/pcie-xilinx.c, will work on > > > > both Zynq and Microblaze Architectures. > > > > > > > > Signed-off-by: Bharat Kumar Gogada > > > > Signed-off-by: Ravi Kiran Gummaluri > > > > --- > > > > Changes: > > > > Removed unneccessary architecture dependent number of MSI's. > > > > Added #ifdef to pci_fixup_irqs which is ARM specific API. > > > > > > Hi Bharat, > > > > > > Why do you say pci_fixup_irqs is ARM-specific? It's declared in > > > include/linux/pci.h, defined in drivers/pci/setup-irq.c & used by multiple > > > architectures (alpha, arm, m68k, mips, sh, sparc, tile, > > > unicore32 from a quick grep). > > > > > > Will you not break INTX-style interrupts by removing this? > > > > > I meant to say ARM specific w.r.t Microblaze architecture, which is > > what this patch series are for. This has been already discussed in my > > previous patch by Arnd Bergmann and Lorenzo Pieralisi . > > (https://lkml.org/lkml/2016/1/12/707) > > Hi Bharat, > > Ok, so you don't need it for microblaze but do need it for zynq/ARM. We > also need it for MIPS, where my recent patches enable this driver. So if > #ifdef'ing this is the current way forwards could you please invert the > condition to #ifndef CONFIG_MICROBLAZE? I think we are getting to the point where we should try much harder to make sure nobody needs that hack and it all works out of the box. Arnd From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: From: Arnd Bergmann To: Paul Burton Cc: Bharat Kumar Gogada , "bhelgaas@google.com" , Michal Simek , "lorenzo.pieralisi@arm.com" , "yinghai@kernel.org" , "wangyijing@huawei.com" , "robh@kernel.org" , "russell.joyce@york.ac.uk" , Soren Brinkmann , "jiang.liu@linux.intel.com" , "pawel.moll@arm.com" , "mark.rutland@arm.com" , "ijc+devicetree@hellion.org.uk" , "galak@codeaurora.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linux-pci@vger.kernel.org" , Ravikiran Gummaluri Subject: Re: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze Date: Wed, 10 Feb 2016 21:40:11 +0100 Message-ID: <2818168.2fmZIs86hN@wuerfel> In-Reply-To: <20160210172707.GA29590@NP-P-BURTON> References: <1455014518-8708-1-git-send-email-bharatku@xilinx.com> <8520D5D51A55D047800579B09414719825881780@XAP-PVEXMBX01.xlnx.xilinx.com> <20160210172707.GA29590@NP-P-BURTON> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Sender: linux-kernel-owner@vger.kernel.org List-ID: On Wednesday 10 February 2016 09:27:07 Paul Burton wrote: > On Wed, Feb 10, 2016 at 05:55:51AM +0000, Bharat Kumar Gogada wrote: > > > On Tue, Feb 09, 2016 at 04:11:56PM +0530, Bharat Kumar Gogada wrote: > > > > Modifying Xilinx AXI PCIe Host Bridge Soft IP driver to work on both > > > > Zynq and Microblaze Architectures. > > > > With these modifications drivers/pci/host/pcie-xilinx.c, will work on > > > > both Zynq and Microblaze Architectures. > > > > > > > > Signed-off-by: Bharat Kumar Gogada > > > > Signed-off-by: Ravi Kiran Gummaluri > > > > --- > > > > Changes: > > > > Removed unneccessary architecture dependent number of MSI's. > > > > Added #ifdef to pci_fixup_irqs which is ARM specific API. > > > > > > Hi Bharat, > > > > > > Why do you say pci_fixup_irqs is ARM-specific? It's declared in > > > include/linux/pci.h, defined in drivers/pci/setup-irq.c & used by multiple > > > architectures (alpha, arm, m68k, mips, sh, sparc, tile, > > > unicore32 from a quick grep). > > > > > > Will you not break INTX-style interrupts by removing this? > > > > > I meant to say ARM specific w.r.t Microblaze architecture, which is > > what this patch series are for. This has been already discussed in my > > previous patch by Arnd Bergmann and Lorenzo Pieralisi . > > (https://lkml.org/lkml/2016/1/12/707) > > Hi Bharat, > > Ok, so you don't need it for microblaze but do need it for zynq/ARM. We > also need it for MIPS, where my recent patches enable this driver. So if > #ifdef'ing this is the current way forwards could you please invert the > condition to #ifndef CONFIG_MICROBLAZE? I think we are getting to the point where we should try much harder to make sure nobody needs that hack and it all works out of the box. Arnd From mboxrd@z Thu Jan 1 00:00:00 1970 From: arnd@arndb.de (Arnd Bergmann) Date: Wed, 10 Feb 2016 21:40:11 +0100 Subject: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze In-Reply-To: <20160210172707.GA29590@NP-P-BURTON> References: <1455014518-8708-1-git-send-email-bharatku@xilinx.com> <8520D5D51A55D047800579B09414719825881780@XAP-PVEXMBX01.xlnx.xilinx.com> <20160210172707.GA29590@NP-P-BURTON> Message-ID: <2818168.2fmZIs86hN@wuerfel> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Wednesday 10 February 2016 09:27:07 Paul Burton wrote: > On Wed, Feb 10, 2016 at 05:55:51AM +0000, Bharat Kumar Gogada wrote: > > > On Tue, Feb 09, 2016 at 04:11:56PM +0530, Bharat Kumar Gogada wrote: > > > > Modifying Xilinx AXI PCIe Host Bridge Soft IP driver to work on both > > > > Zynq and Microblaze Architectures. > > > > With these modifications drivers/pci/host/pcie-xilinx.c, will work on > > > > both Zynq and Microblaze Architectures. > > > > > > > > Signed-off-by: Bharat Kumar Gogada > > > > Signed-off-by: Ravi Kiran Gummaluri > > > > --- > > > > Changes: > > > > Removed unneccessary architecture dependent number of MSI's. > > > > Added #ifdef to pci_fixup_irqs which is ARM specific API. > > > > > > Hi Bharat, > > > > > > Why do you say pci_fixup_irqs is ARM-specific? It's declared in > > > include/linux/pci.h, defined in drivers/pci/setup-irq.c & used by multiple > > > architectures (alpha, arm, m68k, mips, sh, sparc, tile, > > > unicore32 from a quick grep). > > > > > > Will you not break INTX-style interrupts by removing this? > > > > > I meant to say ARM specific w.r.t Microblaze architecture, which is > > what this patch series are for. This has been already discussed in my > > previous patch by Arnd Bergmann and Lorenzo Pieralisi . > > (https://lkml.org/lkml/2016/1/12/707) > > Hi Bharat, > > Ok, so you don't need it for microblaze but do need it for zynq/ARM. We > also need it for MIPS, where my recent patches enable this driver. So if > #ifdef'ing this is the current way forwards could you please invert the > condition to #ifndef CONFIG_MICROBLAZE? I think we are getting to the point where we should try much harder to make sure nobody needs that hack and it all works out of the box. Arnd