From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S967431AbcA1REO (ORCPT ); Thu, 28 Jan 2016 12:04:14 -0500 Received: from gloria.sntech.de ([95.129.55.99]:42402 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965376AbcA1REJ (ORCPT ); Thu, 28 Jan 2016 12:04:09 -0500 From: Heiko =?ISO-8859-1?Q?St=FCbner?= To: Shawn Lin Cc: Michael Turquette , Stephen Boyd , linux-clk@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Xing Zheng , Jeffy Chen Subject: Re: [PATCH] clk: rockchip: fix wrong mmc phase shift for rk3228 Date: Thu, 28 Jan 2016 18:04:01 +0100 Message-ID: <2854115.dRPO4ABWrL@diego> User-Agent: KMail/4.14.10 (Linux/4.2.0-1-amd64; KDE/4.14.14; x86_64; ; ) In-Reply-To: <1453779018-30666-1-git-send-email-shawn.lin@rock-chips.com> References: <1453779018-30666-1-git-send-email-shawn.lin@rock-chips.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Am Dienstag, 26. Januar 2016, 11:30:18 schrieb Shawn Lin: > mmc sample shift is 0 for rk3228 refer to user manaul. > So it's broken if we enable mmc tuning for rk3228. > > Fixes: 307a2e9ac ("clk: rockchip: add clock controller for rk3228") > Cc: Xing Zheng > Cc: Jeffy Chen > Signed-off-by: Shawn Lin applied to my clk branch for 4.6 with Xing's review Thanks Heiko