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Wed, 9 Feb 2022 08:38:59 +0900 (KST) Received: from [10.113.113.235] (unknown [10.113.113.235]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20220208233859epsmtip21d551e51dfed93e28562474f6838312a~R8_1JBjcR0384903849epsmtip2Q; Tue, 8 Feb 2022 23:38:59 +0000 (GMT) Message-ID: <29078ba4-d332-15c4-7a7a-8b24d1332983@samsung.com> Date: Wed, 9 Feb 2022 08:39:51 +0900 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [PATCH v4 3/4] rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3399 Content-Language: en-US To: Alper Nebi Yasak , u-boot@lists.denx.de Cc: Jack Mitchell , Kever Yang , Heinrich Schuchardt , Yifeng Zhao , Samuel Dionne-Riel , Simon Glass , Aswath Govindraju , Philipp Tomsich , Ashok Reddy Soma , Stephen Carlson , Michal Simek , Faiz Abbas , Jagan Teki , Peng Fan , Peter Robinson From: Jaehoon Chung In-Reply-To: <20220128224240.4226-4-alpernebiyasak@gmail.com> Content-Transfer-Encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA01Te1BUZRz1u3vvZdG2rgss3zA1wkZMOvG4sIsXBMZ45NVqhtEmSKfgAjdA 2Ee7S/FoasWCFFTMSWTxkSZOoGYwDCwwyEuGBEMkSwYQpXbNbeOxLq+WV7tcKP47vzPnzPk9 vo/PE1pwD366XMOq5EymGN+I1nVs9fd1XUaSAlq/dqPOG/ox6qrRjFPtfVqEmqo4zKOmakpw qq70H5waN8VTtie1OPVD1TWcmquawqiiyjzqWFk+Ts3U1gHqivkCRo01H3GiOr6ZBJTRsITu 3ExftzzC6HLtPZT+8o8JjP71ZjTdoHvoRE9aPqBt9Z0I/fOwHtDV43qEXtS1oHTXQD1CNwyN InSzdR6NFezPCEtjmRRW5cnKkxUp6fLUcPGb+xKiEqTBAaQvGUJtF3vKGRkbLo5+K9b3jfRM +3Riz4+ZzCw7Fcuo1WL/iDCVIkvDeqYp1JpwMatMyVRKlX5qRqbOkqf6yVlNKBkQECi1CxMz 0nr/nsWV3T7Z0w8uYVrQuOUocOZDQgJHLN28o2AjX0joATyx3I1xxTMAHz/R4w6VkLAC2Ncv WXO0Ft7COVEjgDerbauOCQDnvzDxHCoBEQFPVJ9xcmCU8IZzLRcxjt8Mb5cZUAd2I+Kh6dYi 4sAuxAE48mcFcGAe4Q4HDRdWeFciBhZMH0EdATzCiMK2vsIVM068ButnulZEzkQ4nBmZRTnz Flg/dnZlIEiUOsOF5lknru9oeKqyh8dhF/hXV+0q7wGt4804ZzgMYMXlNowrigFc0j7AOVUQ bKk4ZY/j2yO2whuN/hztBRvmz622/Twcny7GHBJICOBXBUJO4g37zSZkLeuhYRnjMA0t2vug BHjp1i1Gt24BunXz6P4P/hagVUDEKtWyVFZNKqX/3TtZIasBK29/W4gelI5N+rUDhA/aAeTz xK6CF4uWGaEghcnJZVWKBFVWJqtuB1L7eU7yPNySFfbPI9ckkJKQAElwYJCEIoNJsbug6nQP IyRSGQ2bwbJKVrXmQ/jOHlrkvcT9zbtbf1GW24qcI0ZnbEVuoiW/hZ0i71D3/Iu77460Fn9a ln4GU87ND6a75MQNlkeFx3jpewt4ne/mnoSu/nubXpDsyL1yPnpTiUq2wbb98WhTGyX6LjTv c5ns/aFdOUFhk7ae55Cclwf3SDrnji8EvTL0YXYcm2Q0pUW8bYo3HxqIMYzdsETESUXfn1YO 3Vscf508GDmx6ZzvoafXDobMe5chP2qpvZE//Y6gRuvt4U9sFfmRd66Snd29ZrIb1710fRgc wFQdO/b9FuSacLaw7rM9PncD54I7dlnbtIkbCu4UmJ/m5TQNVFpDVZc8Lh+rSbr/kc8j0TuM sfRZ8qvZUWJUncaQ23gqNfMvOh45Z4QEAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrLIsWRmVeSWpSXmKPExsWy7bCSvK7wf6Ykg7nTTCzmPbnEarH66Ws2 i0MXGpgsvixtZrb4smkCm8W26T/ZLN69jLD49WwLm8W6VWvYLH6s+sJq0b2y2qJ3ZhObxbct 2xgtlr2ez2rxdm8nu8XhqR8YLZ4++cfiIOix9uN9Vo/ZDRdZPFofv2f1uLrPxWPnrLvsHh8+ xnn82n6UyePsnR2MHhvf7WDy+DtrP4vH8RvbmTx23n7I5LH382+WAN4oLpuU1JzMstQifbsE roxzb76zFZxSq/h6fRFrA+Mu+S5GTg4JAROJA+1H2LoYuTiEBHYwSixe/Y8RIiEl8fnpVKAE B5AtLHH4cDFEzVtGidVXfjOD1PAK2En0b5zBDmKzCKhI/Ni/kBUiLihxcuYTFhBbVCBCom3Z FLB6YYFoiTXT94LFmQXEJW49mc8EYosIuEq0fe1kAVnALPCSRWLe/R3MENsOM0pcunafDaSK TUBHYvu342AdnAK2Et/ufWcBuY5ZQF1i/TwhiKHyEtvfzmGewCg0C8kds5Dsm4XQMQtJxwJG llWMkqkFxbnpucWGBUZ5qeV6xYm5xaV56XrJ+bmbGMExrqW1g3HPqg96hxiZOBgPMUpwMCuJ 8Mp0/08U4k1JrKxKLcqPLyrNSS0+xCjNwaIkznuh62S8kEB6YklqdmpqQWoRTJaJg1Oqgan5 A7/eseZtGWcUjtleP5vCuWafdBF7EPelcy2KDS3ijW6tJlxrNz0r2fVxwZa/u7kcFcxMDGPm KgX7PYnK6AnO2Ll/zymjI6kTXFYt3XuTV/S0cPrLKOG5Ykfu3xdgX5y44W3x5C0Fzi+uFnXm 7rVa72MSd6V04ZTQxtd7L+lqLWJYeGub+cqa/6dWlh7m//9dUjv2vcifpRd5r0itTj/RyVaV fMo+01ct85nk0ft9ll9+T7IJWqE4vT3kTVfUu/+PuvZYHBO+0/237c6Sxp9aRZO13foW371Y 9lr43lX7g09Llnx8rxlcn1czR2ZpRNpnH9NP8jyBKcXCqn3OIv6ZtkKbXp4+4BTkzrs2WUWJ pTgj0VCLuag4EQAsa58DYAMAAA== X-CMS-MailID: 20220208233859epcas1p16957d475f97da39fc8237a7d96664526 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: SVC_REQ_APPROVE CMS-TYPE: 101P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20220128224319epcas1p204154ca30ab67242578cdea4eaf02253 References: <20220128224240.4226-1-alpernebiyasak@gmail.com> <20220128224240.4226-4-alpernebiyasak@gmail.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean On 1/29/22 07:42, Alper Nebi Yasak wrote: > On RK3399, a register bit must be set to enable Enhanced Strobe. > Let the Rockchip SDHCI driver set it when Enhanced Strobe configuration > is requested. However, having it set makes the lower-speed modes stop > working and makes reinitialization fail, so let it be unset as needed in > set_control_reg(). > > This is mostly ported from Linux's Arasan SDHCI driver which happens > to be the underlying IP. (drivers/mmc/host/sdhci-of-arasan.c in Linux > tree). > > Signed-off-by: Alper Nebi Yasak Reviewed-by: Jaehoon Chung Best Regards, Jaehoon Chung > --- > > Changes in v4: > - Add comment for Rockchip SDHCI set_enhanced_strobe() driver data op > > Changes in v2: > - Unset ES bit in rk3399 set_control_reg() to fix a reinit issue > - Don't use unnecessary & for function pointer in ops struct > - Rename rk3399_set_enhanced_strobe -> rk3399_sdhci_set_enhanced_strobe > - Let set_enhanced_strobe() unset the ES bit if mode is not HS400_ES > > drivers/mmc/rockchip_sdhci.c | 53 ++++++++++++++++++++++++++++++++++++ > 1 file changed, 53 insertions(+) > > diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c > index b91df05de4ff..f4d5a59036a2 100644 > --- a/drivers/mmc/rockchip_sdhci.c > +++ b/drivers/mmc/rockchip_sdhci.c > @@ -42,6 +42,9 @@ > ((((x) >> PHYCTRL_DLLRDY_SHIFT) & PHYCTRL_DLLRDY_MASK) ==\ > PHYCTRL_DLLRDY_DONE) > > +#define ARASAN_VENDOR_REGISTER 0x78 > +#define ARASAN_VENDOR_ENHANCED_STROBE BIT(0) > + > /* Rockchip specific Registers */ > #define DWCMSHC_EMMC_DLL_CTRL 0x800 > #define DWCMSHC_EMMC_DLL_CTRL_RESET BIT(1) > @@ -117,6 +120,19 @@ struct sdhci_data { > * Return: 0 if successful, -ve on error > */ > int (*set_ios_post)(struct sdhci_host *host); > + > + /** > + * set_enhanced_strobe() - Set HS400 Enhanced Strobe config > + * > + * This is the set_enhanced_strobe() SDHCI operation that should > + * be used for the hardware this driver data is associated with. > + * Normally, this is used to set any host-specific configuration > + * necessary for HS400 ES. > + * > + * @host: SDHCI host structure > + * Return: 0 if successful, -ve on error > + */ > + int (*set_enhanced_strobe)(struct sdhci_host *host); > }; > > static int rk3399_emmc_phy_init(struct udevice *dev) > @@ -206,6 +222,21 @@ static int rk3399_emmc_get_phy(struct udevice *dev) > return 0; > } > > +static int rk3399_sdhci_set_enhanced_strobe(struct sdhci_host *host) > +{ > + struct mmc *mmc = host->mmc; > + u32 vendor; > + > + vendor = sdhci_readl(host, ARASAN_VENDOR_REGISTER); > + if (mmc->selected_mode == MMC_HS_400_ES) > + vendor |= ARASAN_VENDOR_ENHANCED_STROBE; > + else > + vendor &= ~ARASAN_VENDOR_ENHANCED_STROBE; > + sdhci_writel(host, vendor, ARASAN_VENDOR_REGISTER); > + > + return 0; > +} > + > static void rk3399_sdhci_set_control_reg(struct sdhci_host *host) > { > struct rockchip_sdhc *priv = container_of(host, struct rockchip_sdhc, host); > @@ -217,6 +248,15 @@ static void rk3399_sdhci_set_control_reg(struct sdhci_host *host) > rk3399_emmc_phy_power_off(priv->phy); > > sdhci_set_control_reg(host); > + > + /* > + * Reinitializing the device tries to set it to lower-speed modes > + * first, which fails if the Enhanced Strobe bit is set, making > + * the device impossible to use. Set the correct value here to > + * let reinitialization attempts succeed. > + */ > + if (CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)) > + rk3399_sdhci_set_enhanced_strobe(host); > }; > > static int rk3399_sdhci_set_ios_post(struct sdhci_host *host) > @@ -409,10 +449,22 @@ static int rockchip_sdhci_execute_tuning(struct mmc *mmc, u8 opcode) > return ret; > } > > +static int rockchip_sdhci_set_enhanced_strobe(struct sdhci_host *host) > +{ > + struct rockchip_sdhc *priv = container_of(host, struct rockchip_sdhc, host); > + struct sdhci_data *data = (struct sdhci_data *)dev_get_driver_data(priv->dev); > + > + if (data->set_enhanced_strobe) > + return data->set_enhanced_strobe(host); > + > + return -ENOTSUPP; > +} > + > static struct sdhci_ops rockchip_sdhci_ops = { > .set_ios_post = rockchip_sdhci_set_ios_post, > .platform_execute_tuning = &rockchip_sdhci_execute_tuning, > .set_control_reg = rockchip_sdhci_set_control_reg, > + .set_enhanced_strobe = rockchip_sdhci_set_enhanced_strobe, > }; > > static int rockchip_sdhci_probe(struct udevice *dev) > @@ -495,6 +547,7 @@ static const struct sdhci_data rk3399_data = { > .emmc_phy_init = rk3399_emmc_phy_init, > .set_control_reg = rk3399_sdhci_set_control_reg, > .set_ios_post = rk3399_sdhci_set_ios_post, > + .set_enhanced_strobe = rk3399_sdhci_set_enhanced_strobe, > }; > > static const struct sdhci_data rk3568_data = {