On 2021/7/16 上午12:15, Richard Henderson wrote:
> On 7/15/21 4:21 AM, LIU Zhiwei wrote:
>> Also on a side note, could you give me some advice for the following 
>> question?
>>
>> I have been supporting  running 32bit application on qemu-riscv64. 
>> After this patch set,
>> it is hard to define a  method,  such as gpr_dst_s or gpr_dst_u, to 
>> extend the destination
>> register. I can only extend the destination register(ext32s or 
>> ext32u) in each instruction
>> with scattered code.
>>
>> Can we just omit the extension of the destination register?
>
> It's hard to give advice on code that I haven't seen.
>
> In general I would think that the destination register need not be 
> extended for 32-bit mode, unless the architecture says otherwise. 
> (What does the architecture say about the contents of the registers 
> when transitioning from a 32-bit mode user program to a 64-bit mode 
> kernel?)
>
As privileged specification says,

"Whenever XLEN in any mode is set to a value less than the widest supported XLEN, all operations
must ignore source operand register bits above the configured XLEN, and must sign-extend results
to fill the entire widest supported XLEN in the destination register. Similarly, pc bits above XLEN
are ignored, and when the pc is written, it is sign-extended to fill the widest supported XLEN."

If we want to strictly obey the spec, we should
1) Ignore MSB 32bits for source register, and sign-extend the 
destination register.
2) Always use 32bit operation(TCG 32bit OP).

I want to still use TCG 64bit OP and just extend the source to 64bit by 
ext32s or ext32u.

Is is OK?

Thanks,
Zhiwei
>
> r~