From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01D16C433F5 for ; Wed, 10 Nov 2021 13:52:49 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7666A61058 for ; Wed, 10 Nov 2021 13:52:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 7666A61058 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D3BD3839B6; Wed, 10 Nov 2021 14:52:46 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1636552367; bh=IghcDZPgmJoF9rwQ1Y6d3oKpUWH7emWKOvxPqtUPVyA=; h=Date:Subject:To:Cc:References:From:In-Reply-To:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=Arb9wU3Nvn3NbCBl57CjYKTn64DxZWNIAhcStE7h9ywLzzaol1Dz5uJTdRKob6hRH lxAJ+qwPcZyiGzpvKgN67ExtlmtaOruJc4rpsZmuo4ezklGmeCbEJBKpoajNalJt9k v5GuBtIyPX7ZAVAciGlkK7/czsP22pWW85jjhNO8iGbXNZTaTSV++wumYzQqMeLaaS r1r9gJq4T1+SrSOZVq7jxeGpNDjqkSUsfeZIbhcCBWxyPdm4Qny+aHQJzEEIftu594 NZI62/vt5geXJbIhJh+J+CJfbEEoUz9ySrKDZsfvaEHgHZwn+j9vBOinZV6/crwdAn QUFJ1UmnV6mVQ== Received: by phobos.denx.de (Postfix, from userid 109) id 5D74A839B1; Wed, 10 Nov 2021 14:52:45 +0100 (CET) Received: from mout-u-204.mailbox.org (mout-u-204.mailbox.org [IPv6:2001:67c:2050:1::465:204]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 24CAA839B7 for ; Wed, 10 Nov 2021 14:52:38 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=sr@denx.de Received: from smtp1.mailbox.org (smtp1.mailbox.org [IPv6:2001:67c:2050:105:465:1:1:0]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-u-204.mailbox.org (Postfix) with ESMTPS id 4Hq5rj4vbXzQkBp; Wed, 10 Nov 2021 14:52:37 +0100 (CET) Message-ID: <298f79b5-6e80-a65d-b7b3-b4a4d1e68997@denx.de> Date: Wed, 10 Nov 2021 14:52:32 +0100 MIME-Version: 1.0 Subject: Re: [PATCH] pci: pci_mvebu: Use global MBUS_PCI_MEM_SIZE macro Content-Language: en-US To: =?UTF-8?Q?Pali_Roh=c3=a1r?= Cc: u-boot@lists.denx.de References: <20211106111612.29267-1-pali@kernel.org> From: Stefan Roese In-Reply-To: <20211106111612.29267-1-pali@kernel.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean On 06.11.21 12:16, Pali Rohár wrote: > Header file mach/cpu.h already defines MBUS_PCI_MEM_SIZE macro which > defines size of MBUS_PCI_MEM_BASE window. So use global MBUS_PCI_MEM_SIZE > macro instead of locally defined PCIE_MEM_SIZE macro. Both macros have same > definition. > > Signed-off-by: Pali Rohár Applied to u-boot-marvell/master Thanks, Stefan > --- > drivers/pci/pci_mvebu.c | 11 +++++------ > 1 file changed, 5 insertions(+), 6 deletions(-) > > diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c > index c575e9412b2a..14cd82db6ff8 100644 > --- a/drivers/pci/pci_mvebu.c > +++ b/drivers/pci/pci_mvebu.c > @@ -97,7 +97,6 @@ struct mvebu_pcie { > * and 64K of I/O space when registered. > */ > static void __iomem *mvebu_pcie_membase = (void __iomem *)MBUS_PCI_MEM_BASE; > -#define PCIE_MEM_SIZE (128 << 20) > static void __iomem *mvebu_pcie_iobase = (void __iomem *)MBUS_PCI_IO_BASE; > > static inline bool mvebu_pcie_link_up(struct mvebu_pcie *pcie) > @@ -433,14 +432,14 @@ static int mvebu_pcie_probe(struct udevice *dev) > mvebu_pcie_set_local_dev_nr(pcie, 1); > > pcie->mem.start = (u32)mvebu_pcie_membase; > - pcie->mem.end = pcie->mem.start + PCIE_MEM_SIZE - 1; > - mvebu_pcie_membase += PCIE_MEM_SIZE; > + pcie->mem.end = pcie->mem.start + MBUS_PCI_MEM_SIZE - 1; > + mvebu_pcie_membase += MBUS_PCI_MEM_SIZE; > > if (mvebu_mbus_add_window_by_id(pcie->mem_target, pcie->mem_attr, > (phys_addr_t)pcie->mem.start, > - PCIE_MEM_SIZE)) { > + MBUS_PCI_MEM_SIZE)) { > printf("PCIe unable to add mbus window for mem at %08x+%08x\n", > - (u32)pcie->mem.start, PCIE_MEM_SIZE); > + (u32)pcie->mem.start, MBUS_PCI_MEM_SIZE); > } > > pcie->io.start = (u32)mvebu_pcie_iobase; > @@ -459,7 +458,7 @@ static int mvebu_pcie_probe(struct udevice *dev) > > /* PCI memory space */ > pci_set_region(hose->regions + 0, pcie->mem.start, > - pcie->mem.start, PCIE_MEM_SIZE, PCI_REGION_MEM); > + pcie->mem.start, MBUS_PCI_MEM_SIZE, PCI_REGION_MEM); > pci_set_region(hose->regions + 1, > 0, 0, > gd->ram_size, > Viele Grüße, Stefan Roese -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de