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From: 沈梦姣 <shen.mengjiao3@icloud.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: QEMU Developers <qemu-devel@nongnu.org>,
	qemu-discuss <qemu-discuss@nongnu.org>
Subject: Re: Fill tlb for data and io address
Date: Tue, 16 Feb 2021 22:39:08 +0800	[thread overview]
Message-ID: <2D7F6EA4-5525-4F48-ACA7-B157E8A02A2A@icloud.com> (raw)
In-Reply-To: <CAFEAcA-OE+NGfbgjEuydjCfpiR_kuFVsSxYwE-PfvQSX-rzHLQ@mail.gmail.com>



> 在 2021年2月16日，下午7:48，Peter Maydell <peter.maydell@linaro.org> 写道：
> 
> On Tue, 16 Feb 2021 at 11:28, 沈梦姣 <shen.mengjiao3@icloud.com> wrote:
>> Look at the store/load helper, it will use the tlb entry to do the address translation(from guest virtual address to host virtual address) but where the tlb is filled for the data ram and io address, I know where the code ram is filled(tb_find->tb_lookup__cpu_state...)
> 
> The common QEMU code calls the target
Thanks Peter. But what’s the common code? I mean in which case the tlb_fill will be triggered, the generated code will trigger or something else? Thanks in advance.
> CPU tlb_fill function, which tries
> to translate the guest virtual address to a physical address (usually by
> walking the guest page tables). If it succeeds then will update the QEMU
> TLB by calling either tlb_set_page() or tlb_set_page_with_attrs().

> If it
> fails then it arranges to deliver a suitable exception to the guest.
This should be page fault, guest code will update page table, am I right? Thanks 
> 
> thanks
> -- PMM


  reply	other threads:[~2021-02-16 14:40 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-16 11:25 Fill tlb for data and io address 沈梦姣
2021-02-16 11:48 ` Peter Maydell
2021-02-16 14:39   ` 沈梦姣 [this message]
2021-02-16 14:41     ` Peter Maydell

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