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[95.49.29.126]) by smtp.gmail.com with ESMTPSA id a22-20020a056512201600b004b48cc444ccsm742685lfb.100.2022.11.12.05.01.41 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 12 Nov 2022 05:01:41 -0800 (PST) Message-ID: <2a912517-4b43-304a-4be6-f3d1b78e62f6@linaro.org> Date: Sat, 12 Nov 2022 14:01:40 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.4.1 Subject: Re: [PATCH 4/9] arm64: dts: qcom: sc8280xp-crd: enable NVMe SSD To: Johan Hovold Cc: Johan Hovold , Bjorn Andersson , Andy Gross , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20221110103558.12690-1-johan+linaro@kernel.org> <20221110103558.12690-5-johan+linaro@kernel.org> From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 11/11/2022 17:22, Johan Hovold wrote: > On Thu, Nov 10, 2022 at 12:06:45PM +0100, Konrad Dybcio wrote: >> On 10/11/2022 11:35, Johan Hovold wrote: >>> Enable the NVMe SSD connected to PCIe2. >>> >>> Signed-off-by: Johan Hovold >>> --- >>> arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 63 +++++++++++++++++++++++ >>> 1 file changed, 63 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts >>> + pcie2a_default: pcie2a-default-state { >> Aren't they going to be identical for all boards anyway? Maybe there >> could be some commonization.. > We had that discussion and decided that keeping the pinconfig in the dts > is the right thing to do. > > And even if the clkreq pin will be the same for all boards that's not > necessarily the case for the other two. Okay then. I simply keep forgetting which pins we concluded go where.. Konrad > >>> + clkreq-n-pins { >>> + pins = "gpio142"; >>> + function = "pcie2a_clkreq"; >>> + drive-strength = <2>; >>> + bias-pull-up; >>> + }; >>> + >>> + perst-n-pins { >>> + pins = "gpio143"; >>> + function = "gpio"; >>> + drive-strength = <2>; >>> + bias-pull-down; >>> + }; >>> + >>> + wake-n-pins { >>> + pins = "gpio145"; >>> + function = "gpio"; >>> + drive-strength = <2>; >>> + bias-pull-up; >>> + }; >>> + }; >>> + >>> qup0_i2c4_default: qup0-i2c4-default-state { >>> pins = "gpio171", "gpio172"; >>> function = "qup4"; > Johan