Re: [PATCH 08/18] drm/amdgpu: update pd shadow bo

[Edward O'Callaghan <funfunctor-dczkZgxz+BNUPWh3PAxdjQ@public.gmane.org>]

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On 08/12/2016 04:38 PM, Chunming Zhou wrote:
> Change-Id: I8d0c625c9f1c9a16b8e2e915831590be5a9a5242
> Signed-off-by: Chunming Zhou <David1.Zhou-5C7GfCeVMHo@public.gmane.org>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu.h    |  1 +
>  drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 73 +++++++++++++++++++++++-----------
>  2 files changed, 50 insertions(+), 24 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 7eb854a..73af7ba 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -884,6 +884,7 @@ struct amdgpu_ring {
>  struct amdgpu_vm_pt {
>  	struct amdgpu_bo_list_entry	entry;
>  	uint64_t			addr;
> +	uint64_t			shadow_addr;
>  };
>  
>  struct amdgpu_vm {
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index f1a1add..bd69cf83 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -597,23 +597,13 @@ uint64_t amdgpu_vm_map_gart(const dma_addr_t *pages_addr, uint64_t addr)
>  	return result;
>  }
>  
> -/**
> - * amdgpu_vm_update_pdes - make sure that page directory is valid
> - *
> - * @adev: amdgpu_device pointer
> - * @vm: requested vm
> - * @start: start of GPU address range
> - * @end: end of GPU address range
> - *
> - * Allocates new page tables if necessary
> - * and updates the page directory.
> - * Returns 0 for success, error for failure.
> - */
> -int amdgpu_vm_update_page_directory(struct amdgpu_device *adev,
> -				    struct amdgpu_vm *vm)
> +int amdgpu_vm_update_page_directory_or_shadow(struct amdgpu_device *adev,
> +					      struct amdgpu_vm *vm,
> +					      bool shadow)
>  {
>  	struct amdgpu_ring *ring;
> -	struct amdgpu_bo *pd = vm->page_directory;
> +	struct amdgpu_bo *pd = shadow ? vm->page_directory->shadow :
> +		vm->page_directory;
>  	uint64_t pd_addr = amdgpu_bo_gpu_offset(pd);
>  	uint32_t incr = AMDGPU_VM_PTE_COUNT * 8;
>  	uint64_t last_pde = ~0, last_pt = ~0;
> @@ -647,10 +637,17 @@ int amdgpu_vm_update_page_directory(struct amdgpu_device *adev,
>  		if (bo == NULL)
>  			continue;
>  
> -		pt = amdgpu_bo_gpu_offset(bo);
Hmm, no need to remove this line as it is common to both branches.

> -		if (vm->page_tables[pt_idx].addr == pt)
> -			continue;
> -		vm->page_tables[pt_idx].addr = pt;
> +		if (!shadow) {
> +			pt = amdgpu_bo_gpu_offset(bo);
ditto

> +			if (vm->page_tables[pt_idx].addr == pt)
> +				continue;
> +			vm->page_tables[pt_idx].addr = pt;
> +		} else {
> +			pt = amdgpu_bo_gpu_offset(bo);
ditto

> +			if (vm->page_tables[pt_idx].shadow_addr == pt)
> +				continue;
> +			vm->page_tables[pt_idx].shadow_addr = pt;
> +		}
>  
>  		pde = pd_addr + pt_idx * 8;
>  		if (((last_pde + 8 * count) != pde) ||
> @@ -678,17 +675,21 @@ int amdgpu_vm_update_page_directory(struct amdgpu_device *adev,
>  
>  	if (vm_update_params.ib->length_dw != 0) {
>  		amdgpu_ring_pad_ib(ring, vm_update_params.ib);
> -		amdgpu_sync_resv(adev, &job->sync, pd->tbo.resv,
> -				 AMDGPU_FENCE_OWNER_VM);
> +		if (!shadow)
> +			amdgpu_sync_resv(adev, &job->sync, pd->tbo.resv,
> +					 AMDGPU_FENCE_OWNER_VM);
>  		WARN_ON(vm_update_params.ib->length_dw > ndw);
> -		r = amdgpu_job_submit(job, ring, &vm->entity,
> +		r = amdgpu_job_submit(job, ring,
> +				      shadow ? &vm->shadow_entity : &vm->entity,
>  				      AMDGPU_FENCE_OWNER_VM, &fence);
>  		if (r)
>  			goto error_free;
>  
>  		amdgpu_bo_fence(pd, fence, true);
> -		fence_put(vm->page_directory_fence);
> -		vm->page_directory_fence = fence_get(fence);
> +		if (!shadow) {
> +			fence_put(vm->page_directory_fence);
> +			vm->page_directory_fence = fence_get(fence);
> +		}
>  		fence_put(fence);
>  
>  	} else {
> @@ -702,6 +703,29 @@ error_free:
>  	return r;
>  }
>  
> +/**
> + * amdgpu_vm_update_pdes - make sure that page directory is valid
> + *
> + * @adev: amdgpu_device pointer
> + * @vm: requested vm
> + * @start: start of GPU address range
> + * @end: end of GPU address range
> + *
> + * Allocates new page tables if necessary
> + * and updates the page directory.
> + * Returns 0 for success, error for failure.
> + */
> +int amdgpu_vm_update_page_directory(struct amdgpu_device *adev,
> +				    struct amdgpu_vm *vm)
> +{
> +	int r;
> +
> +	r = amdgpu_vm_update_page_directory_or_shadow(adev, vm, true);
> +	if (r)
> +		return r;
> +	return amdgpu_vm_update_page_directory_or_shadow(adev, vm, false);
> +}
> +
>  int amdgpu_vm_recover_page_table_from_shadow(struct amdgpu_device *adev,
>  					     struct amdgpu_vm *vm)
>  {
> @@ -1410,6 +1434,7 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev,
>  		entry->tv.shared = true;
>  		entry->user_pages = NULL;
>  		vm->page_tables[pt_idx].addr = 0;
> +		vm->page_tables[pt_idx].shadow_addr = 0;
>  	}
>  
>  	return 0;
> 


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