From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mikko Perttunen Subject: Re: [PATCH 04/10] gpu: host1x: Lock classes during job submission Date: Tue, 5 Dec 2017 15:21:49 +0200 Message-ID: <2b4d9283-dabe-9e1f-f8cb-6ddbc16e3f0f@kapsi.fi> References: <20171105110118.15142-1-mperttunen@nvidia.com> <20171105110118.15142-5-mperttunen@nvidia.com> <97ce4873-fdc1-5197-17bc-74505beadfc4@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: Sender: linux-tegra-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Dmitry Osipenko , Mikko Perttunen , thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org Cc: dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org, linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: linux-tegra@vger.kernel.org On 07.11.2017 23:23, Dmitry Osipenko wrote: > On 07.11.2017 15:28, Mikko Perttunen wrote: >> On 05.11.2017 18:46, Dmitry Osipenko wrote: >>> On 05.11.2017 14:01, Mikko Perttunen wrote: >>>> ... >>>> >>>> +static int mlock_id_for_class(unsigned int class) >>>> +{ >>>> +#if HOST1X_HW >= 6 >>>> + switch (class) >>>> + { >>>> + case HOST1X_CLASS_HOST1X: >>>> + return 0; >>>> + case HOST1X_CLASS_VIC: >>>> + return 17; >>> >>> What is the meaning of returned ID values that you have defined here? Why VIC >>> should have different ID on T186? >> >> On T186, MLOCKs are not "generic" - the HW knows that each MLOCK corresponds to >> a specific class. Therefore we must map that correctly. >> > > Okay. > >>> >>>> + default: >>>> + return -EINVAL; >>>> + } >>>> +#else >>>> + switch (class) >>>> + { >>>> + case HOST1X_CLASS_HOST1X: >>>> + return 0; >>>> + case HOST1X_CLASS_GR2D: >>>> + return 1; >>>> + case HOST1X_CLASS_GR2D_SB: >>>> + return 2; >>> >>> Note that we are allowing to switch 2d classes in the same jobs context and >>> currently jobs class is somewhat hardcoded to GR2D. >>> >>> Even though that GR2D and GR2D_SB use different register banks, is it okay to >>> trigger execution of different classes simultaneously? Would syncpoint >>> differentiate classes on OP_DONE event? >> >> Good point, we might need to use the same lock for these two. >> >>> >>> I suppose that MLOCK (the module lock) implies the whole module locking, >>> wouldn't it make sense to just use the module ID's defined in the TRM? >> >> Can you point out where these are defined? > > See INDMODID / REGF_MODULEID fields of HOST1X_CHANNEL_INDOFF2_0 / > HOST1X_SYNC_REGF_ADDR_0 registers, bit numbers of HOST1X_SYNC_INTSTATUS_0 / > HOST1X_SYNC_INTC0MASK_0 / HOST1X_SYNC_MOD_TEARDOWN_0. These values look like they would work on T20, but at least on T124 the module numbering for modules we want to lock goes above the number of MLOCKs so the indexing scheme would not work there.. Mikko > -- > To unsubscribe from this list: send the line "unsubscribe linux-tegra" in > the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752789AbdLENV4 (ORCPT ); Tue, 5 Dec 2017 08:21:56 -0500 Received: from mail.kapsi.fi ([91.232.154.25]:41377 "EHLO mail.kapsi.fi" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752149AbdLENVw (ORCPT ); Tue, 5 Dec 2017 08:21:52 -0500 Subject: Re: [PATCH 04/10] gpu: host1x: Lock classes during job submission To: Dmitry Osipenko , Mikko Perttunen , thierry.reding@gmail.com, jonathanh@nvidia.com References: <20171105110118.15142-1-mperttunen@nvidia.com> <20171105110118.15142-5-mperttunen@nvidia.com> <97ce4873-fdc1-5197-17bc-74505beadfc4@gmail.com> Cc: dri-devel@lists.freedesktop.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org From: Mikko Perttunen Message-ID: <2b4d9283-dabe-9e1f-f8cb-6ddbc16e3f0f@kapsi.fi> Date: Tue, 5 Dec 2017 15:21:49 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.2.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit X-SA-Exim-Connect-IP: 62.209.167.43 X-SA-Exim-Mail-From: cyndis@kapsi.fi X-SA-Exim-Scanned: No (on mail.kapsi.fi); SAEximRunCond expanded to false Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 07.11.2017 23:23, Dmitry Osipenko wrote: > On 07.11.2017 15:28, Mikko Perttunen wrote: >> On 05.11.2017 18:46, Dmitry Osipenko wrote: >>> On 05.11.2017 14:01, Mikko Perttunen wrote: >>>> ... >>>> >>>> +static int mlock_id_for_class(unsigned int class) >>>> +{ >>>> +#if HOST1X_HW >= 6 >>>> + switch (class) >>>> + { >>>> + case HOST1X_CLASS_HOST1X: >>>> + return 0; >>>> + case HOST1X_CLASS_VIC: >>>> + return 17; >>> >>> What is the meaning of returned ID values that you have defined here? Why VIC >>> should have different ID on T186? >> >> On T186, MLOCKs are not "generic" - the HW knows that each MLOCK corresponds to >> a specific class. Therefore we must map that correctly. >> > > Okay. > >>> >>>> + default: >>>> + return -EINVAL; >>>> + } >>>> +#else >>>> + switch (class) >>>> + { >>>> + case HOST1X_CLASS_HOST1X: >>>> + return 0; >>>> + case HOST1X_CLASS_GR2D: >>>> + return 1; >>>> + case HOST1X_CLASS_GR2D_SB: >>>> + return 2; >>> >>> Note that we are allowing to switch 2d classes in the same jobs context and >>> currently jobs class is somewhat hardcoded to GR2D. >>> >>> Even though that GR2D and GR2D_SB use different register banks, is it okay to >>> trigger execution of different classes simultaneously? Would syncpoint >>> differentiate classes on OP_DONE event? >> >> Good point, we might need to use the same lock for these two. >> >>> >>> I suppose that MLOCK (the module lock) implies the whole module locking, >>> wouldn't it make sense to just use the module ID's defined in the TRM? >> >> Can you point out where these are defined? > > See INDMODID / REGF_MODULEID fields of HOST1X_CHANNEL_INDOFF2_0 / > HOST1X_SYNC_REGF_ADDR_0 registers, bit numbers of HOST1X_SYNC_INTSTATUS_0 / > HOST1X_SYNC_INTC0MASK_0 / HOST1X_SYNC_MOD_TEARDOWN_0. These values look like they would work on T20, but at least on T124 the module numbering for modules we want to lock goes above the number of MLOCKs so the indexing scheme would not work there.. Mikko > -- > To unsubscribe from this list: send the line "unsubscribe linux-tegra" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html >