On 05/31/2018 05:51 PM, speck for Josh Poimboeuf wrote:
> On Thu, May 31, 2018 at 11:28:43PM +0200, speck for Jiri Kosina wrote:
>> On Thu, 31 May 2018, speck for Jiri Kosina wrote:
>>
>>>> My (probably wrong) understanding is that the pattern is something like
>>>> this:
>>>>
>>>> if (user_index < array_len) {
>>>> 	bar[user_index] = blah;
>>>> 	...
>>>> 	foo = bar[user_index];
>>>> }
>>>>
>>>> Do you have a different understanding?

My understanding is that it's the array index store above that is what
they mean by the 1.x variants. Then obviously some other cache line is
populated (which could be a store following another load).

> If we could get somebody from Intel to confirm that the existing
> upstream Smatch code -- which apparently just looks for array reads
> based on a user-supplied index -- is a decent way to find this sequence,
> that would be fantastic...

Intel apparently plan to update their previous whitepaper. I'm still
waiting to get a copy of that ahead of June 12th so we can confirm.

Jon.

P.S. Linus mentioned the invalidation traffic. When I visited Graz back
in February, I suggested they consider analyzing client vs server part
behavior due to how Intel implements MESIF differently between them -
client is (traditionally, might change with growing cores/mesh designs)
broadcast snoop invalidation vs directory used in the server parts.

-- 
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