From: Jan Beulich <jbeulich@suse.com>
To: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Cc: "Andrew Cooper" <andrew.cooper3@citrix.com>,
"Wei Liu" <wl@xen.org>, "Roger Pau Monné" <roger.pau@citrix.com>
Subject: [PATCH 2/3] x86/cpuid: replace more cpufeat_word() uses
Date: Wed, 23 Feb 2022 11:12:51 +0100 [thread overview]
Message-ID: <2c1f9c24-a07e-b5b6-2f20-18eacb835763@suse.com> (raw)
In-Reply-To: <91935ffd-a270-f1a1-28f1-645fa4167fcd@suse.com>
Complete what e3662437eb43 ("x86/cpuid: Disentangle logic for new
feature leaves") has begun:
"Switch to using FEATURESET_* just like the policy/featureset helpers. This
breaks the cognitive complexity of needing to know which leaf a specifically
named feature should reside in, and is shorter to write. It is also far
easier to identify as correct at a glance, given the correlation with the
CPUID leaf being read."
Signed-off-by: Jan Beulich <jbeulich@suse.com>
--- a/xen/arch/x86/cpu/common.c
+++ b/xen/arch/x86/cpu/common.c
@@ -332,23 +332,22 @@ void __init early_cpu_init(void)
cpuid(0x00000001, &eax, &ebx, &ecx, &edx);
c->x86 = get_cpu_family(eax, &c->x86_model, &c->x86_mask);
- edx &= ~cleared_caps[cpufeat_word(X86_FEATURE_FPU)];
- ecx &= ~cleared_caps[cpufeat_word(X86_FEATURE_SSE3)];
+ edx &= ~cleared_caps[FEATURESET_1d];
+ ecx &= ~cleared_caps[FEATURESET_1c];
if (edx & cpufeat_mask(X86_FEATURE_CLFLUSH))
c->x86_cache_alignment = ((ebx >> 8) & 0xff) * 8;
/* Leaf 0x1 capabilities filled in early for Xen. */
- c->x86_capability[cpufeat_word(X86_FEATURE_FPU)] = edx;
- c->x86_capability[cpufeat_word(X86_FEATURE_SSE3)] = ecx;
+ c->x86_capability[FEATURESET_1d] = edx;
+ c->x86_capability[FEATURESET_1c] = ecx;
printk(XENLOG_INFO
"CPU Vendor: %s, Family %u (%#x), Model %u (%#x), Stepping %u (raw %08x)\n",
x86_cpuid_vendor_to_str(c->x86_vendor), c->x86, c->x86,
c->x86_model, c->x86_model, c->x86_mask, eax);
- if (c->cpuid_level >= 7) {
- cpuid_count(7, 0, &eax, &ebx, &ecx, &edx);
- c->x86_capability[cpufeat_word(X86_FEATURE_CET_SS)] = ecx;
- }
+ if (c->cpuid_level >= 7)
+ cpuid_count(7, 0, &eax, &ebx,
+ &c->x86_capability[FEATURESET_7c0], &edx);
eax = cpuid_eax(0x80000000);
if ((eax >> 16) == 0x8000 && eax >= 0x80000008) {
--- a/xen/arch/x86/efi/efi-boot.h
+++ b/xen/arch/x86/efi/efi-boot.h
@@ -685,11 +685,11 @@ static void __init efi_arch_cpu(void)
boot_tsc_stamp = rdtsc();
- caps[cpufeat_word(X86_FEATURE_HYPERVISOR)] = cpuid_ecx(1);
+ caps[FEATURESET_1c] = cpuid_ecx(1);
if ( (eax >> 16) == 0x8000 && eax > 0x80000000 )
{
- caps[cpufeat_word(X86_FEATURE_SYSCALL)] = cpuid_edx(0x80000001);
+ caps[FEATURESET_e1d] = cpuid_edx(0x80000001);
if ( cpu_has_nx )
trampoline_efer |= EFER_NXE;
--- a/xen/arch/x86/mpparse.c
+++ b/xen/arch/x86/mpparse.c
@@ -516,7 +516,7 @@ static inline void __init construct_defa
(boot_cpu_data.x86_model << 4) |
boot_cpu_data.x86_mask;
processor.mpc_featureflag =
- boot_cpu_data.x86_capability[cpufeat_word(X86_FEATURE_FPU)];
+ boot_cpu_data.x86_capability[FEATURESET_1d];
processor.mpc_reserved[0] = 0;
processor.mpc_reserved[1] = 0;
for (i = 0; i < 2; i++) {
--- a/xen/arch/x86/tsx.c
+++ b/xen/arch/x86/tsx.c
@@ -48,7 +48,7 @@ void tsx_init(void)
bool has_rtm_always_abort;
if ( boot_cpu_data.cpuid_level >= 7 )
- boot_cpu_data.x86_capability[cpufeat_word(X86_FEATURE_ARCH_CAPS)]
+ boot_cpu_data.x86_capability[FEATURESET_7d0]
= cpuid_count_edx(7, 0);
if ( cpu_has_arch_caps )
next prev parent reply other threads:[~2022-02-23 10:13 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-23 10:11 [PATCH 0/3] x86: correct fencing around CLFLUSH (+some tidying) Jan Beulich
2022-02-23 10:12 ` [PATCH 1/3] x86: drop NOP_DS_PREFIX Jan Beulich
2022-02-23 10:54 ` Andrew Cooper
2022-02-23 11:11 ` Jan Beulich
2022-02-23 10:12 ` Jan Beulich [this message]
2022-02-23 10:57 ` [PATCH 2/3] x86/cpuid: replace more cpufeat_word() uses Andrew Cooper
2022-02-23 10:13 ` [PATCH 3/3] x86: correct fencing around CLFLUSH Jan Beulich
2022-02-23 12:33 ` Andrew Cooper
2022-02-24 12:13 ` Jan Beulich
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