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From: Richard Henderson <richard.henderson@linaro.org>
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Date: Thu, 17 May 2018 20:35:31 -0700
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Subject: Re: [Qemu-devel] [PATCH 4/9] target/riscv: Introduce
 cpu_riscv_get_fcsr
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To: Michael Clark <mjc@sifive.com>
Cc: QEMU Developers <qemu-devel@nongnu.org>, Palmer Dabbelt <palmer@sifive.com>, Sagar Karandikar <sagark@eecs.berkeley.edu>, Bastian Koppelmann <kbastian@mail.uni-paderborn.de>

On 05/17/2018 07:46 PM, Michael Clark wrote:
> 
> 
> On Fri, May 11, 2018 at 3:52 PM, Richard Henderson
> <richard.henderson@linaro.org <mailto:richard.henderson@linaro.org>> wrote:
> 
>     Cc: Michael Clark <mjc@sifive.com <mailto:mjc@sifive.com>>
>     Cc: Palmer Dabbelt <palmer@sifive.com <mailto:palmer@sifive.com>>
>     Cc: Sagar Karandikar <sagark@eecs.berkeley.edu
>     <mailto:sagark@eecs.berkeley.edu>>
>     Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de
>     <mailto:kbastian@mail.uni-paderborn.de>>
>     Signed-off-by: Richard Henderson <richard.henderson@linaro.org
>     <mailto:richard.henderson@linaro.org>>
> 
> 
> I'm not against this change but it conflicts with changes in the riscv repo. I
> should post my patch queue to the list...

Ok, I'll drop this for now, and the dump of the FCSR in the next patch.
To be revisited once your csr reorg is upstream...


r~