From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752093AbdKJI4h (ORCPT ); Fri, 10 Nov 2017 03:56:37 -0500 Received: from foss.arm.com ([217.140.101.70]:56210 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751099AbdKJI4f (ORCPT ); Fri, 10 Nov 2017 03:56:35 -0500 Subject: Re: [PATCH v5 17/26] KVM: arm/arm64: GICv4: Handle INVALL applied to a vPE To: Christoffer Dall , Auger Eric Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Mark Rutland , Andre Przywara , Shameerali Kolothum Thodi , Christoffer Dall , Shanker Donthineni References: <20171027142855.21584-1-marc.zyngier@arm.com> <20171027142855.21584-18-marc.zyngier@arm.com> <20171110084115.GJ14144@cbox> From: Marc Zyngier Organization: ARM Ltd Message-ID: <2c791b55-f16d-5e2b-a876-126239cf04d1@arm.com> Date: Fri, 10 Nov 2017 08:56:32 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.4.0 MIME-Version: 1.0 In-Reply-To: <20171110084115.GJ14144@cbox> Content-Type: text/plain; charset=utf-8 Content-Language: en-GB Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/11/17 08:41, Christoffer Dall wrote: > On Tue, Nov 07, 2017 at 10:23:25PM +0100, Auger Eric wrote: >> Hi Marc, >> >> On 27/10/2017 16:28, Marc Zyngier wrote: >>> Since when updating the properties one LPI at a time, there is no >> Since we update the properties one LPI at a time, ... ? >>> need to perform an INV each time we read one. Instead, we rely >>> on the final VINVALL that gets sent to the ITS to do the work. >> The commit message is not crystal clear for me. >> >> I understand in case of vgic_its_cmd_handle_invall you want to avoid >> doing an invalidation for each physical irq but rather do an >> its_invall_vpe at the end. So you add a new @needs_inv arg to >> update_lpi_config to tell whether the invalidation should be done or not. > > I've reworded it to: > > There is no need to perform an INV for each interrupt when updating > multiple interrupts. Instead, we can rely on the final VINVALL that > gets sent to the ITS to do the work for all of them. > > > Shout quickly if you have any objections. Works for me. Thanks, M. -- Jazz is not dead. It just smells funny... From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marc Zyngier Subject: Re: [PATCH v5 17/26] KVM: arm/arm64: GICv4: Handle INVALL applied to a vPE Date: Fri, 10 Nov 2017 08:56:32 +0000 Message-ID: <2c791b55-f16d-5e2b-a876-126239cf04d1@arm.com> References: <20171027142855.21584-1-marc.zyngier@arm.com> <20171027142855.21584-18-marc.zyngier@arm.com> <20171110084115.GJ14144@cbox> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Cc: kvm@vger.kernel.org, Andre Przywara , linux-kernel@vger.kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org To: Christoffer Dall , Auger Eric Return-path: In-Reply-To: <20171110084115.GJ14144@cbox> Content-Language: en-GB List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu List-Id: kvm.vger.kernel.org On 10/11/17 08:41, Christoffer Dall wrote: > On Tue, Nov 07, 2017 at 10:23:25PM +0100, Auger Eric wrote: >> Hi Marc, >> >> On 27/10/2017 16:28, Marc Zyngier wrote: >>> Since when updating the properties one LPI at a time, there is no >> Since we update the properties one LPI at a time, ... ? >>> need to perform an INV each time we read one. Instead, we rely >>> on the final VINVALL that gets sent to the ITS to do the work. >> The commit message is not crystal clear for me. >> >> I understand in case of vgic_its_cmd_handle_invall you want to avoid >> doing an invalidation for each physical irq but rather do an >> its_invall_vpe at the end. So you add a new @needs_inv arg to >> update_lpi_config to tell whether the invalidation should be done or not. > > I've reworded it to: > > There is no need to perform an INV for each interrupt when updating > multiple interrupts. Instead, we can rely on the final VINVALL that > gets sent to the ITS to do the work for all of them. > > > Shout quickly if you have any objections. Works for me. Thanks, M. -- Jazz is not dead. It just smells funny... From mboxrd@z Thu Jan 1 00:00:00 1970 From: marc.zyngier@arm.com (Marc Zyngier) Date: Fri, 10 Nov 2017 08:56:32 +0000 Subject: [PATCH v5 17/26] KVM: arm/arm64: GICv4: Handle INVALL applied to a vPE In-Reply-To: <20171110084115.GJ14144@cbox> References: <20171027142855.21584-1-marc.zyngier@arm.com> <20171027142855.21584-18-marc.zyngier@arm.com> <20171110084115.GJ14144@cbox> Message-ID: <2c791b55-f16d-5e2b-a876-126239cf04d1@arm.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 10/11/17 08:41, Christoffer Dall wrote: > On Tue, Nov 07, 2017 at 10:23:25PM +0100, Auger Eric wrote: >> Hi Marc, >> >> On 27/10/2017 16:28, Marc Zyngier wrote: >>> Since when updating the properties one LPI at a time, there is no >> Since we update the properties one LPI at a time, ... ? >>> need to perform an INV each time we read one. Instead, we rely >>> on the final VINVALL that gets sent to the ITS to do the work. >> The commit message is not crystal clear for me. >> >> I understand in case of vgic_its_cmd_handle_invall you want to avoid >> doing an invalidation for each physical irq but rather do an >> its_invall_vpe at the end. So you add a new @needs_inv arg to >> update_lpi_config to tell whether the invalidation should be done or not. > > I've reworded it to: > > There is no need to perform an INV for each interrupt when updating > multiple interrupts. Instead, we can rely on the final VINVALL that > gets sent to the ITS to do the work for all of them. > > > Shout quickly if you have any objections. Works for me. Thanks, M. -- Jazz is not dead. It just smells funny...