From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A0A25C00140 for ; Fri, 12 Aug 2022 11:02:44 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id B950184816; Fri, 12 Aug 2022 13:02:41 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=mediatek.com header.i=@mediatek.com header.b="VlvOrhhu"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 4E7BC84835; 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Fri, 12 Aug 2022 19:02:20 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.186) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Fri, 12 Aug 2022 19:02:19 +0800 Received: from mcddlt001.gcn.mediatek.inc (10.19.240.15) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Fri, 12 Aug 2022 19:02:18 +0800 Message-ID: <2cc65311ea80067afdabdd9e1c18845ec8ef4c5c.camel@mediatek.com> Subject: Re: [PATCH 03/31] board: mediatek: add MT7986 reference boards From: Weijie Gao To: Daniel Golle CC: , GSS_MTK_Uboot_upstream , Simon Glass , Marcel Ziswiler , Andre Przywara , Fabio Estevam , Samuel Holland , Marek Vasut , "Ying-Chun Liu (PaulLiu)" , Christian Hewitt Date: Fri, 12 Aug 2022 19:02:17 +0800 In-Reply-To: References: <1019ae0fceee359e6e99149b8de00a1eefd4de1f.1659581119.git.weijie.gao@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.1-2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean On Tue, 2022-08-09 at 11:10 +0200, Daniel Golle wrote: > Hi Weijie, > > On Thu, Aug 04, 2022 at 11:35:03AM +0800, Weijie Gao wrote: > > This patch adds general board files based on MT7986 SoCs. > > > > The SD/eMMC controller on MT7986A and MT7986B have different pin > > configurations so that four different reference board configs has > > to be > > added. > > > > Signed-off-by: Weijie Gao > > --- > > [...] > > diff --git a/include/configs/mt7986.h b/include/configs/mt7986.h > > new file mode 100644 > > index 0000000000..b28fc0f613 > > --- /dev/null > > +++ b/include/configs/mt7986.h > > @@ -0,0 +1,26 @@ > > +/* SPDX-License-Identifier: GPL-2.0 */ > > +/* > > + * Configuration for MediaTek MT7986 SoC > > + * > > + * Copyright (C) 2022 MediaTek Inc. > > + * Author: Sam Shih > > + */ > > + > > +#ifndef __MT7986_H > > +#define __MT7986_H > > + > > +#include > > + > > In the SDK sources I found also > #define CONFIG_SYS_BOOTM_LEN SZ_128M > here which is actually needed to boot any image with uncompressed > kernel larger than 8MiB. As for ARM64 this size is easily exceeded > and > we got plenty of RAM, I suggest to also include a more generous > CONFIG_SYS_BOOTM_LEN in your submission to upstream U-Boot. CONFIG_SYS_BOOTM_LEN is now a Kconfig symbol. It will no be defined in this header. Instead, the default value of this symbol is 0x4000000 (64M) for ARM64 which is enough for an ARM64 kernel. > > > > +#define CONFIG_SYS_NONCACHED_MEMORY SZ_1M > > +#define CONFIG_SYS_MMC_ENV_DEV 0 > > + > > +/* Uboot definition */ > > +#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE > > + > > +/* SPL -> Uboot */ > > +#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE > > + > > +/* DRAM */ > > +#define CONFIG_SYS_SDRAM_BASE 0x40000000 > > + > > +#endif > > -- > > 2.17.1 > >