[PATCH 0/4] Add USB2 support for rk3568

[PATCH 0/4] Add USB2 support for rk3568

[Benjamin Gaignard]

The original pacth from Peter Geis is here:
https://gitlab.com/pine64-org/quartz-bsp/linux-next/-/commit/cda136f853628259198d6f70c3e14c9e5c8e097f

I have split the driver part of this patch in two:
 - one to update reg usage
 - one to add USB2 support for rk3568
I have added patches for the bindings:
 - some clean up
 - add compatible for rk3568

Benjamin

Benjamin Gaignard (4):
  dt-bindings: phy: rockchip: USB2: remove useless #phy-cells property
  dt-bindings: phy: rockchip: USB2: Add compatible for rk3568
  PHY: rockchip: USB2: Allow 64 bits reg property
  phy: rockchip: USB2: Add support for rk3568

 .../bindings/phy/phy-rockchip-inno-usb2.yaml  |  3 +-
 drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 85 +++++++++++++++++--
 2 files changed, 78 insertions(+), 10 deletions(-)

-- 
2.25.1

[PATCH 0/4] Add USB2 support for rk3568

[Benjamin Gaignard]

The original pacth from Peter Geis is here:
https://gitlab.com/pine64-org/quartz-bsp/linux-next/-/commit/cda136f853628259198d6f70c3e14c9e5c8e097f

I have split the driver part of this patch in two:
 - one to update reg usage
 - one to add USB2 support for rk3568
I have added patches for the bindings:
 - some clean up
 - add compatible for rk3568

Benjamin

Benjamin Gaignard (4):
  dt-bindings: phy: rockchip: USB2: remove useless #phy-cells property
  dt-bindings: phy: rockchip: USB2: Add compatible for rk3568
  PHY: rockchip: USB2: Allow 64 bits reg property
  phy: rockchip: USB2: Add support for rk3568

 .../bindings/phy/phy-rockchip-inno-usb2.yaml  |  3 +-
 drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 85 +++++++++++++++++--
 2 files changed, 78 insertions(+), 10 deletions(-)

-- 
2.25.1


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http://lists.infradead.org/mailman/listinfo/linux-rockchip

[PATCH 0/4] Add USB2 support for rk3568

[Benjamin Gaignard]

The original pacth from Peter Geis is here:
https://gitlab.com/pine64-org/quartz-bsp/linux-next/-/commit/cda136f853628259198d6f70c3e14c9e5c8e097f

I have split the driver part of this patch in two:
 - one to update reg usage
 - one to add USB2 support for rk3568
I have added patches for the bindings:
 - some clean up
 - add compatible for rk3568

Benjamin

Benjamin Gaignard (4):
  dt-bindings: phy: rockchip: USB2: remove useless #phy-cells property
  dt-bindings: phy: rockchip: USB2: Add compatible for rk3568
  PHY: rockchip: USB2: Allow 64 bits reg property
  phy: rockchip: USB2: Add support for rk3568

 .../bindings/phy/phy-rockchip-inno-usb2.yaml  |  3 +-
 drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 85 +++++++++++++++++--
 2 files changed, 78 insertions(+), 10 deletions(-)

-- 
2.25.1


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[PATCH 0/4] Add USB2 support for rk3568

[Benjamin Gaignard]

The original pacth from Peter Geis is here:
https://gitlab.com/pine64-org/quartz-bsp/linux-next/-/commit/cda136f853628259198d6f70c3e14c9e5c8e097f

I have split the driver part of this patch in two:
 - one to update reg usage
 - one to add USB2 support for rk3568
I have added patches for the bindings:
 - some clean up
 - add compatible for rk3568

Benjamin

Benjamin Gaignard (4):
  dt-bindings: phy: rockchip: USB2: remove useless #phy-cells property
  dt-bindings: phy: rockchip: USB2: Add compatible for rk3568
  PHY: rockchip: USB2: Allow 64 bits reg property
  phy: rockchip: USB2: Add support for rk3568

 .../bindings/phy/phy-rockchip-inno-usb2.yaml  |  3 +-
 drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 85 +++++++++++++++++--
 2 files changed, 78 insertions(+), 10 deletions(-)

-- 
2.25.1


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[PATCH 1/4] dt-bindings: phy: rockchip: USB2: remove useless #phy-cells property

[Benjamin Gaignard]

'#phy-cells' property is needed in host-port and otg-port nodes but
not in parent nodes. Remove it from the JSON schema.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
---
 .../devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml         | 2 --
 1 file changed, 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
index fb29ad807b68f..b14387a48f6a3 100644
--- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
+++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
@@ -119,7 +119,6 @@ required:
   - reg
   - clock-output-names
   - "#clock-cells"
-  - "#phy-cells"
   - host-port
   - otg-port
 
@@ -137,7 +136,6 @@ examples:
       clock-names = "phyclk";
       clock-output-names = "clk_usbphy0_480m";
       #clock-cells = <0>;
-      #phy-cells = <0>;
 
       u2phy0_host: host-port {
         #phy-cells = <0>;
-- 
2.25.1

[PATCH 1/4] dt-bindings: phy: rockchip: USB2: remove useless #phy-cells property

[Benjamin Gaignard]

'#phy-cells' property is needed in host-port and otg-port nodes but
not in parent nodes. Remove it from the JSON schema.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
---
 .../devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml         | 2 --
 1 file changed, 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
index fb29ad807b68f..b14387a48f6a3 100644
--- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
+++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
@@ -119,7 +119,6 @@ required:
   - reg
   - clock-output-names
   - "#clock-cells"
-  - "#phy-cells"
   - host-port
   - otg-port
 
@@ -137,7 +136,6 @@ examples:
       clock-names = "phyclk";
       clock-output-names = "clk_usbphy0_480m";
       #clock-cells = <0>;
-      #phy-cells = <0>;
 
       u2phy0_host: host-port {
         #phy-cells = <0>;
-- 
2.25.1


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[PATCH 1/4] dt-bindings: phy: rockchip: USB2: remove useless #phy-cells property

[Benjamin Gaignard]

'#phy-cells' property is needed in host-port and otg-port nodes but
not in parent nodes. Remove it from the JSON schema.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
---
 .../devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml         | 2 --
 1 file changed, 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
index fb29ad807b68f..b14387a48f6a3 100644
--- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
+++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
@@ -119,7 +119,6 @@ required:
   - reg
   - clock-output-names
   - "#clock-cells"
-  - "#phy-cells"
   - host-port
   - otg-port
 
@@ -137,7 +136,6 @@ examples:
       clock-names = "phyclk";
       clock-output-names = "clk_usbphy0_480m";
       #clock-cells = <0>;
-      #phy-cells = <0>;
 
       u2phy0_host: host-port {
         #phy-cells = <0>;
-- 
2.25.1


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[PATCH 1/4] dt-bindings: phy: rockchip: USB2: remove useless #phy-cells property

[Benjamin Gaignard]

'#phy-cells' property is needed in host-port and otg-port nodes but
not in parent nodes. Remove it from the JSON schema.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
---
 .../devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml         | 2 --
 1 file changed, 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
index fb29ad807b68f..b14387a48f6a3 100644
--- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
+++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
@@ -119,7 +119,6 @@ required:
   - reg
   - clock-output-names
   - "#clock-cells"
-  - "#phy-cells"
   - host-port
   - otg-port
 
@@ -137,7 +136,6 @@ examples:
       clock-names = "phyclk";
       clock-output-names = "clk_usbphy0_480m";
       #clock-cells = <0>;
-      #phy-cells = <0>;
 
       u2phy0_host: host-port {
         #phy-cells = <0>;
-- 
2.25.1


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[PATCH 2/4] dt-bindings: phy: rockchip: USB2: Add compatible for rk3568

[Benjamin Gaignard]

Add "rockchip,rk3568-usb2phy" in compatible list of the USB2 phy.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
---
 .../devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml          | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
index b14387a48f6a3..a1420d5e44be7 100644
--- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
+++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
@@ -18,6 +18,7 @@ properties:
       - rockchip,rk3366-usb2phy
       - rockchip,rk3399-usb2phy
       - rockchip,rv1108-usb2phy
+      - rockchip,rk3568-usb2phy
 
   reg:
     maxItems: 1
-- 
2.25.1

[PATCH 2/4] dt-bindings: phy: rockchip: USB2: Add compatible for rk3568

[Benjamin Gaignard]

Add "rockchip,rk3568-usb2phy" in compatible list of the USB2 phy.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
---
 .../devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml          | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
index b14387a48f6a3..a1420d5e44be7 100644
--- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
+++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
@@ -18,6 +18,7 @@ properties:
       - rockchip,rk3366-usb2phy
       - rockchip,rk3399-usb2phy
       - rockchip,rv1108-usb2phy
+      - rockchip,rk3568-usb2phy
 
   reg:
     maxItems: 1
-- 
2.25.1


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[PATCH 2/4] dt-bindings: phy: rockchip: USB2: Add compatible for rk3568

[Benjamin Gaignard]

Add "rockchip,rk3568-usb2phy" in compatible list of the USB2 phy.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
---
 .../devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml          | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
index b14387a48f6a3..a1420d5e44be7 100644
--- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
+++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
@@ -18,6 +18,7 @@ properties:
       - rockchip,rk3366-usb2phy
       - rockchip,rk3399-usb2phy
       - rockchip,rv1108-usb2phy
+      - rockchip,rk3568-usb2phy
 
   reg:
     maxItems: 1
-- 
2.25.1


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[PATCH 2/4] dt-bindings: phy: rockchip: USB2: Add compatible for rk3568

[Benjamin Gaignard]

Add "rockchip,rk3568-usb2phy" in compatible list of the USB2 phy.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
---
 .../devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml          | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
index b14387a48f6a3..a1420d5e44be7 100644
--- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
+++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
@@ -18,6 +18,7 @@ properties:
       - rockchip,rk3366-usb2phy
       - rockchip,rk3399-usb2phy
       - rockchip,rv1108-usb2phy
+      - rockchip,rk3568-usb2phy
 
   reg:
     maxItems: 1
-- 
2.25.1


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[PATCH 3/4] PHY: rockchip: USB2: Allow 64 bits reg property

[Benjamin Gaignard]

In rk356x device-tree "reg" property could be coded on 64 bits.
Change reg type and of_property_read_ to make it works.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
---
 drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
index 46ebdb1460a3d..45518f96d7217 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -1068,7 +1068,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
 	struct rockchip_usb2phy *rphy;
 	const struct rockchip_usb2phy_cfg *phy_cfgs;
 	const struct of_device_id *match;
-	unsigned int reg;
+	u64 reg;
 	int index, ret;
 
 	rphy = devm_kzalloc(dev, sizeof(*rphy), GFP_KERNEL);
@@ -1098,7 +1098,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
 		rphy->usbgrf = NULL;
 	}
 
-	if (of_property_read_u32(np, "reg", &reg)) {
+	if (of_property_read_u64(np, "reg", &reg)) {
 		dev_err(dev, "the reg property is not assigned in %pOFn node\n",
 			np);
 		return -EINVAL;
-- 
2.25.1

[PATCH 3/4] PHY: rockchip: USB2: Allow 64 bits reg property

[Benjamin Gaignard]

In rk356x device-tree "reg" property could be coded on 64 bits.
Change reg type and of_property_read_ to make it works.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
---
 drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
index 46ebdb1460a3d..45518f96d7217 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -1068,7 +1068,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
 	struct rockchip_usb2phy *rphy;
 	const struct rockchip_usb2phy_cfg *phy_cfgs;
 	const struct of_device_id *match;
-	unsigned int reg;
+	u64 reg;
 	int index, ret;
 
 	rphy = devm_kzalloc(dev, sizeof(*rphy), GFP_KERNEL);
@@ -1098,7 +1098,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
 		rphy->usbgrf = NULL;
 	}
 
-	if (of_property_read_u32(np, "reg", &reg)) {
+	if (of_property_read_u64(np, "reg", &reg)) {
 		dev_err(dev, "the reg property is not assigned in %pOFn node\n",
 			np);
 		return -EINVAL;
-- 
2.25.1


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[PATCH 3/4] PHY: rockchip: USB2: Allow 64 bits reg property

[Benjamin Gaignard]

In rk356x device-tree "reg" property could be coded on 64 bits.
Change reg type and of_property_read_ to make it works.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
---
 drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
index 46ebdb1460a3d..45518f96d7217 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -1068,7 +1068,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
 	struct rockchip_usb2phy *rphy;
 	const struct rockchip_usb2phy_cfg *phy_cfgs;
 	const struct of_device_id *match;
-	unsigned int reg;
+	u64 reg;
 	int index, ret;
 
 	rphy = devm_kzalloc(dev, sizeof(*rphy), GFP_KERNEL);
@@ -1098,7 +1098,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
 		rphy->usbgrf = NULL;
 	}
 
-	if (of_property_read_u32(np, "reg", &reg)) {
+	if (of_property_read_u64(np, "reg", &reg)) {
 		dev_err(dev, "the reg property is not assigned in %pOFn node\n",
 			np);
 		return -EINVAL;
-- 
2.25.1


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[PATCH 3/4] PHY: rockchip: USB2: Allow 64 bits reg property

[Benjamin Gaignard]

In rk356x device-tree "reg" property could be coded on 64 bits.
Change reg type and of_property_read_ to make it works.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
---
 drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
index 46ebdb1460a3d..45518f96d7217 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -1068,7 +1068,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
 	struct rockchip_usb2phy *rphy;
 	const struct rockchip_usb2phy_cfg *phy_cfgs;
 	const struct of_device_id *match;
-	unsigned int reg;
+	u64 reg;
 	int index, ret;
 
 	rphy = devm_kzalloc(dev, sizeof(*rphy), GFP_KERNEL);
@@ -1098,7 +1098,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
 		rphy->usbgrf = NULL;
 	}
 
-	if (of_property_read_u32(np, "reg", &reg)) {
+	if (of_property_read_u64(np, "reg", &reg)) {
 		dev_err(dev, "the reg property is not assigned in %pOFn node\n",
 			np);
 		return -EINVAL;
-- 
2.25.1


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[PATCH 4/4] phy: rockchip: USB2: Add support for rk3568

[Benjamin Gaignard]

Add phy configuration for rk3568.
Unlike previous rk3xxx phy syscon is set in the node and not
in parent node. Update the syscon lookup to handle this.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
---
 drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 81 +++++++++++++++++--
 1 file changed, 75 insertions(+), 6 deletions(-)

diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
index 45518f96d7217..7a385ac3e5403 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -1081,12 +1081,17 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
 		return -EINVAL;
 	}
 
-	if (!dev->parent || !dev->parent->of_node)
-		return -EINVAL;
-
-	rphy->grf = syscon_node_to_regmap(dev->parent->of_node);
-	if (IS_ERR(rphy->grf))
-		return PTR_ERR(rphy->grf);
+	if (!dev->parent || !dev->parent->of_node) {
+		rphy->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,usbgrf");
+		if (IS_ERR(rphy->grf)) {
+			dev_err(dev, "failed to locate usbgrf\n");
+			return PTR_ERR(rphy->grf);
+		}
+	} else {
+		rphy->grf = syscon_node_to_regmap(dev->parent->of_node);
+			if (IS_ERR(rphy->grf))
+				return PTR_ERR(rphy->grf);
+	}
 
 	if (of_device_is_compatible(np, "rockchip,rv1108-usb2phy")) {
 		rphy->usbgrf =
@@ -1422,12 +1427,76 @@ static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
 	{ /* sentinel */ }
 };
 
+static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = {
+	{
+		.reg = 0xfe8a0000,
+		.num_ports	= 2,
+		.clkout_ctl	= { 0x0008, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x0000, 8, 0, 0, 0x1d1 },
+				.bvalid_det_en	= { 0x0080, 2, 2, 0, 1 },
+				.bvalid_det_st	= { 0x0084, 2, 2, 0, 1 },
+				.bvalid_det_clr = { 0x0088, 2, 2, 0, 1 },
+				.utmi_avalid	= { 0x00c0, 10, 10, 0, 1 },
+				.utmi_bvalid	= { 0x00c0, 9, 9, 0, 1 },
+			},
+			[USB2PHY_PORT_HOST] = {
+				/* Select suspend control from controller */
+				.phy_sus	= { 0x0004, 8, 0, 0x1d2, 0x1d2 },
+				.ls_det_en	= { 0x0080, 1, 1, 0, 1 },
+				.ls_det_st	= { 0x0084, 1, 1, 0, 1 },
+				.ls_det_clr	= { 0x0088, 1, 1, 0, 1 },
+				.utmi_ls	= { 0x00c0, 17, 16, 0, 1 },
+				.utmi_hstdet	= { 0x00c0, 19, 19, 0, 1 }
+			}
+		},
+		.chg_det = {
+			.opmode		= { 0x0000, 3, 0, 5, 1 },
+			.cp_det		= { 0x00c0, 24, 24, 0, 1 },
+			.dcp_det	= { 0x00c0, 23, 23, 0, 1 },
+			.dp_det		= { 0x00c0, 25, 25, 0, 1 },
+			.idm_sink_en	= { 0x0008, 8, 8, 0, 1 },
+			.idp_sink_en	= { 0x0008, 7, 7, 0, 1 },
+			.idp_src_en	= { 0x0008, 9, 9, 0, 1 },
+			.rdm_pdwn_en	= { 0x0008, 10, 10, 0, 1 },
+			.vdm_src_en	= { 0x0008, 12, 12, 0, 1 },
+			.vdp_src_en	= { 0x0008, 11, 11, 0, 1 },
+		},
+	},
+	{
+		.reg = 0xfe8b0000,
+		.num_ports	= 2,
+		.clkout_ctl	= { 0x0008, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x0000, 8, 0, 0x1d2, 0x1d1 },
+				.ls_det_en	= { 0x0080, 0, 0, 0, 1 },
+				.ls_det_st	= { 0x0084, 0, 0, 0, 1 },
+				.ls_det_clr	= { 0x0088, 0, 0, 0, 1 },
+				.utmi_ls	= { 0x00c0, 5, 4, 0, 1 },
+				.utmi_hstdet	= { 0x00c0, 7, 7, 0, 1 }
+			},
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0x0004, 8, 0, 0x1d2, 0x1d1 },
+				.ls_det_en	= { 0x0080, 1, 1, 0, 1 },
+				.ls_det_st	= { 0x0084, 1, 1, 0, 1 },
+				.ls_det_clr	= { 0x0088, 1, 1, 0, 1 },
+				.utmi_ls	= { 0x00c0, 17, 16, 0, 1 },
+				.utmi_hstdet	= { 0x00c0, 19, 19, 0, 1 }
+			}
+		},
+	},
+	{ /* sentinel */ }
+};
+
 static const struct of_device_id rockchip_usb2phy_dt_match[] = {
 	{ .compatible = "rockchip,px30-usb2phy", .data = &rk3328_phy_cfgs },
 	{ .compatible = "rockchip,rk3228-usb2phy", .data = &rk3228_phy_cfgs },
 	{ .compatible = "rockchip,rk3328-usb2phy", .data = &rk3328_phy_cfgs },
 	{ .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs },
 	{ .compatible = "rockchip,rk3399-usb2phy", .data = &rk3399_phy_cfgs },
+	{ .compatible = "rockchip,rk3568-usb2phy", .data = &rk3568_phy_cfgs },
 	{ .compatible = "rockchip,rv1108-usb2phy", .data = &rv1108_phy_cfgs },
 	{}
 };
-- 
2.25.1

[PATCH 4/4] phy: rockchip: USB2: Add support for rk3568

[Benjamin Gaignard]

Add phy configuration for rk3568.
Unlike previous rk3xxx phy syscon is set in the node and not
in parent node. Update the syscon lookup to handle this.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
---
 drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 81 +++++++++++++++++--
 1 file changed, 75 insertions(+), 6 deletions(-)

diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
index 45518f96d7217..7a385ac3e5403 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -1081,12 +1081,17 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
 		return -EINVAL;
 	}
 
-	if (!dev->parent || !dev->parent->of_node)
-		return -EINVAL;
-
-	rphy->grf = syscon_node_to_regmap(dev->parent->of_node);
-	if (IS_ERR(rphy->grf))
-		return PTR_ERR(rphy->grf);
+	if (!dev->parent || !dev->parent->of_node) {
+		rphy->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,usbgrf");
+		if (IS_ERR(rphy->grf)) {
+			dev_err(dev, "failed to locate usbgrf\n");
+			return PTR_ERR(rphy->grf);
+		}
+	} else {
+		rphy->grf = syscon_node_to_regmap(dev->parent->of_node);
+			if (IS_ERR(rphy->grf))
+				return PTR_ERR(rphy->grf);
+	}
 
 	if (of_device_is_compatible(np, "rockchip,rv1108-usb2phy")) {
 		rphy->usbgrf =
@@ -1422,12 +1427,76 @@ static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
 	{ /* sentinel */ }
 };
 
+static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = {
+	{
+		.reg = 0xfe8a0000,
+		.num_ports	= 2,
+		.clkout_ctl	= { 0x0008, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x0000, 8, 0, 0, 0x1d1 },
+				.bvalid_det_en	= { 0x0080, 2, 2, 0, 1 },
+				.bvalid_det_st	= { 0x0084, 2, 2, 0, 1 },
+				.bvalid_det_clr = { 0x0088, 2, 2, 0, 1 },
+				.utmi_avalid	= { 0x00c0, 10, 10, 0, 1 },
+				.utmi_bvalid	= { 0x00c0, 9, 9, 0, 1 },
+			},
+			[USB2PHY_PORT_HOST] = {
+				/* Select suspend control from controller */
+				.phy_sus	= { 0x0004, 8, 0, 0x1d2, 0x1d2 },
+				.ls_det_en	= { 0x0080, 1, 1, 0, 1 },
+				.ls_det_st	= { 0x0084, 1, 1, 0, 1 },
+				.ls_det_clr	= { 0x0088, 1, 1, 0, 1 },
+				.utmi_ls	= { 0x00c0, 17, 16, 0, 1 },
+				.utmi_hstdet	= { 0x00c0, 19, 19, 0, 1 }
+			}
+		},
+		.chg_det = {
+			.opmode		= { 0x0000, 3, 0, 5, 1 },
+			.cp_det		= { 0x00c0, 24, 24, 0, 1 },
+			.dcp_det	= { 0x00c0, 23, 23, 0, 1 },
+			.dp_det		= { 0x00c0, 25, 25, 0, 1 },
+			.idm_sink_en	= { 0x0008, 8, 8, 0, 1 },
+			.idp_sink_en	= { 0x0008, 7, 7, 0, 1 },
+			.idp_src_en	= { 0x0008, 9, 9, 0, 1 },
+			.rdm_pdwn_en	= { 0x0008, 10, 10, 0, 1 },
+			.vdm_src_en	= { 0x0008, 12, 12, 0, 1 },
+			.vdp_src_en	= { 0x0008, 11, 11, 0, 1 },
+		},
+	},
+	{
+		.reg = 0xfe8b0000,
+		.num_ports	= 2,
+		.clkout_ctl	= { 0x0008, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x0000, 8, 0, 0x1d2, 0x1d1 },
+				.ls_det_en	= { 0x0080, 0, 0, 0, 1 },
+				.ls_det_st	= { 0x0084, 0, 0, 0, 1 },
+				.ls_det_clr	= { 0x0088, 0, 0, 0, 1 },
+				.utmi_ls	= { 0x00c0, 5, 4, 0, 1 },
+				.utmi_hstdet	= { 0x00c0, 7, 7, 0, 1 }
+			},
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0x0004, 8, 0, 0x1d2, 0x1d1 },
+				.ls_det_en	= { 0x0080, 1, 1, 0, 1 },
+				.ls_det_st	= { 0x0084, 1, 1, 0, 1 },
+				.ls_det_clr	= { 0x0088, 1, 1, 0, 1 },
+				.utmi_ls	= { 0x00c0, 17, 16, 0, 1 },
+				.utmi_hstdet	= { 0x00c0, 19, 19, 0, 1 }
+			}
+		},
+	},
+	{ /* sentinel */ }
+};
+
 static const struct of_device_id rockchip_usb2phy_dt_match[] = {
 	{ .compatible = "rockchip,px30-usb2phy", .data = &rk3328_phy_cfgs },
 	{ .compatible = "rockchip,rk3228-usb2phy", .data = &rk3228_phy_cfgs },
 	{ .compatible = "rockchip,rk3328-usb2phy", .data = &rk3328_phy_cfgs },
 	{ .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs },
 	{ .compatible = "rockchip,rk3399-usb2phy", .data = &rk3399_phy_cfgs },
+	{ .compatible = "rockchip,rk3568-usb2phy", .data = &rk3568_phy_cfgs },
 	{ .compatible = "rockchip,rv1108-usb2phy", .data = &rv1108_phy_cfgs },
 	{}
 };
-- 
2.25.1


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

[PATCH 4/4] phy: rockchip: USB2: Add support for rk3568

[Benjamin Gaignard]

Add phy configuration for rk3568.
Unlike previous rk3xxx phy syscon is set in the node and not
in parent node. Update the syscon lookup to handle this.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
---
 drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 81 +++++++++++++++++--
 1 file changed, 75 insertions(+), 6 deletions(-)

diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
index 45518f96d7217..7a385ac3e5403 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -1081,12 +1081,17 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
 		return -EINVAL;
 	}
 
-	if (!dev->parent || !dev->parent->of_node)
-		return -EINVAL;
-
-	rphy->grf = syscon_node_to_regmap(dev->parent->of_node);
-	if (IS_ERR(rphy->grf))
-		return PTR_ERR(rphy->grf);
+	if (!dev->parent || !dev->parent->of_node) {
+		rphy->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,usbgrf");
+		if (IS_ERR(rphy->grf)) {
+			dev_err(dev, "failed to locate usbgrf\n");
+			return PTR_ERR(rphy->grf);
+		}
+	} else {
+		rphy->grf = syscon_node_to_regmap(dev->parent->of_node);
+			if (IS_ERR(rphy->grf))
+				return PTR_ERR(rphy->grf);
+	}
 
 	if (of_device_is_compatible(np, "rockchip,rv1108-usb2phy")) {
 		rphy->usbgrf =
@@ -1422,12 +1427,76 @@ static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
 	{ /* sentinel */ }
 };
 
+static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = {
+	{
+		.reg = 0xfe8a0000,
+		.num_ports	= 2,
+		.clkout_ctl	= { 0x0008, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x0000, 8, 0, 0, 0x1d1 },
+				.bvalid_det_en	= { 0x0080, 2, 2, 0, 1 },
+				.bvalid_det_st	= { 0x0084, 2, 2, 0, 1 },
+				.bvalid_det_clr = { 0x0088, 2, 2, 0, 1 },
+				.utmi_avalid	= { 0x00c0, 10, 10, 0, 1 },
+				.utmi_bvalid	= { 0x00c0, 9, 9, 0, 1 },
+			},
+			[USB2PHY_PORT_HOST] = {
+				/* Select suspend control from controller */
+				.phy_sus	= { 0x0004, 8, 0, 0x1d2, 0x1d2 },
+				.ls_det_en	= { 0x0080, 1, 1, 0, 1 },
+				.ls_det_st	= { 0x0084, 1, 1, 0, 1 },
+				.ls_det_clr	= { 0x0088, 1, 1, 0, 1 },
+				.utmi_ls	= { 0x00c0, 17, 16, 0, 1 },
+				.utmi_hstdet	= { 0x00c0, 19, 19, 0, 1 }
+			}
+		},
+		.chg_det = {
+			.opmode		= { 0x0000, 3, 0, 5, 1 },
+			.cp_det		= { 0x00c0, 24, 24, 0, 1 },
+			.dcp_det	= { 0x00c0, 23, 23, 0, 1 },
+			.dp_det		= { 0x00c0, 25, 25, 0, 1 },
+			.idm_sink_en	= { 0x0008, 8, 8, 0, 1 },
+			.idp_sink_en	= { 0x0008, 7, 7, 0, 1 },
+			.idp_src_en	= { 0x0008, 9, 9, 0, 1 },
+			.rdm_pdwn_en	= { 0x0008, 10, 10, 0, 1 },
+			.vdm_src_en	= { 0x0008, 12, 12, 0, 1 },
+			.vdp_src_en	= { 0x0008, 11, 11, 0, 1 },
+		},
+	},
+	{
+		.reg = 0xfe8b0000,
+		.num_ports	= 2,
+		.clkout_ctl	= { 0x0008, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x0000, 8, 0, 0x1d2, 0x1d1 },
+				.ls_det_en	= { 0x0080, 0, 0, 0, 1 },
+				.ls_det_st	= { 0x0084, 0, 0, 0, 1 },
+				.ls_det_clr	= { 0x0088, 0, 0, 0, 1 },
+				.utmi_ls	= { 0x00c0, 5, 4, 0, 1 },
+				.utmi_hstdet	= { 0x00c0, 7, 7, 0, 1 }
+			},
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0x0004, 8, 0, 0x1d2, 0x1d1 },
+				.ls_det_en	= { 0x0080, 1, 1, 0, 1 },
+				.ls_det_st	= { 0x0084, 1, 1, 0, 1 },
+				.ls_det_clr	= { 0x0088, 1, 1, 0, 1 },
+				.utmi_ls	= { 0x00c0, 17, 16, 0, 1 },
+				.utmi_hstdet	= { 0x00c0, 19, 19, 0, 1 }
+			}
+		},
+	},
+	{ /* sentinel */ }
+};
+
 static const struct of_device_id rockchip_usb2phy_dt_match[] = {
 	{ .compatible = "rockchip,px30-usb2phy", .data = &rk3328_phy_cfgs },
 	{ .compatible = "rockchip,rk3228-usb2phy", .data = &rk3228_phy_cfgs },
 	{ .compatible = "rockchip,rk3328-usb2phy", .data = &rk3328_phy_cfgs },
 	{ .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs },
 	{ .compatible = "rockchip,rk3399-usb2phy", .data = &rk3399_phy_cfgs },
+	{ .compatible = "rockchip,rk3568-usb2phy", .data = &rk3568_phy_cfgs },
 	{ .compatible = "rockchip,rv1108-usb2phy", .data = &rv1108_phy_cfgs },
 	{}
 };
-- 
2.25.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH 4/4] phy: rockchip: USB2: Add support for rk3568

[Benjamin Gaignard]

Add phy configuration for rk3568.
Unlike previous rk3xxx phy syscon is set in the node and not
in parent node. Update the syscon lookup to handle this.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
---
 drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 81 +++++++++++++++++--
 1 file changed, 75 insertions(+), 6 deletions(-)

diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
index 45518f96d7217..7a385ac3e5403 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -1081,12 +1081,17 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
 		return -EINVAL;
 	}
 
-	if (!dev->parent || !dev->parent->of_node)
-		return -EINVAL;
-
-	rphy->grf = syscon_node_to_regmap(dev->parent->of_node);
-	if (IS_ERR(rphy->grf))
-		return PTR_ERR(rphy->grf);
+	if (!dev->parent || !dev->parent->of_node) {
+		rphy->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,usbgrf");
+		if (IS_ERR(rphy->grf)) {
+			dev_err(dev, "failed to locate usbgrf\n");
+			return PTR_ERR(rphy->grf);
+		}
+	} else {
+		rphy->grf = syscon_node_to_regmap(dev->parent->of_node);
+			if (IS_ERR(rphy->grf))
+				return PTR_ERR(rphy->grf);
+	}
 
 	if (of_device_is_compatible(np, "rockchip,rv1108-usb2phy")) {
 		rphy->usbgrf =
@@ -1422,12 +1427,76 @@ static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
 	{ /* sentinel */ }
 };
 
+static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = {
+	{
+		.reg = 0xfe8a0000,
+		.num_ports	= 2,
+		.clkout_ctl	= { 0x0008, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x0000, 8, 0, 0, 0x1d1 },
+				.bvalid_det_en	= { 0x0080, 2, 2, 0, 1 },
+				.bvalid_det_st	= { 0x0084, 2, 2, 0, 1 },
+				.bvalid_det_clr = { 0x0088, 2, 2, 0, 1 },
+				.utmi_avalid	= { 0x00c0, 10, 10, 0, 1 },
+				.utmi_bvalid	= { 0x00c0, 9, 9, 0, 1 },
+			},
+			[USB2PHY_PORT_HOST] = {
+				/* Select suspend control from controller */
+				.phy_sus	= { 0x0004, 8, 0, 0x1d2, 0x1d2 },
+				.ls_det_en	= { 0x0080, 1, 1, 0, 1 },
+				.ls_det_st	= { 0x0084, 1, 1, 0, 1 },
+				.ls_det_clr	= { 0x0088, 1, 1, 0, 1 },
+				.utmi_ls	= { 0x00c0, 17, 16, 0, 1 },
+				.utmi_hstdet	= { 0x00c0, 19, 19, 0, 1 }
+			}
+		},
+		.chg_det = {
+			.opmode		= { 0x0000, 3, 0, 5, 1 },
+			.cp_det		= { 0x00c0, 24, 24, 0, 1 },
+			.dcp_det	= { 0x00c0, 23, 23, 0, 1 },
+			.dp_det		= { 0x00c0, 25, 25, 0, 1 },
+			.idm_sink_en	= { 0x0008, 8, 8, 0, 1 },
+			.idp_sink_en	= { 0x0008, 7, 7, 0, 1 },
+			.idp_src_en	= { 0x0008, 9, 9, 0, 1 },
+			.rdm_pdwn_en	= { 0x0008, 10, 10, 0, 1 },
+			.vdm_src_en	= { 0x0008, 12, 12, 0, 1 },
+			.vdp_src_en	= { 0x0008, 11, 11, 0, 1 },
+		},
+	},
+	{
+		.reg = 0xfe8b0000,
+		.num_ports	= 2,
+		.clkout_ctl	= { 0x0008, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x0000, 8, 0, 0x1d2, 0x1d1 },
+				.ls_det_en	= { 0x0080, 0, 0, 0, 1 },
+				.ls_det_st	= { 0x0084, 0, 0, 0, 1 },
+				.ls_det_clr	= { 0x0088, 0, 0, 0, 1 },
+				.utmi_ls	= { 0x00c0, 5, 4, 0, 1 },
+				.utmi_hstdet	= { 0x00c0, 7, 7, 0, 1 }
+			},
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0x0004, 8, 0, 0x1d2, 0x1d1 },
+				.ls_det_en	= { 0x0080, 1, 1, 0, 1 },
+				.ls_det_st	= { 0x0084, 1, 1, 0, 1 },
+				.ls_det_clr	= { 0x0088, 1, 1, 0, 1 },
+				.utmi_ls	= { 0x00c0, 17, 16, 0, 1 },
+				.utmi_hstdet	= { 0x00c0, 19, 19, 0, 1 }
+			}
+		},
+	},
+	{ /* sentinel */ }
+};
+
 static const struct of_device_id rockchip_usb2phy_dt_match[] = {
 	{ .compatible = "rockchip,px30-usb2phy", .data = &rk3328_phy_cfgs },
 	{ .compatible = "rockchip,rk3228-usb2phy", .data = &rk3228_phy_cfgs },
 	{ .compatible = "rockchip,rk3328-usb2phy", .data = &rk3328_phy_cfgs },
 	{ .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs },
 	{ .compatible = "rockchip,rk3399-usb2phy", .data = &rk3399_phy_cfgs },
+	{ .compatible = "rockchip,rk3568-usb2phy", .data = &rk3568_phy_cfgs },
 	{ .compatible = "rockchip,rv1108-usb2phy", .data = &rv1108_phy_cfgs },
 	{}
 };
-- 
2.25.1


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Re: [PATCH 0/4] Add USB2 support for rk3568

[Peter Geis]

Good Afternoon,

This was a hack just to get it to bind.
If you'll notice I've posted a second revision that works better, but
still is untested against anything other than the rk356x.
https://gitlab.com/pine64-org/quartz-bsp/linux-next/-/commit/51612157d7ae3f3c4267ed56676f5d1a952d698f

Very Respectfully,
Peter Geis

On Mon, Jun 14, 2021 at 11:44 AM Benjamin Gaignard
<benjamin.gaignard@collabora.com> wrote:
>
> The original pacth from Peter Geis is here:
> https://gitlab.com/pine64-org/quartz-bsp/linux-next/-/commit/cda136f853628259198d6f70c3e14c9e5c8e097f
>
> I have split the driver part of this patch in two:
>  - one to update reg usage
>  - one to add USB2 support for rk3568
> I have added patches for the bindings:
>  - some clean up
>  - add compatible for rk3568
>
> Benjamin
>
> Benjamin Gaignard (4):
>   dt-bindings: phy: rockchip: USB2: remove useless #phy-cells property
>   dt-bindings: phy: rockchip: USB2: Add compatible for rk3568
>   PHY: rockchip: USB2: Allow 64 bits reg property
>   phy: rockchip: USB2: Add support for rk3568
>
>  .../bindings/phy/phy-rockchip-inno-usb2.yaml  |  3 +-
>  drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 85 +++++++++++++++++--
>  2 files changed, 78 insertions(+), 10 deletions(-)
>
> --
> 2.25.1
>

Re: [PATCH 0/4] Add USB2 support for rk3568

[Peter Geis]

Good Afternoon,

This was a hack just to get it to bind.
If you'll notice I've posted a second revision that works better, but
still is untested against anything other than the rk356x.
https://gitlab.com/pine64-org/quartz-bsp/linux-next/-/commit/51612157d7ae3f3c4267ed56676f5d1a952d698f

Very Respectfully,
Peter Geis

On Mon, Jun 14, 2021 at 11:44 AM Benjamin Gaignard
<benjamin.gaignard@collabora.com> wrote:
>
> The original pacth from Peter Geis is here:
> https://gitlab.com/pine64-org/quartz-bsp/linux-next/-/commit/cda136f853628259198d6f70c3e14c9e5c8e097f
>
> I have split the driver part of this patch in two:
>  - one to update reg usage
>  - one to add USB2 support for rk3568
> I have added patches for the bindings:
>  - some clean up
>  - add compatible for rk3568
>
> Benjamin
>
> Benjamin Gaignard (4):
>   dt-bindings: phy: rockchip: USB2: remove useless #phy-cells property
>   dt-bindings: phy: rockchip: USB2: Add compatible for rk3568
>   PHY: rockchip: USB2: Allow 64 bits reg property
>   phy: rockchip: USB2: Add support for rk3568
>
>  .../bindings/phy/phy-rockchip-inno-usb2.yaml  |  3 +-
>  drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 85 +++++++++++++++++--
>  2 files changed, 78 insertions(+), 10 deletions(-)
>
> --
> 2.25.1
>

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Re: [PATCH 0/4] Add USB2 support for rk3568

[Peter Geis]

Good Afternoon,

This was a hack just to get it to bind.
If you'll notice I've posted a second revision that works better, but
still is untested against anything other than the rk356x.
https://gitlab.com/pine64-org/quartz-bsp/linux-next/-/commit/51612157d7ae3f3c4267ed56676f5d1a952d698f

Very Respectfully,
Peter Geis

On Mon, Jun 14, 2021 at 11:44 AM Benjamin Gaignard
<benjamin.gaignard@collabora.com> wrote:
>
> The original pacth from Peter Geis is here:
> https://gitlab.com/pine64-org/quartz-bsp/linux-next/-/commit/cda136f853628259198d6f70c3e14c9e5c8e097f
>
> I have split the driver part of this patch in two:
>  - one to update reg usage
>  - one to add USB2 support for rk3568
> I have added patches for the bindings:
>  - some clean up
>  - add compatible for rk3568
>
> Benjamin
>
> Benjamin Gaignard (4):
>   dt-bindings: phy: rockchip: USB2: remove useless #phy-cells property
>   dt-bindings: phy: rockchip: USB2: Add compatible for rk3568
>   PHY: rockchip: USB2: Allow 64 bits reg property
>   phy: rockchip: USB2: Add support for rk3568
>
>  .../bindings/phy/phy-rockchip-inno-usb2.yaml  |  3 +-
>  drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 85 +++++++++++++++++--
>  2 files changed, 78 insertions(+), 10 deletions(-)
>
> --
> 2.25.1
>

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Re: [PATCH 0/4] Add USB2 support for rk3568

[Peter Geis]

Good Afternoon,

This was a hack just to get it to bind.
If you'll notice I've posted a second revision that works better, but
still is untested against anything other than the rk356x.
https://gitlab.com/pine64-org/quartz-bsp/linux-next/-/commit/51612157d7ae3f3c4267ed56676f5d1a952d698f

Very Respectfully,
Peter Geis

On Mon, Jun 14, 2021 at 11:44 AM Benjamin Gaignard
<benjamin.gaignard@collabora.com> wrote:
>
> The original pacth from Peter Geis is here:
> https://gitlab.com/pine64-org/quartz-bsp/linux-next/-/commit/cda136f853628259198d6f70c3e14c9e5c8e097f
>
> I have split the driver part of this patch in two:
>  - one to update reg usage
>  - one to add USB2 support for rk3568
> I have added patches for the bindings:
>  - some clean up
>  - add compatible for rk3568
>
> Benjamin
>
> Benjamin Gaignard (4):
>   dt-bindings: phy: rockchip: USB2: remove useless #phy-cells property
>   dt-bindings: phy: rockchip: USB2: Add compatible for rk3568
>   PHY: rockchip: USB2: Allow 64 bits reg property
>   phy: rockchip: USB2: Add support for rk3568
>
>  .../bindings/phy/phy-rockchip-inno-usb2.yaml  |  3 +-
>  drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 85 +++++++++++++++++--
>  2 files changed, 78 insertions(+), 10 deletions(-)
>
> --
> 2.25.1
>

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Re: [PATCH 3/4] PHY: rockchip: USB2: Allow 64 bits reg property

[Robin Murphy]

On 2021-06-14 16:43, Benjamin Gaignard wrote:
> In rk356x device-tree "reg" property could be coded on 64 bits.
> Change reg type and of_property_read_ to make it works.

On platforms with #address-cells=1, this isn't going to do what you 
think. Worse, it's not even going to fail, because you *can* read a 
64-bit value from an address cell with a size cell after it...

Robin.

> Signed-off-by: Peter Geis <pgwipeout@gmail.com>
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> ---
>   drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> index 46ebdb1460a3d..45518f96d7217 100644
> --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> @@ -1068,7 +1068,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
>   	struct rockchip_usb2phy *rphy;
>   	const struct rockchip_usb2phy_cfg *phy_cfgs;
>   	const struct of_device_id *match;
> -	unsigned int reg;
> +	u64 reg;
>   	int index, ret;
>   
>   	rphy = devm_kzalloc(dev, sizeof(*rphy), GFP_KERNEL);
> @@ -1098,7 +1098,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
>   		rphy->usbgrf = NULL;
>   	}
>   
> -	if (of_property_read_u32(np, "reg", &reg)) {
> +	if (of_property_read_u64(np, "reg", &reg)) {
>   		dev_err(dev, "the reg property is not assigned in %pOFn node\n",
>   			np);
>   		return -EINVAL;
> 

Re: [PATCH 3/4] PHY: rockchip: USB2: Allow 64 bits reg property

[Robin Murphy]

On 2021-06-14 16:43, Benjamin Gaignard wrote:
> In rk356x device-tree "reg" property could be coded on 64 bits.
> Change reg type and of_property_read_ to make it works.

On platforms with #address-cells=1, this isn't going to do what you 
think. Worse, it's not even going to fail, because you *can* read a 
64-bit value from an address cell with a size cell after it...

Robin.

> Signed-off-by: Peter Geis <pgwipeout@gmail.com>
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> ---
>   drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> index 46ebdb1460a3d..45518f96d7217 100644
> --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> @@ -1068,7 +1068,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
>   	struct rockchip_usb2phy *rphy;
>   	const struct rockchip_usb2phy_cfg *phy_cfgs;
>   	const struct of_device_id *match;
> -	unsigned int reg;
> +	u64 reg;
>   	int index, ret;
>   
>   	rphy = devm_kzalloc(dev, sizeof(*rphy), GFP_KERNEL);
> @@ -1098,7 +1098,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
>   		rphy->usbgrf = NULL;
>   	}
>   
> -	if (of_property_read_u32(np, "reg", &reg)) {
> +	if (of_property_read_u64(np, "reg", &reg)) {
>   		dev_err(dev, "the reg property is not assigned in %pOFn node\n",
>   			np);
>   		return -EINVAL;
> 

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Re: [PATCH 3/4] PHY: rockchip: USB2: Allow 64 bits reg property

[Robin Murphy]

On 2021-06-14 16:43, Benjamin Gaignard wrote:
> In rk356x device-tree "reg" property could be coded on 64 bits.
> Change reg type and of_property_read_ to make it works.

On platforms with #address-cells=1, this isn't going to do what you 
think. Worse, it's not even going to fail, because you *can* read a 
64-bit value from an address cell with a size cell after it...

Robin.

> Signed-off-by: Peter Geis <pgwipeout@gmail.com>
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> ---
>   drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> index 46ebdb1460a3d..45518f96d7217 100644
> --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> @@ -1068,7 +1068,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
>   	struct rockchip_usb2phy *rphy;
>   	const struct rockchip_usb2phy_cfg *phy_cfgs;
>   	const struct of_device_id *match;
> -	unsigned int reg;
> +	u64 reg;
>   	int index, ret;
>   
>   	rphy = devm_kzalloc(dev, sizeof(*rphy), GFP_KERNEL);
> @@ -1098,7 +1098,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
>   		rphy->usbgrf = NULL;
>   	}
>   
> -	if (of_property_read_u32(np, "reg", &reg)) {
> +	if (of_property_read_u64(np, "reg", &reg)) {
>   		dev_err(dev, "the reg property is not assigned in %pOFn node\n",
>   			np);
>   		return -EINVAL;
> 

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Re: [PATCH 3/4] PHY: rockchip: USB2: Allow 64 bits reg property

[Robin Murphy]

On 2021-06-14 16:43, Benjamin Gaignard wrote:
> In rk356x device-tree "reg" property could be coded on 64 bits.
> Change reg type and of_property_read_ to make it works.

On platforms with #address-cells=1, this isn't going to do what you 
think. Worse, it's not even going to fail, because you *can* read a 
64-bit value from an address cell with a size cell after it...

Robin.

> Signed-off-by: Peter Geis <pgwipeout@gmail.com>
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> ---
>   drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> index 46ebdb1460a3d..45518f96d7217 100644
> --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> @@ -1068,7 +1068,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
>   	struct rockchip_usb2phy *rphy;
>   	const struct rockchip_usb2phy_cfg *phy_cfgs;
>   	const struct of_device_id *match;
> -	unsigned int reg;
> +	u64 reg;
>   	int index, ret;
>   
>   	rphy = devm_kzalloc(dev, sizeof(*rphy), GFP_KERNEL);
> @@ -1098,7 +1098,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
>   		rphy->usbgrf = NULL;
>   	}
>   
> -	if (of_property_read_u32(np, "reg", &reg)) {
> +	if (of_property_read_u64(np, "reg", &reg)) {
>   		dev_err(dev, "the reg property is not assigned in %pOFn node\n",
>   			np);
>   		return -EINVAL;
> 

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Re: [PATCH 2/4] dt-bindings: phy: rockchip: USB2: Add compatible for rk3568

[Johan Jonker]

Hi Benjamin,

The '#phy-cells' in [PATCH 1/4] are already gone.
The nodename is renamed to pattern "usb2phy@[0-9a-f]+$".
phy-rockchip-inno-usb2.yaml is now also part of grf.yaml, so must take
care of both.

From rk3568.dtsi:

	usb2phy0_grf: syscon@fdca0000 {
		compatible = "rockchip,rk3568-usb2phy-grf", "syscon";
		reg = <0x0 0xfdca0000 0x0 0x8000>;
	};

	usb2phy1_grf: syscon@fdca8000 {
		compatible = "rockchip,rk3568-usb2phy-grf", "syscon";
		reg = <0x0 0xfdca8000 0x0 0x8000>;
	};

	usb2phy0: usb2phy@fe8a0000 {
		compatible = "rockchip,rk3568-usb2phy";
		reg = <0x0 0xfe8a0000 0x0 0x10000>;
		interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&pmucru CLK_USBPHY0_REF>;
		clock-names = "phyclk";
		#clock-cells = <0>;
		assigned-clocks = <&cru USB480M>;
		assigned-clock-parents = <&usb2phy0>;
		clock-output-names = "usb480m_phy";
		rockchip,usbgrf = <&usb2phy0_grf>;
		status = "disabled";

		u2phy0_host: host-port {
			#phy-cells = <0>;
			status = "disabled";
		};

		u2phy0_otg: otg-port {
			#phy-cells = <0>;
			status = "disabled";
		};
	};

	usb2phy1: usb2phy@fe8b0000 {
		compatible = "rockchip,rk3568-usb2phy";
		reg = <0x0 0xfe8b0000 0x0 0x10000>;
		interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&pmucru CLK_USBPHY1_REF>;
		clock-names = "phyclk";
		#clock-cells = <0>;
		rockchip,usbgrf = <&usb2phy1_grf>;
		status = "disabled";

		u2phy1_host: host-port {
			#phy-cells = <0>;
			status = "disabled";
		};

		u2phy1_otg: otg-port {
			#phy-cells = <0>;
			status = "disabled";
		};
	};

rockchip,rk3568-usb2phy-grf must also be added to grf.yaml.

See linux-next.

https://lore.kernel.org/linux-devicetree/20210601164800.7670-2-jbx6244@gmail.com/

Johan

On 6/14/21 5:43 PM, Benjamin Gaignard wrote:
> Add "rockchip,rk3568-usb2phy" in compatible list of the USB2 phy.
> 
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> ---
>  .../devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml          | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> index b14387a48f6a3..a1420d5e44be7 100644
> --- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> @@ -18,6 +18,7 @@ properties:
>        - rockchip,rk3366-usb2phy
>        - rockchip,rk3399-usb2phy

--->

>        - rockchip,rv1108-usb2phy

> +      - rockchip,rk3568-usb2phy

Please sort in alphabetical order.

>  
>    reg:
>      maxItems: 1
> 

Re: [PATCH 2/4] dt-bindings: phy: rockchip: USB2: Add compatible for rk3568

[Johan Jonker]

Hi Benjamin,

The '#phy-cells' in [PATCH 1/4] are already gone.
The nodename is renamed to pattern "usb2phy@[0-9a-f]+$".
phy-rockchip-inno-usb2.yaml is now also part of grf.yaml, so must take
care of both.

From rk3568.dtsi:

	usb2phy0_grf: syscon@fdca0000 {
		compatible = "rockchip,rk3568-usb2phy-grf", "syscon";
		reg = <0x0 0xfdca0000 0x0 0x8000>;
	};

	usb2phy1_grf: syscon@fdca8000 {
		compatible = "rockchip,rk3568-usb2phy-grf", "syscon";
		reg = <0x0 0xfdca8000 0x0 0x8000>;
	};

	usb2phy0: usb2phy@fe8a0000 {
		compatible = "rockchip,rk3568-usb2phy";
		reg = <0x0 0xfe8a0000 0x0 0x10000>;
		interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&pmucru CLK_USBPHY0_REF>;
		clock-names = "phyclk";
		#clock-cells = <0>;
		assigned-clocks = <&cru USB480M>;
		assigned-clock-parents = <&usb2phy0>;
		clock-output-names = "usb480m_phy";
		rockchip,usbgrf = <&usb2phy0_grf>;
		status = "disabled";

		u2phy0_host: host-port {
			#phy-cells = <0>;
			status = "disabled";
		};

		u2phy0_otg: otg-port {
			#phy-cells = <0>;
			status = "disabled";
		};
	};

	usb2phy1: usb2phy@fe8b0000 {
		compatible = "rockchip,rk3568-usb2phy";
		reg = <0x0 0xfe8b0000 0x0 0x10000>;
		interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&pmucru CLK_USBPHY1_REF>;
		clock-names = "phyclk";
		#clock-cells = <0>;
		rockchip,usbgrf = <&usb2phy1_grf>;
		status = "disabled";

		u2phy1_host: host-port {
			#phy-cells = <0>;
			status = "disabled";
		};

		u2phy1_otg: otg-port {
			#phy-cells = <0>;
			status = "disabled";
		};
	};

rockchip,rk3568-usb2phy-grf must also be added to grf.yaml.

See linux-next.

https://lore.kernel.org/linux-devicetree/20210601164800.7670-2-jbx6244@gmail.com/

Johan

On 6/14/21 5:43 PM, Benjamin Gaignard wrote:
> Add "rockchip,rk3568-usb2phy" in compatible list of the USB2 phy.
> 
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> ---
>  .../devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml          | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> index b14387a48f6a3..a1420d5e44be7 100644
> --- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> @@ -18,6 +18,7 @@ properties:
>        - rockchip,rk3366-usb2phy
>        - rockchip,rk3399-usb2phy

--->

>        - rockchip,rv1108-usb2phy

> +      - rockchip,rk3568-usb2phy

Please sort in alphabetical order.

>  
>    reg:
>      maxItems: 1
> 

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Re: [PATCH 2/4] dt-bindings: phy: rockchip: USB2: Add compatible for rk3568

[Johan Jonker]

Hi Benjamin,

The '#phy-cells' in [PATCH 1/4] are already gone.
The nodename is renamed to pattern "usb2phy@[0-9a-f]+$".
phy-rockchip-inno-usb2.yaml is now also part of grf.yaml, so must take
care of both.

From rk3568.dtsi:

	usb2phy0_grf: syscon@fdca0000 {
		compatible = "rockchip,rk3568-usb2phy-grf", "syscon";
		reg = <0x0 0xfdca0000 0x0 0x8000>;
	};

	usb2phy1_grf: syscon@fdca8000 {
		compatible = "rockchip,rk3568-usb2phy-grf", "syscon";
		reg = <0x0 0xfdca8000 0x0 0x8000>;
	};

	usb2phy0: usb2phy@fe8a0000 {
		compatible = "rockchip,rk3568-usb2phy";
		reg = <0x0 0xfe8a0000 0x0 0x10000>;
		interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&pmucru CLK_USBPHY0_REF>;
		clock-names = "phyclk";
		#clock-cells = <0>;
		assigned-clocks = <&cru USB480M>;
		assigned-clock-parents = <&usb2phy0>;
		clock-output-names = "usb480m_phy";
		rockchip,usbgrf = <&usb2phy0_grf>;
		status = "disabled";

		u2phy0_host: host-port {
			#phy-cells = <0>;
			status = "disabled";
		};

		u2phy0_otg: otg-port {
			#phy-cells = <0>;
			status = "disabled";
		};
	};

	usb2phy1: usb2phy@fe8b0000 {
		compatible = "rockchip,rk3568-usb2phy";
		reg = <0x0 0xfe8b0000 0x0 0x10000>;
		interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&pmucru CLK_USBPHY1_REF>;
		clock-names = "phyclk";
		#clock-cells = <0>;
		rockchip,usbgrf = <&usb2phy1_grf>;
		status = "disabled";

		u2phy1_host: host-port {
			#phy-cells = <0>;
			status = "disabled";
		};

		u2phy1_otg: otg-port {
			#phy-cells = <0>;
			status = "disabled";
		};
	};

rockchip,rk3568-usb2phy-grf must also be added to grf.yaml.

See linux-next.

https://lore.kernel.org/linux-devicetree/20210601164800.7670-2-jbx6244@gmail.com/

Johan

On 6/14/21 5:43 PM, Benjamin Gaignard wrote:
> Add "rockchip,rk3568-usb2phy" in compatible list of the USB2 phy.
> 
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> ---
>  .../devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml          | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> index b14387a48f6a3..a1420d5e44be7 100644
> --- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> @@ -18,6 +18,7 @@ properties:
>        - rockchip,rk3366-usb2phy
>        - rockchip,rk3399-usb2phy

--->

>        - rockchip,rv1108-usb2phy

> +      - rockchip,rk3568-usb2phy

Please sort in alphabetical order.

>  
>    reg:
>      maxItems: 1
> 

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Re: [PATCH 2/4] dt-bindings: phy: rockchip: USB2: Add compatible for rk3568

[Johan Jonker]

Hi Benjamin,

The '#phy-cells' in [PATCH 1/4] are already gone.
The nodename is renamed to pattern "usb2phy@[0-9a-f]+$".
phy-rockchip-inno-usb2.yaml is now also part of grf.yaml, so must take
care of both.

From rk3568.dtsi:

	usb2phy0_grf: syscon@fdca0000 {
		compatible = "rockchip,rk3568-usb2phy-grf", "syscon";
		reg = <0x0 0xfdca0000 0x0 0x8000>;
	};

	usb2phy1_grf: syscon@fdca8000 {
		compatible = "rockchip,rk3568-usb2phy-grf", "syscon";
		reg = <0x0 0xfdca8000 0x0 0x8000>;
	};

	usb2phy0: usb2phy@fe8a0000 {
		compatible = "rockchip,rk3568-usb2phy";
		reg = <0x0 0xfe8a0000 0x0 0x10000>;
		interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&pmucru CLK_USBPHY0_REF>;
		clock-names = "phyclk";
		#clock-cells = <0>;
		assigned-clocks = <&cru USB480M>;
		assigned-clock-parents = <&usb2phy0>;
		clock-output-names = "usb480m_phy";
		rockchip,usbgrf = <&usb2phy0_grf>;
		status = "disabled";

		u2phy0_host: host-port {
			#phy-cells = <0>;
			status = "disabled";
		};

		u2phy0_otg: otg-port {
			#phy-cells = <0>;
			status = "disabled";
		};
	};

	usb2phy1: usb2phy@fe8b0000 {
		compatible = "rockchip,rk3568-usb2phy";
		reg = <0x0 0xfe8b0000 0x0 0x10000>;
		interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&pmucru CLK_USBPHY1_REF>;
		clock-names = "phyclk";
		#clock-cells = <0>;
		rockchip,usbgrf = <&usb2phy1_grf>;
		status = "disabled";

		u2phy1_host: host-port {
			#phy-cells = <0>;
			status = "disabled";
		};

		u2phy1_otg: otg-port {
			#phy-cells = <0>;
			status = "disabled";
		};
	};

rockchip,rk3568-usb2phy-grf must also be added to grf.yaml.

See linux-next.

https://lore.kernel.org/linux-devicetree/20210601164800.7670-2-jbx6244@gmail.com/

Johan

On 6/14/21 5:43 PM, Benjamin Gaignard wrote:
> Add "rockchip,rk3568-usb2phy" in compatible list of the USB2 phy.
> 
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> ---
>  .../devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml          | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> index b14387a48f6a3..a1420d5e44be7 100644
> --- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> @@ -18,6 +18,7 @@ properties:
>        - rockchip,rk3366-usb2phy
>        - rockchip,rk3399-usb2phy

--->

>        - rockchip,rv1108-usb2phy

> +      - rockchip,rk3568-usb2phy

Please sort in alphabetical order.

>  
>    reg:
>      maxItems: 1
> 

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Re: [PATCH 3/4] PHY: rockchip: USB2: Allow 64 bits reg property

[Peter Geis]

On Mon, Jun 14, 2021 at 1:09 PM Robin Murphy <robin.murphy@arm.com> wrote:
>
> On 2021-06-14 16:43, Benjamin Gaignard wrote:
> > In rk356x device-tree "reg" property could be coded on 64 bits.
> > Change reg type and of_property_read_ to make it works.
>
> On platforms with #address-cells=1, this isn't going to do what you
> think. Worse, it's not even going to fail, because you *can* read a
> 64-bit value from an address cell with a size cell after it...

Apologies, this was a hack and in no way ready for submission.

While I've got you here, what would be the best way to handle this?
Since previous generations #address-cells=1 and #size-cells=1, where
the rk356x #address-cells=2 and #size-cells=2 and we need to account
for both of them.

Thanks,
Peter

>
> Robin.
>
> > Signed-off-by: Peter Geis <pgwipeout@gmail.com>
> > Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> > ---
> >   drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 4 ++--
> >   1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> > index 46ebdb1460a3d..45518f96d7217 100644
> > --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> > +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> > @@ -1068,7 +1068,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
> >       struct rockchip_usb2phy *rphy;
> >       const struct rockchip_usb2phy_cfg *phy_cfgs;
> >       const struct of_device_id *match;
> > -     unsigned int reg;
> > +     u64 reg;
> >       int index, ret;
> >
> >       rphy = devm_kzalloc(dev, sizeof(*rphy), GFP_KERNEL);
> > @@ -1098,7 +1098,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
> >               rphy->usbgrf = NULL;
> >       }
> >
> > -     if (of_property_read_u32(np, "reg", &reg)) {
> > +     if (of_property_read_u64(np, "reg", &reg)) {
> >               dev_err(dev, "the reg property is not assigned in %pOFn node\n",
> >                       np);
> >               return -EINVAL;
> >

Re: [PATCH 3/4] PHY: rockchip: USB2: Allow 64 bits reg property

[Peter Geis]

On Mon, Jun 14, 2021 at 1:09 PM Robin Murphy <robin.murphy@arm.com> wrote:
>
> On 2021-06-14 16:43, Benjamin Gaignard wrote:
> > In rk356x device-tree "reg" property could be coded on 64 bits.
> > Change reg type and of_property_read_ to make it works.
>
> On platforms with #address-cells=1, this isn't going to do what you
> think. Worse, it's not even going to fail, because you *can* read a
> 64-bit value from an address cell with a size cell after it...

Apologies, this was a hack and in no way ready for submission.

While I've got you here, what would be the best way to handle this?
Since previous generations #address-cells=1 and #size-cells=1, where
the rk356x #address-cells=2 and #size-cells=2 and we need to account
for both of them.

Thanks,
Peter

>
> Robin.
>
> > Signed-off-by: Peter Geis <pgwipeout@gmail.com>
> > Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> > ---
> >   drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 4 ++--
> >   1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> > index 46ebdb1460a3d..45518f96d7217 100644
> > --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> > +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> > @@ -1068,7 +1068,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
> >       struct rockchip_usb2phy *rphy;
> >       const struct rockchip_usb2phy_cfg *phy_cfgs;
> >       const struct of_device_id *match;
> > -     unsigned int reg;
> > +     u64 reg;
> >       int index, ret;
> >
> >       rphy = devm_kzalloc(dev, sizeof(*rphy), GFP_KERNEL);
> > @@ -1098,7 +1098,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
> >               rphy->usbgrf = NULL;
> >       }
> >
> > -     if (of_property_read_u32(np, "reg", &reg)) {
> > +     if (of_property_read_u64(np, "reg", &reg)) {
> >               dev_err(dev, "the reg property is not assigned in %pOFn node\n",
> >                       np);
> >               return -EINVAL;
> >

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Re: [PATCH 3/4] PHY: rockchip: USB2: Allow 64 bits reg property

[Peter Geis]

On Mon, Jun 14, 2021 at 1:09 PM Robin Murphy <robin.murphy@arm.com> wrote:
>
> On 2021-06-14 16:43, Benjamin Gaignard wrote:
> > In rk356x device-tree "reg" property could be coded on 64 bits.
> > Change reg type and of_property_read_ to make it works.
>
> On platforms with #address-cells=1, this isn't going to do what you
> think. Worse, it's not even going to fail, because you *can* read a
> 64-bit value from an address cell with a size cell after it...

Apologies, this was a hack and in no way ready for submission.

While I've got you here, what would be the best way to handle this?
Since previous generations #address-cells=1 and #size-cells=1, where
the rk356x #address-cells=2 and #size-cells=2 and we need to account
for both of them.

Thanks,
Peter

>
> Robin.
>
> > Signed-off-by: Peter Geis <pgwipeout@gmail.com>
> > Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> > ---
> >   drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 4 ++--
> >   1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> > index 46ebdb1460a3d..45518f96d7217 100644
> > --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> > +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> > @@ -1068,7 +1068,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
> >       struct rockchip_usb2phy *rphy;
> >       const struct rockchip_usb2phy_cfg *phy_cfgs;
> >       const struct of_device_id *match;
> > -     unsigned int reg;
> > +     u64 reg;
> >       int index, ret;
> >
> >       rphy = devm_kzalloc(dev, sizeof(*rphy), GFP_KERNEL);
> > @@ -1098,7 +1098,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
> >               rphy->usbgrf = NULL;
> >       }
> >
> > -     if (of_property_read_u32(np, "reg", &reg)) {
> > +     if (of_property_read_u64(np, "reg", &reg)) {
> >               dev_err(dev, "the reg property is not assigned in %pOFn node\n",
> >                       np);
> >               return -EINVAL;
> >

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Re: [PATCH 3/4] PHY: rockchip: USB2: Allow 64 bits reg property

[Peter Geis]

On Mon, Jun 14, 2021 at 1:09 PM Robin Murphy <robin.murphy@arm.com> wrote:
>
> On 2021-06-14 16:43, Benjamin Gaignard wrote:
> > In rk356x device-tree "reg" property could be coded on 64 bits.
> > Change reg type and of_property_read_ to make it works.
>
> On platforms with #address-cells=1, this isn't going to do what you
> think. Worse, it's not even going to fail, because you *can* read a
> 64-bit value from an address cell with a size cell after it...

Apologies, this was a hack and in no way ready for submission.

While I've got you here, what would be the best way to handle this?
Since previous generations #address-cells=1 and #size-cells=1, where
the rk356x #address-cells=2 and #size-cells=2 and we need to account
for both of them.

Thanks,
Peter

>
> Robin.
>
> > Signed-off-by: Peter Geis <pgwipeout@gmail.com>
> > Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> > ---
> >   drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 4 ++--
> >   1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> > index 46ebdb1460a3d..45518f96d7217 100644
> > --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> > +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> > @@ -1068,7 +1068,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
> >       struct rockchip_usb2phy *rphy;
> >       const struct rockchip_usb2phy_cfg *phy_cfgs;
> >       const struct of_device_id *match;
> > -     unsigned int reg;
> > +     u64 reg;
> >       int index, ret;
> >
> >       rphy = devm_kzalloc(dev, sizeof(*rphy), GFP_KERNEL);
> > @@ -1098,7 +1098,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
> >               rphy->usbgrf = NULL;
> >       }
> >
> > -     if (of_property_read_u32(np, "reg", &reg)) {
> > +     if (of_property_read_u64(np, "reg", &reg)) {
> >               dev_err(dev, "the reg property is not assigned in %pOFn node\n",
> >                       np);
> >               return -EINVAL;
> >

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Re: [PATCH 1/4] dt-bindings: phy: rockchip: USB2: remove useless #phy-cells property

[Rob Herring]

On Mon, 14 Jun 2021 17:43:56 +0200, Benjamin Gaignard wrote:
> '#phy-cells' property is needed in host-port and otg-port nodes but
> not in parent nodes. Remove it from the JSON schema.
> 
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> ---
>  .../devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml         | 2 --
>  1 file changed, 2 deletions(-)
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.example.dt.yaml: usb2-phy@e450: '#phy-cells' is a required property
	From schema: /usr/local/lib/python3.8/dist-packages/dtschema/schemas/phy/phy-provider.yaml
\ndoc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/patch/1491757

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.

Re: [PATCH 1/4] dt-bindings: phy: rockchip: USB2: remove useless #phy-cells property

[Rob Herring]

On Mon, 14 Jun 2021 17:43:56 +0200, Benjamin Gaignard wrote:
> '#phy-cells' property is needed in host-port and otg-port nodes but
> not in parent nodes. Remove it from the JSON schema.
> 
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> ---
>  .../devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml         | 2 --
>  1 file changed, 2 deletions(-)
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.example.dt.yaml: usb2-phy@e450: '#phy-cells' is a required property
	From schema: /usr/local/lib/python3.8/dist-packages/dtschema/schemas/phy/phy-provider.yaml
\ndoc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/patch/1491757

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.


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Re: [PATCH 1/4] dt-bindings: phy: rockchip: USB2: remove useless #phy-cells property

[Rob Herring]

On Mon, 14 Jun 2021 17:43:56 +0200, Benjamin Gaignard wrote:
> '#phy-cells' property is needed in host-port and otg-port nodes but
> not in parent nodes. Remove it from the JSON schema.
> 
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> ---
>  .../devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml         | 2 --
>  1 file changed, 2 deletions(-)
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.example.dt.yaml: usb2-phy@e450: '#phy-cells' is a required property
	From schema: /usr/local/lib/python3.8/dist-packages/dtschema/schemas/phy/phy-provider.yaml
\ndoc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/patch/1491757

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.


_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 1/4] dt-bindings: phy: rockchip: USB2: remove useless #phy-cells property

[Rob Herring]

On Mon, 14 Jun 2021 17:43:56 +0200, Benjamin Gaignard wrote:
> '#phy-cells' property is needed in host-port and otg-port nodes but
> not in parent nodes. Remove it from the JSON schema.
> 
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> ---
>  .../devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml         | 2 --
>  1 file changed, 2 deletions(-)
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.example.dt.yaml: usb2-phy@e450: '#phy-cells' is a required property
	From schema: /usr/local/lib/python3.8/dist-packages/dtschema/schemas/phy/phy-provider.yaml
\ndoc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/patch/1491757

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.


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Re: [PATCH 1/4] dt-bindings: phy: rockchip: USB2: remove useless #phy-cells property

[Rob Herring]

On Mon, Jun 14, 2021 at 05:43:56PM +0200, Benjamin Gaignard wrote:
> '#phy-cells' property is needed in host-port and otg-port nodes but
> not in parent nodes. Remove it from the JSON schema.

Pretty sure there's already a fix for this.

> 
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> ---
>  .../devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml         | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> index fb29ad807b68f..b14387a48f6a3 100644
> --- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> @@ -119,7 +119,6 @@ required:
>    - reg
>    - clock-output-names
>    - "#clock-cells"
> -  - "#phy-cells"
>    - host-port
>    - otg-port
>  
> @@ -137,7 +136,6 @@ examples:
>        clock-names = "phyclk";
>        clock-output-names = "clk_usbphy0_480m";
>        #clock-cells = <0>;
> -      #phy-cells = <0>;
>  
>        u2phy0_host: host-port {
>          #phy-cells = <0>;
> -- 
> 2.25.1

Re: [PATCH 1/4] dt-bindings: phy: rockchip: USB2: remove useless #phy-cells property

[Rob Herring]

On Mon, Jun 14, 2021 at 05:43:56PM +0200, Benjamin Gaignard wrote:
> '#phy-cells' property is needed in host-port and otg-port nodes but
> not in parent nodes. Remove it from the JSON schema.

Pretty sure there's already a fix for this.

> 
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> ---
>  .../devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml         | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> index fb29ad807b68f..b14387a48f6a3 100644
> --- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> @@ -119,7 +119,6 @@ required:
>    - reg
>    - clock-output-names
>    - "#clock-cells"
> -  - "#phy-cells"
>    - host-port
>    - otg-port
>  
> @@ -137,7 +136,6 @@ examples:
>        clock-names = "phyclk";
>        clock-output-names = "clk_usbphy0_480m";
>        #clock-cells = <0>;
> -      #phy-cells = <0>;
>  
>        u2phy0_host: host-port {
>          #phy-cells = <0>;
> -- 
> 2.25.1

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Re: [PATCH 1/4] dt-bindings: phy: rockchip: USB2: remove useless #phy-cells property

[Rob Herring]

On Mon, Jun 14, 2021 at 05:43:56PM +0200, Benjamin Gaignard wrote:
> '#phy-cells' property is needed in host-port and otg-port nodes but
> not in parent nodes. Remove it from the JSON schema.

Pretty sure there's already a fix for this.

> 
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> ---
>  .../devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml         | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> index fb29ad807b68f..b14387a48f6a3 100644
> --- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> @@ -119,7 +119,6 @@ required:
>    - reg
>    - clock-output-names
>    - "#clock-cells"
> -  - "#phy-cells"
>    - host-port
>    - otg-port
>  
> @@ -137,7 +136,6 @@ examples:
>        clock-names = "phyclk";
>        clock-output-names = "clk_usbphy0_480m";
>        #clock-cells = <0>;
> -      #phy-cells = <0>;
>  
>        u2phy0_host: host-port {
>          #phy-cells = <0>;
> -- 
> 2.25.1

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 1/4] dt-bindings: phy: rockchip: USB2: remove useless #phy-cells property

[Rob Herring]

On Mon, Jun 14, 2021 at 05:43:56PM +0200, Benjamin Gaignard wrote:
> '#phy-cells' property is needed in host-port and otg-port nodes but
> not in parent nodes. Remove it from the JSON schema.

Pretty sure there's already a fix for this.

> 
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> ---
>  .../devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml         | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> index fb29ad807b68f..b14387a48f6a3 100644
> --- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> @@ -119,7 +119,6 @@ required:
>    - reg
>    - clock-output-names
>    - "#clock-cells"
> -  - "#phy-cells"
>    - host-port
>    - otg-port
>  
> @@ -137,7 +136,6 @@ examples:
>        clock-names = "phyclk";
>        clock-output-names = "clk_usbphy0_480m";
>        #clock-cells = <0>;
> -      #phy-cells = <0>;
>  
>        u2phy0_host: host-port {
>          #phy-cells = <0>;
> -- 
> 2.25.1

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