From mboxrd@z Thu Jan 1 00:00:00 1970 From: shuang.he@intel.com Subject: Re: [PATCH] drm/i915: Ignore pipe B active state when enabling pipe C Date: 09 Mar 2015 05:17:10 -0700 Message-ID: <2d8c1b$k5s997@fmsmga001.fm.intel.com> References: <1425891578-24778-1-git-send-email-ander.conselvan.de.oliveira@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 785436E3DA for ; Mon, 9 Mar 2015 05:17:11 -0700 (PDT) In-Reply-To: <1425891578-24778-1-git-send-email-ander.conselvan.de.oliveira@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: shuang.he@intel.com, ethan.gao@intel.com, intel-gfx@lists.freedesktop.org, ander.conselvan.de.oliveira@intel.com List-Id: intel-gfx@lists.freedesktop.org VGVzdGVkLUJ5OiBQUkMgUUEgUFJUUyAoUGF0Y2ggUmVncmVzc2lvbiBUZXN0IFN5c3RlbSBDb250 YWN0OiBzaHVhbmcuaGVAaW50ZWwuY29tKQpUYXNrIGlkOiA1OTE1Ci0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tLS0tLS0tLS0tLS1TdW1tYXJ5LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLQpQbGF0Zm9ybSAgICAgICAgICBEZWx0YSAgICAgICAgICBkcm0taW50ZWwtbmlnaHRs eSAgICAgICAgICBTZXJpZXMgQXBwbGllZApQTlYgICAgICAgICAgICAgICAgIC0xICAgICAgICAg ICAgICAyODIvMjgyICAgICAgICAgICAgICAyODEvMjgyCklMSyAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAzMDgvMzA4ICAgICAgICAgICAgICAzMDgvMzA4ClNOQiAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAzMDcvMzA3ICAgICAgICAgICAgICAzMDcvMzA3CklWQiAg ICAgICAgICAgICAgICAgLTIgICAgICAgICAgICAgIDM3NS8zNzUgICAgICAgICAgICAgIDM3My8z NzUKQllUICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIDI5NC8yOTQgICAgICAgICAg ICAgIDI5NC8yOTQKSFNXICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIDM4NS8zODUg ICAgICAgICAgICAgIDM4NS8zODUKQkRXICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg IDMxNS8zMTUgICAgICAgICAgICAgIDMxNS8zMTUKLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tLURldGFpbGVkLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLQpQ bGF0Zm9ybSAgVGVzdCAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgZHJtLWludGVsLW5p Z2h0bHkgICAgICAgICAgU2VyaWVzIEFwcGxpZWQKKlBOViAgaWd0X2dlbV91c2VycHRyX2JsaXRz X21pbm9yLXVuc3luYy1ub3JtYWwgICAgICBQQVNTKDIpICAgICAgRE1FU0dfV0FSTigxKVBBU1Mo MSkKKklWQiAgaWd0X2Rydl9kZWJ1Z2ZzX3JlYWRlciAgICAgIFBBU1MoMikgICAgICBETUVTR19X QVJOKDIpCipJVkIgIGlndF9kcnZfaGFuZ21hbl9lcnJvci1zdGF0ZS1zeXNmcy1lbnRyeSAgICAg IFBBU1MoMikgICAgICBUSU1FT1VUKDIpCk5vdGU6IFlvdSBuZWVkIHRvIHBheSBtb3JlIGF0dGVu dGlvbiB0byBsaW5lIHN0YXJ0IHdpdGggJyonCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fCkludGVsLWdmeCBtYWlsaW5nIGxpc3QKSW50ZWwtZ2Z4QGxpc3Rz LmZyZWVkZXNrdG9wLm9yZwpodHRwOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlz dGluZm8vaW50ZWwtZ2Z4Cg==