From mboxrd@z Thu Jan 1 00:00:00 1970 From: Hans de Goede Subject: Re: [RFC PATCH 1/2] platform/x86: add Atom PMC quirk to disable SATA Date: Thu, 14 Dec 2017 11:53:30 +0100 Message-ID: <2dd8be86-496d-1136-9cc2-0e9e0ac30d41@redhat.com> References: <20170906204237.24x6fzlfmq7jmuce@sig21.net> <20170925191749.2oamusbajgs6clcg@sig21.net> <20170925192109.rty2fnm7c4jnj3vx@sig21.net> <34396652.fljU28PShI@aspire.rjw.lan> <20171213162206.GA7337@sig21.net> <1513193613.7000.58.camel@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Return-path: Received: from mail-wm0-f65.google.com ([74.125.82.65]:37258 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751753AbdLNKxd (ORCPT ); Thu, 14 Dec 2017 05:53:33 -0500 Received: by mail-wm0-f65.google.com with SMTP id f140so10526486wmd.2 for ; Thu, 14 Dec 2017 02:53:33 -0800 (PST) In-Reply-To: <1513193613.7000.58.camel@linux.intel.com> Content-Language: en-US Sender: linux-acpi-owner@vger.kernel.org List-Id: linux-acpi@vger.kernel.org To: Andy Shevchenko , Johannes Stezenbach Cc: Michael Turquette , "Rafael J. Wysocki" , Mika Westerberg , Pierre-Louis Bossart , linux-clk , Linux PM list , Carlo Caione , Darren Hart , Enric Balletbo i Serra , Takashi Iwai , ACPI Devel Maling List Hi, On 13-12-17 20:33, Andy Shevchenko wrote: > On Wed, 2017-12-13 at 17:37 +0100, Hans de Goede wrote: >> Hi, >> >> On 13-12-17 17:22, Johannes Stezenbach wrote: >>> > > >>> Please don't get confused with the other thread about clocks. >>> This issue sets the "disable IP" bit, found by doing stupid >>> experiments to enable S0ix on E200HA. >> >> Ah my bad. > > Oh, perhaps I also need to refresh my memory from that buglink. > >>> 1. no idea if Cherry Trail even has SATA IP, maybe this is a >>> meaningless bit but PMC firmware carried over from >>> Bay Trail looks at it >> >> >> There are no CHT SoCs with SATA AFAIK, but Braswell SoCs, >> which I believe is the same die do have SATA. >> >> I think the best fix here is to look at the model-string part >> of the CPU-id and do a quirk based on that, setting the "disable IP" >> bit for the SATA on all SoC models known to not have SATA >> (Z8300, Z8350, Z8500, Z8550, Z8700, Z8750). >> >> Rafael, Andy how does that sound as a solution? > > Yeah, that bit is a property of PMC microcontroller and thus belongs to > its driver in Linux kernel. > > To make it strict we need a matching property. AFAIR CPU model ID is all > the same for all CHT and BSW SoCs, so, can't be used to distinguish > them. So, you are thinking about comparing CPU model name then? Yes CPU model name. > It might work. However, SATA itself is a part of PCH, and thus can not > exactly be matched by CPU ID. AFAIK the PCH is integrated, at least with the Z83xx Z85xx and X87xx models. So using a CPU model name match seems a better solution to me then DMI product-name matching, as the CPU model name match should fix this for all devices with such a SoC. > Btw, Pentium Celeron N-series according to spec has SATA host. Right as I said the Braswell models do have SATA. Regards, Hans