From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45018) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fN72B-00025s-Qz for qemu-devel@nongnu.org; Sun, 27 May 2018 21:33:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fN728-0003kp-Mv for qemu-devel@nongnu.org; Sun, 27 May 2018 21:33:15 -0400 Received: from mail-qt0-x244.google.com ([2607:f8b0:400d:c0d::244]:36523) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fN728-0003kC-Il for qemu-devel@nongnu.org; Sun, 27 May 2018 21:33:12 -0400 Received: by mail-qt0-x244.google.com with SMTP id q6-v6so13226531qtn.3 for ; Sun, 27 May 2018 18:33:12 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= References: <20180527141324.11937-1-richard.henderson@linaro.org> <20180527141324.11937-6-richard.henderson@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: <2df86023-58d6-2588-e88d-4a3a469d43c0@amsat.org> Date: Sun, 27 May 2018 22:33:09 -0300 MIME-Version: 1.0 In-Reply-To: <20180527141324.11937-6-richard.henderson@linaro.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH 05/20] target/openrisc: Split out is_user List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson , qemu-devel@nongnu.org Cc: Stafford Horne On 05/27/2018 11:13 AM, Richard Henderson wrote: > This allows us to limit the amount of ifdefs and isolate > the test for usermode. > > Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé > --- > target/openrisc/translate.c | 27 ++++++++++++--------------- > 1 file changed, 12 insertions(+), 15 deletions(-) > > diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c > index a8afb9a562..61e6deef69 100644 > --- a/target/openrisc/translate.c > +++ b/target/openrisc/translate.c > @@ -54,6 +54,15 @@ typedef struct DisasContext { > target_ulong jmp_pc_imm; > } DisasContext; > > +static inline bool is_user(DisasContext *dc) > +{ > +#ifdef CONFIG_USER_ONLY > + return true; > +#else > + return dc->mem_idx == MMU_USER_IDX; > +#endif > +} > + > /* Include the auto-generated decoder. */ > #include "decode.inc.c" > > @@ -914,17 +923,13 @@ static bool trans_l_mfspr(DisasContext *dc, arg_l_mfspr *a, uint32_t insn) > LOG_DIS("l.mfspr r%d, r%d, %d\n", a->d, a->a, a->k); > check_r0_write(a->d); > > -#ifdef CONFIG_USER_ONLY > - gen_illegal_exception(dc); > -#else > - if (dc->mem_idx == MMU_USER_IDX) { > + if (is_user(dc)) { > gen_illegal_exception(dc); > } else { > TCGv_i32 ti = tcg_const_i32(a->k); > gen_helper_mfspr(cpu_R[a->d], cpu_env, cpu_R[a->d], cpu_R[a->a], ti); > tcg_temp_free_i32(ti); > } > -#endif > return true; > } > > @@ -932,17 +937,13 @@ static bool trans_l_mtspr(DisasContext *dc, arg_l_mtspr *a, uint32_t insn) > { > LOG_DIS("l.mtspr r%d, r%d, %d\n", a->a, a->b, a->k); > > -#ifdef CONFIG_USER_ONLY > - gen_illegal_exception(dc); > -#else > - if (dc->mem_idx == MMU_USER_IDX) { > + if (is_user(dc)) { > gen_illegal_exception(dc); > } else { > TCGv_i32 ti = tcg_const_i32(a->k); > gen_helper_mtspr(cpu_env, cpu_R[a->a], cpu_R[a->b], ti); > tcg_temp_free_i32(ti); > } > -#endif > return true; > } > > @@ -1204,16 +1205,12 @@ static bool trans_l_rfe(DisasContext *dc, arg_l_rfe *a, uint32_t insn) > { > LOG_DIS("l.rfe\n"); > > -#ifdef CONFIG_USER_ONLY > - gen_illegal_exception(dc); > -#else > - if (dc->mem_idx == MMU_USER_IDX) { > + if (is_user(dc)) { > gen_illegal_exception(dc); > } else { > gen_helper_rfe(cpu_env); > dc->base.is_jmp = DISAS_EXIT; > } > -#endif > return true; > } > >