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From: Xingyu Wu <xingyu.wu@starfivetech.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	William Qiu <william.qiu@starfivetech.com>
Cc: <linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>,
	"Michael Turquette" <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	Conor Dooley <conor@kernel.org>,
	"Emil Renner Berthing" <kernel@esmil.dk>,
	Rob Herring <robh+dt@kernel.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Hal Feng <hal.feng@starfivetech.com>,
	<linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org>
Subject: Re: [PATCH v2 3/6] dt-bindings: soc: starfive: syscon: Add optional patternProperties
Date: Mon, 20 Mar 2023 16:26:09 +0800	[thread overview]
Message-ID: <2eb0380e-bbb7-83fd-3916-9bdd8b068334@starfivetech.com> (raw)
In-Reply-To: <a65697f4-0a75-23e2-517c-2784b0c382bc@linaro.org>

On 2023/3/20 15:40, Krzysztof Kozlowski wrote:
> On 20/03/2023 08:29, Xingyu Wu wrote:
>> On 2023/3/20 14:37, Krzysztof Kozlowski wrote:
>>> On 20/03/2023 04:54, Xingyu Wu wrote:
>>>> On 2023/3/19 20:28, Krzysztof Kozlowski wrote:
>>>>> On 16/03/2023 04:05, Xingyu Wu wrote:
>>>>>> Add optional compatible and patternProperties.
>>>>>>
>>>>>> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
>>>>>> ---
>>>>>>  .../soc/starfive/starfive,jh7110-syscon.yaml  | 39 ++++++++++++++++---
>>>>>>  1 file changed, 33 insertions(+), 6 deletions(-)
>>>>>>
>>>>>> diff --git a/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
>>>>>> index ae7f1d6916af..b61d8921ef42 100644
>>>>>> --- a/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
>>>>>> +++ b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
>>>>>> @@ -15,16 +15,31 @@ description: |
>>>>>>  
>>>>>>  properties:
>>>>>>    compatible:
>>>>>> -    items:
>>>>>> -      - enum:
>>>>>> -          - starfive,jh7110-aon-syscon
>>>>>> -          - starfive,jh7110-stg-syscon
>>>>>> -          - starfive,jh7110-sys-syscon
>>>>>> -      - const: syscon
>>>>>> +    oneOf:
>>>>>> +      - items:
>>>>>> +          - enum:
>>>>>> +              - starfive,jh7110-aon-syscon
>>>>>> +              - starfive,jh7110-stg-syscon
>>>>>> +              - starfive,jh7110-sys-syscon
>>>>>> +          - const: syscon
>>>>>> +      - items:
>>>>>> +          - enum:
>>>>>> +              - starfive,jh7110-aon-syscon
>>>>>> +              - starfive,jh7110-stg-syscon
>>>>>> +              - starfive,jh7110-sys-syscon
>>>>>> +          - const: syscon
>>>>>> +          - const: simple-mfd
> 
> BTW, this also looks wrong. You just said that clock controller exists
> only in few variants. Also, why sometimes the same device  goes with
> simple-mfd and sometimies without? It's the same device.

Oh yes, If modified to:

oneOf:
      - items:
          - enum:
              - starfive,jh7110-aon-syscon
              - starfive,jh7110-stg-syscon
          - const: syscon
      - items:
          - const: starfive,jh7110-sys-syscon
          - const: syscon
          - const: simple-mfd

Or:

     - minItems: 2
       items:
         - enum:
             - starfive,jh7110-aon-syscon
             - starfive,jh7110-stg-syscon
             - starfive,jh7110-sys-syscon
         - const: syscon
         - const: simple-mfd


Which one is better?

> 
>>>>>>  
>>>>>>    reg:
>>>>>>      maxItems: 1
>>>>>>  
>>>>>> +patternProperties:
>>>>>> +  # Optional children
>>>>>> +  "pll-clock-controller":
>>>>>
>>>>> It's not a pattern.
>>>>
>>>> Does it use 'properties' instead of 'patternProperties'?
>>>
>>> Yes.
>>>
>>>>
>>>>>
>>>>> Anyway should be clock-controller
>>>>
>>>> Will fix.
>>>>
>>>>>
>>>>>> +    type: object
>>>>>> +    $ref: /schemas/clock/starfive,jh7110-pll.yaml#
>>>>>> +    description: Clock provider for PLL.
>>>>>> +
>>>>>
>>>>> You just added these bindings! So the initial submission was incomplete
>>>>> on purpose?
>>>>>
>>>>> No, add complete bindings.
>>>>
>>>> Does you mean that it should drop the 'description', or add complete 'description',
>>>> or add 'compatible', 'clocks' and 'clock-cells' of complete clock-controller bindings?
>>>
>>> It means it should be squashed with the patch which adds it.
>> 
>> Should I drop the 'decription' here and keep the 'decription' in patch1?
> 
> There should be no this patch at all. However I do not understand what
> you want to do with description. What's wrong with description?

I thought you were commenting under description, saying a conflict with pll dtbindings' description.
Is that mean I should add it in the syscon patch fo william not this patchset?

>> 
>>>
>>>>
>>>>>
>>>>>>  required:
>>>>>>    - compatible
>>>>>>    - reg
>>>>>> @@ -38,4 +53,16 @@ examples:
>>>>>>          reg = <0x10240000 0x1000>;
>>>>>>      };
>>>>>>  
>>>>>> +  - |
>>>>>> +    syscon@13030000 {
>>>>>
>>>>> No need for new example... Just put it in existing one.
>>>>>
>>>>
>>>> Actually, the PLL clock-controller are just set in sys-syscon resgisters. The stg-syscon and
>>>> aon-syscon don't need it. So PLL clock-controller node only is added in sys-syscon node.
>>>
>>> So why having other examples if they are included here? Drop them.
>>>
>> 
>> Should I drop the old example of stg-syscon and add a new example of sys-syscon which
>> include clock-controller child node?
> 
> No, there should be no stg-syscon example, it's useless.
> 

Thanks. I will remind william to use sys-syscon example instead.

Best regards,
Xingyu Wu


WARNING: multiple messages have this Message-ID (diff)
From: Xingyu Wu <xingyu.wu@starfivetech.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	William Qiu <william.qiu@starfivetech.com>
Cc: <linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>,
	"Michael Turquette" <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	Conor Dooley <conor@kernel.org>,
	"Emil Renner Berthing" <kernel@esmil.dk>,
	Rob Herring <robh+dt@kernel.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Hal Feng <hal.feng@starfivetech.com>,
	<linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org>
Subject: Re: [PATCH v2 3/6] dt-bindings: soc: starfive: syscon: Add optional patternProperties
Date: Mon, 20 Mar 2023 16:26:09 +0800	[thread overview]
Message-ID: <2eb0380e-bbb7-83fd-3916-9bdd8b068334@starfivetech.com> (raw)
In-Reply-To: <a65697f4-0a75-23e2-517c-2784b0c382bc@linaro.org>

On 2023/3/20 15:40, Krzysztof Kozlowski wrote:
> On 20/03/2023 08:29, Xingyu Wu wrote:
>> On 2023/3/20 14:37, Krzysztof Kozlowski wrote:
>>> On 20/03/2023 04:54, Xingyu Wu wrote:
>>>> On 2023/3/19 20:28, Krzysztof Kozlowski wrote:
>>>>> On 16/03/2023 04:05, Xingyu Wu wrote:
>>>>>> Add optional compatible and patternProperties.
>>>>>>
>>>>>> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
>>>>>> ---
>>>>>>  .../soc/starfive/starfive,jh7110-syscon.yaml  | 39 ++++++++++++++++---
>>>>>>  1 file changed, 33 insertions(+), 6 deletions(-)
>>>>>>
>>>>>> diff --git a/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
>>>>>> index ae7f1d6916af..b61d8921ef42 100644
>>>>>> --- a/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
>>>>>> +++ b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
>>>>>> @@ -15,16 +15,31 @@ description: |
>>>>>>  
>>>>>>  properties:
>>>>>>    compatible:
>>>>>> -    items:
>>>>>> -      - enum:
>>>>>> -          - starfive,jh7110-aon-syscon
>>>>>> -          - starfive,jh7110-stg-syscon
>>>>>> -          - starfive,jh7110-sys-syscon
>>>>>> -      - const: syscon
>>>>>> +    oneOf:
>>>>>> +      - items:
>>>>>> +          - enum:
>>>>>> +              - starfive,jh7110-aon-syscon
>>>>>> +              - starfive,jh7110-stg-syscon
>>>>>> +              - starfive,jh7110-sys-syscon
>>>>>> +          - const: syscon
>>>>>> +      - items:
>>>>>> +          - enum:
>>>>>> +              - starfive,jh7110-aon-syscon
>>>>>> +              - starfive,jh7110-stg-syscon
>>>>>> +              - starfive,jh7110-sys-syscon
>>>>>> +          - const: syscon
>>>>>> +          - const: simple-mfd
> 
> BTW, this also looks wrong. You just said that clock controller exists
> only in few variants. Also, why sometimes the same device  goes with
> simple-mfd and sometimies without? It's the same device.

Oh yes, If modified to:

oneOf:
      - items:
          - enum:
              - starfive,jh7110-aon-syscon
              - starfive,jh7110-stg-syscon
          - const: syscon
      - items:
          - const: starfive,jh7110-sys-syscon
          - const: syscon
          - const: simple-mfd

Or:

     - minItems: 2
       items:
         - enum:
             - starfive,jh7110-aon-syscon
             - starfive,jh7110-stg-syscon
             - starfive,jh7110-sys-syscon
         - const: syscon
         - const: simple-mfd


Which one is better?

> 
>>>>>>  
>>>>>>    reg:
>>>>>>      maxItems: 1
>>>>>>  
>>>>>> +patternProperties:
>>>>>> +  # Optional children
>>>>>> +  "pll-clock-controller":
>>>>>
>>>>> It's not a pattern.
>>>>
>>>> Does it use 'properties' instead of 'patternProperties'?
>>>
>>> Yes.
>>>
>>>>
>>>>>
>>>>> Anyway should be clock-controller
>>>>
>>>> Will fix.
>>>>
>>>>>
>>>>>> +    type: object
>>>>>> +    $ref: /schemas/clock/starfive,jh7110-pll.yaml#
>>>>>> +    description: Clock provider for PLL.
>>>>>> +
>>>>>
>>>>> You just added these bindings! So the initial submission was incomplete
>>>>> on purpose?
>>>>>
>>>>> No, add complete bindings.
>>>>
>>>> Does you mean that it should drop the 'description', or add complete 'description',
>>>> or add 'compatible', 'clocks' and 'clock-cells' of complete clock-controller bindings?
>>>
>>> It means it should be squashed with the patch which adds it.
>> 
>> Should I drop the 'decription' here and keep the 'decription' in patch1?
> 
> There should be no this patch at all. However I do not understand what
> you want to do with description. What's wrong with description?

I thought you were commenting under description, saying a conflict with pll dtbindings' description.
Is that mean I should add it in the syscon patch fo william not this patchset?

>> 
>>>
>>>>
>>>>>
>>>>>>  required:
>>>>>>    - compatible
>>>>>>    - reg
>>>>>> @@ -38,4 +53,16 @@ examples:
>>>>>>          reg = <0x10240000 0x1000>;
>>>>>>      };
>>>>>>  
>>>>>> +  - |
>>>>>> +    syscon@13030000 {
>>>>>
>>>>> No need for new example... Just put it in existing one.
>>>>>
>>>>
>>>> Actually, the PLL clock-controller are just set in sys-syscon resgisters. The stg-syscon and
>>>> aon-syscon don't need it. So PLL clock-controller node only is added in sys-syscon node.
>>>
>>> So why having other examples if they are included here? Drop them.
>>>
>> 
>> Should I drop the old example of stg-syscon and add a new example of sys-syscon which
>> include clock-controller child node?
> 
> No, there should be no stg-syscon example, it's useless.
> 

Thanks. I will remind william to use sys-syscon example instead.

Best regards,
Xingyu Wu


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2023-03-20  8:26 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-16  3:05 [PATCH v2 0/6] Add PLL clocks driver for StarFive JH7110 SoC Xingyu Wu
2023-03-16  3:05 ` Xingyu Wu
2023-03-16  3:05 ` [PATCH v2 1/6] dt-bindings: clock: Add StarFive JH7110 PLL clock generator Xingyu Wu
2023-03-16  3:05   ` Xingyu Wu
2023-03-19 12:25   ` Krzysztof Kozlowski
2023-03-19 12:25     ` Krzysztof Kozlowski
2023-03-20  2:41     ` Xingyu Wu
2023-03-20  2:41       ` Xingyu Wu
2023-03-16  3:05 ` [PATCH v2 2/6] clk: starfive: Add StarFive JH7110 PLL clock driver Xingyu Wu
2023-03-16  3:05   ` Xingyu Wu
2023-03-16  3:05 ` [PATCH v2 3/6] dt-bindings: soc: starfive: syscon: Add optional patternProperties Xingyu Wu
2023-03-16  3:05   ` Xingyu Wu
2023-03-19 12:28   ` Krzysztof Kozlowski
2023-03-19 12:28     ` Krzysztof Kozlowski
2023-03-20  3:54     ` Xingyu Wu
2023-03-20  3:54       ` Xingyu Wu
2023-03-20  6:37       ` Krzysztof Kozlowski
2023-03-20  6:37         ` Krzysztof Kozlowski
2023-03-20  7:29         ` Xingyu Wu
2023-03-20  7:29           ` Xingyu Wu
2023-03-20  7:40           ` Krzysztof Kozlowski
2023-03-20  7:40             ` Krzysztof Kozlowski
2023-03-20  8:26             ` Xingyu Wu [this message]
2023-03-20  8:26               ` Xingyu Wu
2023-03-20  8:36               ` Krzysztof Kozlowski
2023-03-20  8:36                 ` Krzysztof Kozlowski
2023-03-20  9:16                 ` Xingyu Wu
2023-03-20  9:16                   ` Xingyu Wu
2023-03-16  3:05 ` [PATCH v2 4/6] dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs Xingyu Wu
2023-03-16  3:05   ` Xingyu Wu
2023-03-19 12:25   ` Krzysztof Kozlowski
2023-03-19 12:25     ` Krzysztof Kozlowski
2023-03-16  3:05 ` [PATCH v2 5/6] clk: starfive: jh7110-sys: Modify PLL clocks source Xingyu Wu
2023-03-16  3:05   ` Xingyu Wu
2023-03-16  3:05 ` [PATCH v2 6/6] riscv: dts: starfive: jh7110: Add PLL clock node and modify syscrg node Xingyu Wu
2023-03-16  3:05   ` Xingyu Wu

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