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Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.4.1 Subject: Re: [PATCHv2 1/3] block: introduce rq_list_for_each_safe macro Content-Language: en-US To: Keith Busch CC: Christoph Hellwig , , , , References: <20211227164138.2488066-1-kbusch@kernel.org> <20211229173902.GA28058@lst.de> <20211229205738.GA2493133@dhcp-10-100-145-180.wdc.com> <99b389d6-b18b-7c3b-decb-66c4563dd37b@nvidia.com> <20211230153018.GD2493133@dhcp-10-100-145-180.wdc.com> From: Max Gurtovoy In-Reply-To: <20211230153018.GD2493133@dhcp-10-100-145-180.wdc.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [172.20.187.6] X-ClientProxiedBy: HQMAIL105.nvidia.com (172.20.187.12) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: dfda783e-ce82-4e0f-d74c-08d9ceccf637 X-MS-TrafficTypeDiagnostic: DM5PR1201MB0155:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:10000; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Jan 2022 15:23:14.8047 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: dfda783e-ce82-4e0f-d74c-08d9ceccf637 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.236];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT053.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR1201MB0155 Precedence: bulk List-ID: X-Mailing-List: linux-block@vger.kernel.org On 12/30/2021 5:30 PM, Keith Busch wrote: > On Thu, Dec 30, 2021 at 04:38:57PM +0200, Max Gurtovoy wrote: >> On 12/29/2021 10:57 PM, Keith Busch wrote: >>> On Wed, Dec 29, 2021 at 06:39:02PM +0100, Christoph Hellwig wrote: >>>> (except for the fact that it, just like the other rq_list helpers >>>> really should go into blk-mq.h, where all request related bits moved >>>> early in this cycle) >>> Agreed, I just put it here because it's where the other macros live. But >>> 'struct request' doesn't exist in this header, so it does seem out of >>> place. For v3, I'll add a preceding patch to move them all to blk-mq.h. >> Did you see the discussion I had with Jens ? > I did, yes. That's when I noticed the error handling wasn't right, and > doing it correctly was a bit clunky. This series was supposed to make it > easier for drivers to use the new interface. > >> Seems it works only for non-shared tagsets and it means that it will work >> only for NVMe devices that have 1 namespace and will not work for NVMf >> drivers. > I am aware shared tags don't get to use the batched queueing, but that's > orthogonal to this series. Yes. This series probably should be squashed to Jens's and merged together. > Most PCIe NVMe SSDs only have 1 namespace, so it generally works out for > those. There are SSDs that support NS management and also devices that support multiple NS (NVIDIA's NVMe SNAP device support many NSs). Also all the fabrics controllers support it. I don't think we need to restrict capable controllers from not working with the batching feature from day 1. > >> Unless, we'll do some changes in the block layer and/or remove this >> condition. > I think it just may work if we export blk_mq_get_driver_tag(). do you have a suggestion for the NVMe/PCI driver ? I can run it in my lab if you don't have an SSD with more than 1 NS..