From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 38C6CC54E94 for ; Wed, 25 Jan 2023 22:47:31 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 850D18546F; Wed, 25 Jan 2023 23:47:28 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=kwiboo.se Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kwiboo.se header.i=@kwiboo.se header.b="dNqVGBA2"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 757D08546F; Wed, 25 Jan 2023 23:47:26 +0100 (CET) Received: from wrqvxttq.outbound-mail.sendgrid.net (wrqvxttq.outbound-mail.sendgrid.net [149.72.167.116]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 3185084954 for ; Wed, 25 Jan 2023 23:47:23 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=kwiboo.se Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=bounces+31435339-7456-u-boot=lists.denx.de@em2124.kwiboo.se DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=mime-version:subject:references:from:in-reply-to:to:cc:content-type: content-transfer-encoding:cc:content-type:from:subject:to; s=s1; bh=3E1JhyLyN8+6eEwC1W9lnySUBWiDjVZNFb5e6xrzKh0=; b=dNqVGBA2Pr+OtgHejlFd2v+1iv+TUJVlCtafaaJsngyBOs2iwin5bbCrbGxo0F2N26yE MP/wjbaRUw+pUL+KK1YcMOXgY/g4Y83/0pFOf8NXeEckbhluc0Y7GO7sKWs/2OUIOg0EAP mUfYxSCkUs6/+d2DBfFgdAw3y4hQyLAfErq/cOw3PJEExz8bXMxI8uCxP5NwGp/UgnSm1K Yq9guxrIgOOTiiZDxUomTf8+2sw7dU8QMxPGCO4CJuoxCcPdAqNNed8pdhFy9i+w7c0mvC uBl/kMTebqg30Mg3T5MBZl5sHgmQyqcZJwmnokhiASdFdzoZusW1OcE6YLVSGgUg== Received: by filterdrecv-8569859b9-blmnd with SMTP id filterdrecv-8569859b9-blmnd-1-63D1B178-37 2023-01-25 22:47:21.0999111 +0000 UTC m=+5960428.716763090 Received: from [192.168.1.50] (unknown) by geopod-ismtpd-2-0 (SG) with ESMTP id 29ve4T11TDOXz45QEV-NcQ Wed, 25 Jan 2023 22:47:20.575 +0000 (UTC) Message-ID: <2efd56b6-4dc9-cd77-3792-e60142faa6ae@kwiboo.se> Date: Wed, 25 Jan 2023 22:47:21 +0000 (UTC) MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.6.1 Subject: Re: [RFC PATCH 00/16] arm: Add Rockchip RK3588 support Content-Language: en-US References: <20230125222741.303259-1-jagan@edgeble.ai> From: Jonas Karlman In-Reply-To: <20230125222741.303259-1-jagan@edgeble.ai> X-SG-EID: =?us-ascii?Q?TdbjyGynYnRZWhH+7lKUQJL+ZxmxpowvO2O9SQF5CwCVrYgcwUXgU5DKUU3QxA?= =?us-ascii?Q?fZekEeQsTe+RrMu3cja6a0hwzw=2FS+kCuMLg6bVt?= =?us-ascii?Q?2nHDRk+Bv2umCwC7aSnQleJ3rL5gjaTO9vf0ddt?= =?us-ascii?Q?irAAsMaPWYyXriC13UNewEtsvWPvrRqBiZsSyBv?= =?us-ascii?Q?70AoUFMFXFlDxMSUNjH8V5GEWz8Gslv4LZ9AaF+?= =?us-ascii?Q?=2F9Sv6tvQRNM2fJvPi74h3rX=2FR3wiF=2F+WGTM2of?= To: Jagan Teki , Kever Yang , Simon Glass , Philipp Tomsich , fatorangecat@189.cn Cc: u-boot@lists.denx.de X-Entity-ID: P7KYpSJvGCELWjBME/J5tg== Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Hi Jagan, On 2023-01-25 23:27, Jagan Teki wrote: > This series support Rockchip RK3588. All the device tree files are > synced from linux-next with the proper SHA1 mentioned in the commit > messages. > > Unfortunately, the BL31 from rkbin is not compatible with U-Boot so > it is failing to load ATF entry from SPL and hang. > > Verified below BL31 versions, > bl31-v1.15 > bl31-v1.21 > bl31-v1.22 > bl31-v1.23 > bl31-v1.24 > bl31-v1.25 > bl31-v1.26 > > Rever-engineered with respect to rockchip u-boot by using the same > FIT_GENERATOR being used in Mainline, rockchip u-boot is booting but > mainline showing the same issue. > > Log: > > LPDDR4X, 2112MHz01-00642-g6bdfd31756-dirty (Jan 26 2023 ���3:44:34 +0530) > channel[0] BW=16 Col=10 Bk=8 CS0 Row=17 CS1 Row=17 CS=2 Die BW=8 Size=4096MB > channel[1] BW=16 Col=10 Bk=8 CS0 Row=17 CS1 Row=17 CS=2 Die BW=8 Size=4096MB > channel[2] BW=16 Col=10 Bk=8 CS0 Row=17 CS1 Row=17 CS=2 Die BW=8 Size=4096MB > channel[3] BW=16 Col=10 Bk=8 CS0 Row=17 CS1 Row=17 CS=2 Die BW=8 Size=4096MB > change to F1: 528MHz > change to F2: 1068MHz > change to F3: 1560MHz > change to F0: 2112MHz > out > > U-Boot SPL 2023.01-00642-g6bdfd31756-dirty (Jan 26 2023 - 03:44:34 +0530) > Trying to boot from MMC1 > bl31_entry: atf_entry start > << hang >> > > Any information on BL31 for RK3588 please share. I had a similar strange booing issue with RK3568 and mainline U-Boot, turned out to be related to all parts of ATF not being properly loaded into PMU SRAM. Using my series at [1] I managed to get ATF to be fully loaded into PMU SRAM. Using CONFIG_SPL_FIT_SIGNATURE=y helped me finding out that the segment being loaded ended up corrupted. The use of 512 bytes alignment of the FIT helped mitigate that issue. Vendor U-Boot use a bounce buffer for all parts that is written into SRAM (anything loaded outside the gd->ram_base to gd->ram_top range). You can also find newer bl31 at [2], up to version v1.32. [1] https://patchwork.ozlabs.org/project/uboot/list/?series=337891 [2] https://gitlab.com/rk3588_linux/rk/rkbin/-/tree/linux-5.10-gen-rkr3.5/bin/rk35 Regards, Jonas > > Any inputs? > Jagan. > > Jagan Teki (16): > rockchip: mkimage: Add rk3588 support > arm: rockchip: Add cru header for rk3588 > arm: rockchip: Add grf header for rk3588 > dt-bindings: clk: Add dt-binding header for RK3588 > clk: rockchip: Add rk3588 clk support > clk: rockchip: pll: Add pll_rk3588 type for rk3588 > ram: rockchip: Add rk3588 ddr driver support > dt-bindings: power: Add power-domain header for rk3588 > dt-bindings: reset: add rk3588 reset definitions > arm: rockchip: Add ioc header for rk3588 > arm64: dts: rockchip: Add base DT for rk3588 SoC > arm64: dts: rockchip: rk3588: Add Edgeble Neu6 Model A SoM > arm64: dts: rockchip: rk3588: Add Edgeble Neu6 Model A IO > arm: rockchip: Add RK3588 arch core support > ARM: dts: rockchip: Add rk3588-u-boot.dtsi > board: rockchip: Add Edgeble Neural Compute Module 6 > > arch/arm/dts/Makefile | 3 + > .../dts/rk3588-edgeble-neu6a-io-u-boot.dtsi | 23 + > arch/arm/dts/rk3588-edgeble-neu6a-io.dts | 27 + > arch/arm/dts/rk3588-edgeble-neu6a.dtsi | 32 + > arch/arm/dts/rk3588-pinctrl.dtsi | 516 +++ > arch/arm/dts/rk3588-u-boot.dtsi | 101 + > arch/arm/dts/rk3588.dtsi | 58 + > arch/arm/dts/rk3588s-pinctrl.dtsi | 3403 +++++++++++++++++ > arch/arm/dts/rk3588s.dtsi | 1703 +++++++++ > arch/arm/include/asm/arch-rk3588/boot0.h | 11 + > arch/arm/include/asm/arch-rk3588/gpio.h | 11 + > arch/arm/include/asm/arch-rockchip/clock.h | 24 + > .../include/asm/arch-rockchip/cru_rk3588.h | 451 +++ > .../include/asm/arch-rockchip/grf_rk3588.h | 35 + > .../include/asm/arch-rockchip/ioc_rk3588.h | 102 + > arch/arm/mach-rockchip/Kconfig | 20 + > arch/arm/mach-rockchip/Makefile | 1 + > arch/arm/mach-rockchip/rk3588/Kconfig | 30 + > arch/arm/mach-rockchip/rk3588/Makefile | 9 + > arch/arm/mach-rockchip/rk3588/clk_rk3588.c | 33 + > arch/arm/mach-rockchip/rk3588/rk3588.c | 162 + > arch/arm/mach-rockchip/rk3588/syscon_rk3588.c | 32 + > board/edgeble/neural-compute-module-6/Kconfig | 15 + > .../neural-compute-module-6/MAINTAINERS | 6 + > .../edgeble/neural-compute-module-6/Makefile | 7 + > board/edgeble/neural-compute-module-6/neu6.c | 4 + > configs/neu6a-io-rk3588_defconfig | 68 + > doc/board/rockchip/rockchip.rst | 2 + > drivers/clk/rockchip/Makefile | 1 + > drivers/clk/rockchip/clk_pll.c | 267 +- > drivers/clk/rockchip/clk_rk3588.c | 2019 ++++++++++ > drivers/ram/rockchip/Makefile | 1 + > drivers/ram/rockchip/sdram_rk3588.c | 56 + > include/configs/neural-compute-module-6.h | 15 + > include/configs/rk3588_common.h | 32 + > .../dt-bindings/clock/rockchip,rk3588-cru.h | 766 ++++ > include/dt-bindings/power/rk3588-power.h | 69 + > .../dt-bindings/reset/rockchip,rk3588-cru.h | 754 ++++ > tools/rkcommon.c | 1 + > 39 files changed, 10867 insertions(+), 3 deletions(-) > create mode 100644 arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi > create mode 100644 arch/arm/dts/rk3588-edgeble-neu6a-io.dts > create mode 100644 arch/arm/dts/rk3588-edgeble-neu6a.dtsi > create mode 100644 arch/arm/dts/rk3588-pinctrl.dtsi > create mode 100644 arch/arm/dts/rk3588-u-boot.dtsi > create mode 100644 arch/arm/dts/rk3588.dtsi > create mode 100644 arch/arm/dts/rk3588s-pinctrl.dtsi > create mode 100644 arch/arm/dts/rk3588s.dtsi > create mode 100644 arch/arm/include/asm/arch-rk3588/boot0.h > create mode 100644 arch/arm/include/asm/arch-rk3588/gpio.h > create mode 100644 arch/arm/include/asm/arch-rockchip/cru_rk3588.h > create mode 100644 arch/arm/include/asm/arch-rockchip/grf_rk3588.h > create mode 100644 arch/arm/include/asm/arch-rockchip/ioc_rk3588.h > create mode 100644 arch/arm/mach-rockchip/rk3588/Kconfig > create mode 100644 arch/arm/mach-rockchip/rk3588/Makefile > create mode 100644 arch/arm/mach-rockchip/rk3588/clk_rk3588.c > create mode 100644 arch/arm/mach-rockchip/rk3588/rk3588.c > create mode 100644 arch/arm/mach-rockchip/rk3588/syscon_rk3588.c > create mode 100644 board/edgeble/neural-compute-module-6/Kconfig > create mode 100644 board/edgeble/neural-compute-module-6/MAINTAINERS > create mode 100644 board/edgeble/neural-compute-module-6/Makefile > create mode 100644 board/edgeble/neural-compute-module-6/neu6.c > create mode 100644 configs/neu6a-io-rk3588_defconfig > create mode 100644 drivers/clk/rockchip/clk_rk3588.c > create mode 100644 drivers/ram/rockchip/sdram_rk3588.c > create mode 100644 include/configs/neural-compute-module-6.h > create mode 100644 include/configs/rk3588_common.h > create mode 100644 include/dt-bindings/clock/rockchip,rk3588-cru.h > create mode 100644 include/dt-bindings/power/rk3588-power.h > create mode 100644 include/dt-bindings/reset/rockchip,rk3588-cru.h >