From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 650FAC433B4 for ; Tue, 18 May 2021 11:18:10 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2F17E610FA for ; Tue, 18 May 2021 11:18:10 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2F17E610FA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 068246EB2A; Tue, 18 May 2021 11:18:08 +0000 (UTC) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1C7226EB29; Tue, 18 May 2021 11:18:06 +0000 (UTC) IronPort-SDR: dJjFeXohCy8ZaYvYZ9zFO+Houp51/thwKfcpLs9aC7LvJsYlSJcCNQQPAhVZvtir6QpnVtsff8 JlAzgUNk7KQA== X-IronPort-AV: E=McAfee;i="6200,9189,9987"; a="286216186" X-IronPort-AV: E=Sophos;i="5.82,310,1613462400"; d="scan'208";a="286216186" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 May 2021 04:18:05 -0700 IronPort-SDR: PRwZUrCwFsNyxlkzuYo7sRA6gjLrk+SEVRVBnelmQKD9y1RqdcY2vV2TSsBk3NIIKXJvSxukTN iw3uMQJ7vY5g== X-IronPort-AV: E=Sophos;i="5.82,310,1613462400"; d="scan'208";a="439390742" Received: from cbackhau-mobl.ger.corp.intel.com (HELO [10.252.37.121]) ([10.252.37.121]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 May 2021 04:18:04 -0700 Subject: Re: [PATCH v2 02/15] drm/i915: Don't free shared locks while shared To: =?UTF-8?Q?Thomas_Hellstr=c3=b6m?= , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org References: <20210518082701.997251-1-thomas.hellstrom@linux.intel.com> <20210518082701.997251-3-thomas.hellstrom@linux.intel.com> From: Maarten Lankhorst Message-ID: <2f219b65-a27a-2939-6f3e-974ca2694bf1@linux.intel.com> Date: Tue, 18 May 2021 13:18:02 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.9.0 MIME-Version: 1.0 In-Reply-To: <20210518082701.997251-3-thomas.hellstrom@linux.intel.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Content-Language: en-US X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Op 18-05-2021 om 10:26 schreef Thomas Hellström: > We are currently sharing the VM reservation locks across a number of > gem objects with page-table memory. Since TTM will individiualize the > reservation locks when freeing objects, including accessing the shared > locks, make sure that the shared locks are not freed until that is done. > For PPGTT we add an additional refcount, for GGTT we take additional > measures to make sure objects sharing the GGTT reservation lock are > freed at GGTT takedown > > Signed-off-by: Thomas Hellström > --- > v2: Try harder to make sure objects sharing the GGTT reservation lock are > freed at GGTT takedown. > --- > drivers/gpu/drm/i915/gem/i915_gem_object.c | 3 ++ > .../gpu/drm/i915/gem/i915_gem_object_types.h | 1 + > drivers/gpu/drm/i915/gt/intel_ggtt.c | 19 ++++++-- > drivers/gpu/drm/i915/gt/intel_gtt.c | 45 +++++++++++++++---- > drivers/gpu/drm/i915/gt/intel_gtt.h | 30 ++++++++++++- > drivers/gpu/drm/i915/gt/intel_ppgtt.c | 2 +- > drivers/gpu/drm/i915/i915_drv.c | 5 +++ > 7 files changed, 92 insertions(+), 13 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c b/drivers/gpu/drm/i915/gem/i915_gem_object.c > index 28144410df86..abadf0994ad0 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_object.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c > @@ -252,6 +252,9 @@ static void __i915_gem_free_objects(struct drm_i915_private *i915, > if (obj->mm.n_placements > 1) > kfree(obj->mm.placements); > > + if (obj->resv_shared_from) > + i915_vm_resv_put(obj->resv_shared_from); > + > /* But keep the pointer alive for RCU-protected lookups */ > call_rcu(&obj->rcu, __i915_gem_free_object_rcu); > cond_resched(); > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h > index 0727d0c76aa0..450340a73186 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h > +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h > @@ -149,6 +149,7 @@ struct drm_i915_gem_object { > * when i915_gem_ww_ctx_backoff() or i915_gem_ww_ctx_fini() are called. > */ > struct list_head obj_link; > + struct dma_resv *resv_shared_from; Since this can only be a vm object, would it make sense to make this a pointer to the vm address space, so we can call vm_resv_put on it directly? The current pointer type and name makes it look generic, but if you try to use it with anything but an address space, it will blow up. Otherwise looks good. I guess we cannot force all bo's to be deleted before the vm is freed. :-) So with that fixed Reviewed-by: Maarten Lankhorst ~Maarten > union { > struct rcu_head rcu; > diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c > index 35069ca5d7de..10c23a749a95 100644 > --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c > +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c > @@ -746,7 +746,6 @@ static void ggtt_cleanup_hw(struct i915_ggtt *ggtt) > > mutex_unlock(&ggtt->vm.mutex); > i915_address_space_fini(&ggtt->vm); > - dma_resv_fini(&ggtt->vm.resv); > > arch_phys_wc_del(ggtt->mtrr); > > @@ -768,6 +767,19 @@ void i915_ggtt_driver_release(struct drm_i915_private *i915) > ggtt_cleanup_hw(ggtt); > } > > +/** > + * i915_ggtt_driver_late_release - Cleanup of GGTT that needs to be done after > + * all free objects have been drained. > + * @i915: i915 device > + */ > +void i915_ggtt_driver_late_release(struct drm_i915_private *i915) > +{ > + struct i915_ggtt *ggtt = &i915->ggtt; > + > + GEM_WARN_ON(kref_read(&ggtt->vm.resv_ref) != 1); > + dma_resv_fini(&ggtt->vm._resv); > +} > + > static unsigned int gen6_get_total_gtt_size(u16 snb_gmch_ctl) > { > snb_gmch_ctl >>= SNB_GMCH_GGMS_SHIFT; > @@ -829,6 +841,7 @@ static int ggtt_probe_common(struct i915_ggtt *ggtt, u64 size) > return -ENOMEM; > } > > + kref_init(&ggtt->vm.resv_ref); > ret = setup_scratch_page(&ggtt->vm); > if (ret) { > drm_err(&i915->drm, "Scratch setup failed\n"); > @@ -1135,7 +1148,7 @@ static int ggtt_probe_hw(struct i915_ggtt *ggtt, struct intel_gt *gt) > ggtt->vm.gt = gt; > ggtt->vm.i915 = i915; > ggtt->vm.dma = i915->drm.dev; > - dma_resv_init(&ggtt->vm.resv); > + dma_resv_init(&ggtt->vm._resv); > > if (INTEL_GEN(i915) <= 5) > ret = i915_gmch_probe(ggtt); > @@ -1144,7 +1157,7 @@ static int ggtt_probe_hw(struct i915_ggtt *ggtt, struct intel_gt *gt) > else > ret = gen8_gmch_probe(ggtt); > if (ret) { > - dma_resv_fini(&ggtt->vm.resv); > + dma_resv_fini(&ggtt->vm._resv); > return ret; > } > > diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c > index 9b98f9d9faa3..695b22b17644 100644 > --- a/drivers/gpu/drm/i915/gt/intel_gtt.c > +++ b/drivers/gpu/drm/i915/gt/intel_gtt.c > @@ -22,8 +22,11 @@ struct drm_i915_gem_object *alloc_pt_lmem(struct i915_address_space *vm, int sz) > * object underneath, with the idea that one object_lock() will lock > * them all at once. > */ > - if (!IS_ERR(obj)) > - obj->base.resv = &vm->resv; > + if (!IS_ERR(obj)) { > + obj->base.resv = i915_vm_resv_get(vm); > + obj->resv_shared_from = obj->base.resv; > + } > + > return obj; > } > > @@ -40,8 +43,11 @@ struct drm_i915_gem_object *alloc_pt_dma(struct i915_address_space *vm, int sz) > * object underneath, with the idea that one object_lock() will lock > * them all at once. > */ > - if (!IS_ERR(obj)) > - obj->base.resv = &vm->resv; > + if (!IS_ERR(obj)) { > + obj->base.resv = i915_vm_resv_get(vm); > + obj->resv_shared_from = obj->base.resv; > + } > + > return obj; > } > > @@ -102,7 +108,7 @@ void __i915_vm_close(struct i915_address_space *vm) > int i915_vm_lock_objects(struct i915_address_space *vm, > struct i915_gem_ww_ctx *ww) > { > - if (vm->scratch[0]->base.resv == &vm->resv) { > + if (vm->scratch[0]->base.resv == &vm->_resv) { > return i915_gem_object_lock(vm->scratch[0], ww); > } else { > struct i915_ppgtt *ppgtt = i915_vm_to_ppgtt(vm); > @@ -118,6 +124,22 @@ void i915_address_space_fini(struct i915_address_space *vm) > mutex_destroy(&vm->mutex); > } > > +/** > + * i915_vm_resv_release - Final struct i915_address_space destructor > + * @kref: Pointer to the &i915_address_space.resv_ref member. > + * > + * This function is called when the last lock sharer no longer shares the > + * &i915_address_space._resv lock. > + */ > +void i915_vm_resv_release(struct kref *kref) > +{ > + struct i915_address_space *vm = > + container_of(kref, typeof(*vm), resv_ref); > + > + dma_resv_fini(&vm->_resv); > + kfree(vm); > +} > + > static void __i915_vm_release(struct work_struct *work) > { > struct i915_address_space *vm = > @@ -125,9 +147,8 @@ static void __i915_vm_release(struct work_struct *work) > > vm->cleanup(vm); > i915_address_space_fini(vm); > - dma_resv_fini(&vm->resv); > > - kfree(vm); > + i915_vm_resv_put(&vm->_resv); > } > > void i915_vm_release(struct kref *kref) > @@ -144,6 +165,14 @@ void i915_vm_release(struct kref *kref) > void i915_address_space_init(struct i915_address_space *vm, int subclass) > { > kref_init(&vm->ref); > + > + /* > + * Special case for GGTT that has already done an early > + * kref_init here. > + */ > + if (!kref_read(&vm->resv_ref)) > + kref_init(&vm->resv_ref); > + > INIT_RCU_WORK(&vm->rcu, __i915_vm_release); > atomic_set(&vm->open, 1); > > @@ -170,7 +199,7 @@ void i915_address_space_init(struct i915_address_space *vm, int subclass) > might_alloc(GFP_KERNEL); > mutex_release(&vm->mutex.dep_map, _THIS_IP_); > } > - dma_resv_init(&vm->resv); > + dma_resv_init(&vm->_resv); > > GEM_BUG_ON(!vm->total); > drm_mm_init(&vm->mm, 0, vm->total); > diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h b/drivers/gpu/drm/i915/gt/intel_gtt.h > index ca00b45827b7..b1b687143144 100644 > --- a/drivers/gpu/drm/i915/gt/intel_gtt.h > +++ b/drivers/gpu/drm/i915/gt/intel_gtt.h > @@ -245,7 +245,9 @@ struct i915_address_space { > atomic_t open; > > struct mutex mutex; /* protects vma and our lists */ > - struct dma_resv resv; /* reservation lock for all pd objects, and buffer pool */ > + > + struct kref resv_ref; /* kref to keep the reservation lock alive. */ > + struct dma_resv _resv; /* reservation lock for all pd objects, and buffer pool */ > #define VM_CLASS_GGTT 0 > #define VM_CLASS_PPGTT 1 > #define VM_CLASS_DPT 2 > @@ -404,13 +406,38 @@ i915_vm_get(struct i915_address_space *vm) > return vm; > } > > +/** > + * i915_vm_resv_get - Obtain a reference on the vm's reservation lock > + * @vm: The vm whose reservation lock we want to share. > + * > + * Return: A pointer to the vm's reservation lock. > + */ > +static inline struct dma_resv *i915_vm_resv_get(struct i915_address_space *vm) > +{ > + kref_get(&vm->resv_ref); > + return &vm->_resv; > +} > + > void i915_vm_release(struct kref *kref); > > +void i915_vm_resv_release(struct kref *kref); > + > static inline void i915_vm_put(struct i915_address_space *vm) > { > kref_put(&vm->ref, i915_vm_release); > } > > +/** > + * i915_vm_resv_put - Release a reference on the vm's reservation lock > + * @resv: Pointer to a reservation lock obtained from i915_vm_resv_get() > + */ > +static inline void i915_vm_resv_put(struct dma_resv *resv) > +{ > + struct i915_address_space *vm = container_of(resv, typeof(*vm), _resv); > + > + kref_put(&vm->resv_ref, i915_vm_resv_release); > +} > + > static inline struct i915_address_space * > i915_vm_open(struct i915_address_space *vm) > { > @@ -506,6 +533,7 @@ void i915_ggtt_enable_guc(struct i915_ggtt *ggtt); > void i915_ggtt_disable_guc(struct i915_ggtt *ggtt); > int i915_init_ggtt(struct drm_i915_private *i915); > void i915_ggtt_driver_release(struct drm_i915_private *i915); > +void i915_ggtt_driver_late_release(struct drm_i915_private *i915); > > static inline bool i915_ggtt_has_aperture(const struct i915_ggtt *ggtt) > { > diff --git a/drivers/gpu/drm/i915/gt/intel_ppgtt.c b/drivers/gpu/drm/i915/gt/intel_ppgtt.c > index 4e3d80c2295c..aee3a8929245 100644 > --- a/drivers/gpu/drm/i915/gt/intel_ppgtt.c > +++ b/drivers/gpu/drm/i915/gt/intel_ppgtt.c > @@ -307,7 +307,7 @@ void ppgtt_init(struct i915_ppgtt *ppgtt, struct intel_gt *gt) > ppgtt->vm.dma = i915->drm.dev; > ppgtt->vm.total = BIT_ULL(INTEL_INFO(i915)->ppgtt_size); > > - dma_resv_init(&ppgtt->vm.resv); > + dma_resv_init(&ppgtt->vm._resv); > i915_address_space_init(&ppgtt->vm, VM_CLASS_PPGTT); > > ppgtt->vm.vma_ops.bind_vma = ppgtt_bind_vma; > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index 5118dc8386b2..92bccc5623a8 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -631,6 +631,8 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv) > intel_memory_regions_driver_release(dev_priv); > err_ggtt: > i915_ggtt_driver_release(dev_priv); > + i915_gem_drain_freed_objects(dev_priv); > + i915_ggtt_driver_late_release(dev_priv); > err_perf: > i915_perf_fini(dev_priv); > return ret; > @@ -880,6 +882,8 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent) > i915_driver_hw_remove(i915); > intel_memory_regions_driver_release(i915); > i915_ggtt_driver_release(i915); > + i915_gem_drain_freed_objects(i915); > + i915_ggtt_driver_late_release(i915); > out_cleanup_mmio: > i915_driver_mmio_release(i915); > out_runtime_pm_put: > @@ -936,6 +940,7 @@ static void i915_driver_release(struct drm_device *dev) > intel_memory_regions_driver_release(dev_priv); > i915_ggtt_driver_release(dev_priv); > i915_gem_drain_freed_objects(dev_priv); > + i915_ggtt_driver_late_release(dev_priv); > > i915_driver_mmio_release(dev_priv); > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 17DC8C433ED for ; Tue, 18 May 2021 11:18:12 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D28426117A for ; Tue, 18 May 2021 11:18:11 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D28426117A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E8DCC6EB29; Tue, 18 May 2021 11:18:07 +0000 (UTC) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1C7226EB29; Tue, 18 May 2021 11:18:06 +0000 (UTC) IronPort-SDR: dJjFeXohCy8ZaYvYZ9zFO+Houp51/thwKfcpLs9aC7LvJsYlSJcCNQQPAhVZvtir6QpnVtsff8 JlAzgUNk7KQA== X-IronPort-AV: E=McAfee;i="6200,9189,9987"; a="286216186" X-IronPort-AV: E=Sophos;i="5.82,310,1613462400"; d="scan'208";a="286216186" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 May 2021 04:18:05 -0700 IronPort-SDR: PRwZUrCwFsNyxlkzuYo7sRA6gjLrk+SEVRVBnelmQKD9y1RqdcY2vV2TSsBk3NIIKXJvSxukTN iw3uMQJ7vY5g== X-IronPort-AV: E=Sophos;i="5.82,310,1613462400"; d="scan'208";a="439390742" Received: from cbackhau-mobl.ger.corp.intel.com (HELO [10.252.37.121]) ([10.252.37.121]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 May 2021 04:18:04 -0700 To: =?UTF-8?Q?Thomas_Hellstr=c3=b6m?= , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org References: <20210518082701.997251-1-thomas.hellstrom@linux.intel.com> <20210518082701.997251-3-thomas.hellstrom@linux.intel.com> From: Maarten Lankhorst Message-ID: <2f219b65-a27a-2939-6f3e-974ca2694bf1@linux.intel.com> Date: Tue, 18 May 2021 13:18:02 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.9.0 MIME-Version: 1.0 In-Reply-To: <20210518082701.997251-3-thomas.hellstrom@linux.intel.com> Content-Language: en-US Subject: Re: [Intel-gfx] [PATCH v2 02/15] drm/i915: Don't free shared locks while shared X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" T3AgMTgtMDUtMjAyMSBvbSAxMDoyNiBzY2hyZWVmIFRob21hcyBIZWxsc3Ryw7ZtOgo+IFdlIGFy ZSBjdXJyZW50bHkgc2hhcmluZyB0aGUgVk0gcmVzZXJ2YXRpb24gbG9ja3MgYWNyb3NzIGEgbnVt YmVyIG9mCj4gZ2VtIG9iamVjdHMgd2l0aCBwYWdlLXRhYmxlIG1lbW9yeS4gU2luY2UgVFRNIHdp bGwgaW5kaXZpZGl1YWxpemUgdGhlCj4gcmVzZXJ2YXRpb24gbG9ja3Mgd2hlbiBmcmVlaW5nIG9i amVjdHMsIGluY2x1ZGluZyBhY2Nlc3NpbmcgdGhlIHNoYXJlZAo+IGxvY2tzLCBtYWtlIHN1cmUg dGhhdCB0aGUgc2hhcmVkIGxvY2tzIGFyZSBub3QgZnJlZWQgdW50aWwgdGhhdCBpcyBkb25lLgo+ IEZvciBQUEdUVCB3ZSBhZGQgYW4gYWRkaXRpb25hbCByZWZjb3VudCwgZm9yIEdHVFQgd2UgdGFr ZSBhZGRpdGlvbmFsCj4gbWVhc3VyZXMgdG8gbWFrZSBzdXJlIG9iamVjdHMgc2hhcmluZyB0aGUg R0dUVCByZXNlcnZhdGlvbiBsb2NrIGFyZQo+IGZyZWVkIGF0IEdHVFQgdGFrZWRvd24KPgo+IFNp Z25lZC1vZmYtYnk6IFRob21hcyBIZWxsc3Ryw7ZtIDx0aG9tYXMuaGVsbHN0cm9tQGxpbnV4Lmlu dGVsLmNvbT4KPiAtLS0KPiB2MjogVHJ5IGhhcmRlciB0byBtYWtlIHN1cmUgb2JqZWN0cyBzaGFy aW5nIHRoZSBHR1RUIHJlc2VydmF0aW9uIGxvY2sgYXJlCj4gZnJlZWQgYXQgR0dUVCB0YWtlZG93 bi4KPiAtLS0KPiAgZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVfZ2VtX29iamVjdC5jICAg IHwgIDMgKysKPiAgLi4uL2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1fb2JqZWN0X3R5cGVzLmgg IHwgIDEgKwo+ICBkcml2ZXJzL2dwdS9kcm0vaTkxNS9ndC9pbnRlbF9nZ3R0LmMgICAgICAgICAg fCAxOSArKysrKystLQo+ICBkcml2ZXJzL2dwdS9kcm0vaTkxNS9ndC9pbnRlbF9ndHQuYyAgICAg ICAgICAgfCA0NSArKysrKysrKysrKysrKystLS0tCj4gIGRyaXZlcnMvZ3B1L2RybS9pOTE1L2d0 L2ludGVsX2d0dC5oICAgICAgICAgICB8IDMwICsrKysrKysrKysrKy0KPiAgZHJpdmVycy9ncHUv ZHJtL2k5MTUvZ3QvaW50ZWxfcHBndHQuYyAgICAgICAgIHwgIDIgKy0KPiAgZHJpdmVycy9ncHUv ZHJtL2k5MTUvaTkxNV9kcnYuYyAgICAgICAgICAgICAgIHwgIDUgKysrCj4gIDcgZmlsZXMgY2hh bmdlZCwgOTIgaW5zZXJ0aW9ucygrKSwgMTMgZGVsZXRpb25zKC0pCj4KPiBkaWZmIC0tZ2l0IGEv ZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVfZ2VtX29iamVjdC5jIGIvZHJpdmVycy9ncHUv ZHJtL2k5MTUvZ2VtL2k5MTVfZ2VtX29iamVjdC5jCj4gaW5kZXggMjgxNDQ0MTBkZjg2Li5hYmFk ZjA5OTRhZDAgMTAwNjQ0Cj4gLS0tIGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVfZ2Vt X29iamVjdC5jCj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVfZ2VtX29iamVj dC5jCj4gQEAgLTI1Miw2ICsyNTIsOSBAQCBzdGF0aWMgdm9pZCBfX2k5MTVfZ2VtX2ZyZWVfb2Jq ZWN0cyhzdHJ1Y3QgZHJtX2k5MTVfcHJpdmF0ZSAqaTkxNSwKPiAgCQlpZiAob2JqLT5tbS5uX3Bs YWNlbWVudHMgPiAxKQo+ICAJCQlrZnJlZShvYmotPm1tLnBsYWNlbWVudHMpOwo+ICAKPiArCQlp ZiAob2JqLT5yZXN2X3NoYXJlZF9mcm9tKQo+ICsJCQlpOTE1X3ZtX3Jlc3ZfcHV0KG9iai0+cmVz dl9zaGFyZWRfZnJvbSk7Cj4gKwo+ICAJCS8qIEJ1dCBrZWVwIHRoZSBwb2ludGVyIGFsaXZlIGZv ciBSQ1UtcHJvdGVjdGVkIGxvb2t1cHMgKi8KPiAgCQljYWxsX3JjdSgmb2JqLT5yY3UsIF9faTkx NV9nZW1fZnJlZV9vYmplY3RfcmN1KTsKPiAgCQljb25kX3Jlc2NoZWQoKTsKPiBkaWZmIC0tZ2l0 IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVfZ2VtX29iamVjdF90eXBlcy5oIGIvZHJp dmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVfZ2VtX29iamVjdF90eXBlcy5oCj4gaW5kZXggMDcy N2QwYzc2YWEwLi40NTAzNDBhNzMxODYgMTAwNjQ0Cj4gLS0tIGEvZHJpdmVycy9ncHUvZHJtL2k5 MTUvZ2VtL2k5MTVfZ2VtX29iamVjdF90eXBlcy5oCj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL2k5 MTUvZ2VtL2k5MTVfZ2VtX29iamVjdF90eXBlcy5oCj4gQEAgLTE0OSw2ICsxNDksNyBAQCBzdHJ1 Y3QgZHJtX2k5MTVfZ2VtX29iamVjdCB7Cj4gIAkgKiB3aGVuIGk5MTVfZ2VtX3d3X2N0eF9iYWNr b2ZmKCkgb3IgaTkxNV9nZW1fd3dfY3R4X2ZpbmkoKSBhcmUgY2FsbGVkLgo+ICAJICovCj4gIAlz dHJ1Y3QgbGlzdF9oZWFkIG9ial9saW5rOwo+ICsJc3RydWN0IGRtYV9yZXN2ICpyZXN2X3NoYXJl ZF9mcm9tOwoKU2luY2UgdGhpcyBjYW4gb25seSBiZSBhIHZtIG9iamVjdCwgd291bGQgaXQgbWFr ZSBzZW5zZSB0byBtYWtlIHRoaXMgYSBwb2ludGVyIHRvIHRoZSB2bSBhZGRyZXNzIHNwYWNlLCBz byB3ZSBjYW4gY2FsbCB2bV9yZXN2X3B1dCBvbiBpdCBkaXJlY3RseT8KClRoZSBjdXJyZW50IHBv aW50ZXIgdHlwZSBhbmQgbmFtZSBtYWtlcyBpdCBsb29rIGdlbmVyaWMsIGJ1dCBpZiB5b3UgdHJ5 IHRvIHVzZSBpdCB3aXRoIGFueXRoaW5nIGJ1dCBhbiBhZGRyZXNzIHNwYWNlLCBpdCB3aWxsIGJs b3cgdXAuCgpPdGhlcndpc2UgbG9va3MgZ29vZC4gSSBndWVzcyB3ZSBjYW5ub3QgZm9yY2UgYWxs IGJvJ3MgdG8gYmUgZGVsZXRlZCBiZWZvcmUgdGhlIHZtIGlzIGZyZWVkLiA6LSkKClNvIHdpdGgg dGhhdCBmaXhlZAoKUmV2aWV3ZWQtYnk6IE1hYXJ0ZW4gTGFua2hvcnN0IDxtYWFydGVuLmxhbmto b3JzdEBsaW51eC5pbnRlbC5jb20+Cgp+TWFhcnRlbgoKPiAgCXVuaW9uIHsKPiAgCQlzdHJ1Y3Qg cmN1X2hlYWQgcmN1Owo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9ndC9pbnRl bF9nZ3R0LmMgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9ndC9pbnRlbF9nZ3R0LmMKPiBpbmRleCAz NTA2OWNhNWQ3ZGUuLjEwYzIzYTc0OWE5NSAxMDA2NDQKPiAtLS0gYS9kcml2ZXJzL2dwdS9kcm0v aTkxNS9ndC9pbnRlbF9nZ3R0LmMKPiArKysgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9ndC9pbnRl bF9nZ3R0LmMKPiBAQCAtNzQ2LDcgKzc0Niw2IEBAIHN0YXRpYyB2b2lkIGdndHRfY2xlYW51cF9o dyhzdHJ1Y3QgaTkxNV9nZ3R0ICpnZ3R0KQo+ICAKPiAgCW11dGV4X3VubG9jaygmZ2d0dC0+dm0u bXV0ZXgpOwo+ICAJaTkxNV9hZGRyZXNzX3NwYWNlX2ZpbmkoJmdndHQtPnZtKTsKPiAtCWRtYV9y ZXN2X2ZpbmkoJmdndHQtPnZtLnJlc3YpOwo+ICAKPiAgCWFyY2hfcGh5c193Y19kZWwoZ2d0dC0+ bXRycik7Cj4gIAo+IEBAIC03NjgsNiArNzY3LDE5IEBAIHZvaWQgaTkxNV9nZ3R0X2RyaXZlcl9y ZWxlYXNlKHN0cnVjdCBkcm1faTkxNV9wcml2YXRlICppOTE1KQo+ICAJZ2d0dF9jbGVhbnVwX2h3 KGdndHQpOwo+ICB9Cj4gIAo+ICsvKioKPiArICogaTkxNV9nZ3R0X2RyaXZlcl9sYXRlX3JlbGVh c2UgLSBDbGVhbnVwIG9mIEdHVFQgdGhhdCBuZWVkcyB0byBiZSBkb25lIGFmdGVyCj4gKyAqIGFs bCBmcmVlIG9iamVjdHMgaGF2ZSBiZWVuIGRyYWluZWQuCj4gKyAqIEBpOTE1OiBpOTE1IGRldmlj ZQo+ICsgKi8KPiArdm9pZCBpOTE1X2dndHRfZHJpdmVyX2xhdGVfcmVsZWFzZShzdHJ1Y3QgZHJt X2k5MTVfcHJpdmF0ZSAqaTkxNSkKPiArewo+ICsJc3RydWN0IGk5MTVfZ2d0dCAqZ2d0dCA9ICZp OTE1LT5nZ3R0Owo+ICsKPiArCUdFTV9XQVJOX09OKGtyZWZfcmVhZCgmZ2d0dC0+dm0ucmVzdl9y ZWYpICE9IDEpOwo+ICsJZG1hX3Jlc3ZfZmluaSgmZ2d0dC0+dm0uX3Jlc3YpOwo+ICt9Cj4gKwo+ ICBzdGF0aWMgdW5zaWduZWQgaW50IGdlbjZfZ2V0X3RvdGFsX2d0dF9zaXplKHUxNiBzbmJfZ21j aF9jdGwpCj4gIHsKPiAgCXNuYl9nbWNoX2N0bCA+Pj0gU05CX0dNQ0hfR0dNU19TSElGVDsKPiBA QCAtODI5LDYgKzg0MSw3IEBAIHN0YXRpYyBpbnQgZ2d0dF9wcm9iZV9jb21tb24oc3RydWN0IGk5 MTVfZ2d0dCAqZ2d0dCwgdTY0IHNpemUpCj4gIAkJcmV0dXJuIC1FTk9NRU07Cj4gIAl9Cj4gIAo+ ICsJa3JlZl9pbml0KCZnZ3R0LT52bS5yZXN2X3JlZik7Cj4gIAlyZXQgPSBzZXR1cF9zY3JhdGNo X3BhZ2UoJmdndHQtPnZtKTsKPiAgCWlmIChyZXQpIHsKPiAgCQlkcm1fZXJyKCZpOTE1LT5kcm0s ICJTY3JhdGNoIHNldHVwIGZhaWxlZFxuIik7Cj4gQEAgLTExMzUsNyArMTE0OCw3IEBAIHN0YXRp YyBpbnQgZ2d0dF9wcm9iZV9odyhzdHJ1Y3QgaTkxNV9nZ3R0ICpnZ3R0LCBzdHJ1Y3QgaW50ZWxf Z3QgKmd0KQo+ICAJZ2d0dC0+dm0uZ3QgPSBndDsKPiAgCWdndHQtPnZtLmk5MTUgPSBpOTE1Owo+ ICAJZ2d0dC0+dm0uZG1hID0gaTkxNS0+ZHJtLmRldjsKPiAtCWRtYV9yZXN2X2luaXQoJmdndHQt PnZtLnJlc3YpOwo+ICsJZG1hX3Jlc3ZfaW5pdCgmZ2d0dC0+dm0uX3Jlc3YpOwo+ICAKPiAgCWlm IChJTlRFTF9HRU4oaTkxNSkgPD0gNSkKPiAgCQlyZXQgPSBpOTE1X2dtY2hfcHJvYmUoZ2d0dCk7 Cj4gQEAgLTExNDQsNyArMTE1Nyw3IEBAIHN0YXRpYyBpbnQgZ2d0dF9wcm9iZV9odyhzdHJ1Y3Qg aTkxNV9nZ3R0ICpnZ3R0LCBzdHJ1Y3QgaW50ZWxfZ3QgKmd0KQo+ICAJZWxzZQo+ICAJCXJldCA9 IGdlbjhfZ21jaF9wcm9iZShnZ3R0KTsKPiAgCWlmIChyZXQpIHsKPiAtCQlkbWFfcmVzdl9maW5p KCZnZ3R0LT52bS5yZXN2KTsKPiArCQlkbWFfcmVzdl9maW5pKCZnZ3R0LT52bS5fcmVzdik7Cj4g IAkJcmV0dXJuIHJldDsKPiAgCX0KPiAgCj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9p OTE1L2d0L2ludGVsX2d0dC5jIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ3QvaW50ZWxfZ3R0LmMK PiBpbmRleCA5Yjk4ZjlkOWZhYTMuLjY5NWIyMmIxNzY0NCAxMDA2NDQKPiAtLS0gYS9kcml2ZXJz L2dwdS9kcm0vaTkxNS9ndC9pbnRlbF9ndHQuYwo+ICsrKyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1 L2d0L2ludGVsX2d0dC5jCj4gQEAgLTIyLDggKzIyLDExIEBAIHN0cnVjdCBkcm1faTkxNV9nZW1f b2JqZWN0ICphbGxvY19wdF9sbWVtKHN0cnVjdCBpOTE1X2FkZHJlc3Nfc3BhY2UgKnZtLCBpbnQg c3opCj4gIAkgKiBvYmplY3QgdW5kZXJuZWF0aCwgd2l0aCB0aGUgaWRlYSB0aGF0IG9uZSBvYmpl Y3RfbG9jaygpIHdpbGwgbG9jawo+ICAJICogdGhlbSBhbGwgYXQgb25jZS4KPiAgCSAqLwo+IC0J aWYgKCFJU19FUlIob2JqKSkKPiAtCQlvYmotPmJhc2UucmVzdiA9ICZ2bS0+cmVzdjsKPiArCWlm ICghSVNfRVJSKG9iaikpIHsKPiArCQlvYmotPmJhc2UucmVzdiA9IGk5MTVfdm1fcmVzdl9nZXQo dm0pOwo+ICsJCW9iai0+cmVzdl9zaGFyZWRfZnJvbSA9IG9iai0+YmFzZS5yZXN2Owo+ICsJfQo+ ICsKPiAgCXJldHVybiBvYmo7Cj4gIH0KPiAgCj4gQEAgLTQwLDggKzQzLDExIEBAIHN0cnVjdCBk cm1faTkxNV9nZW1fb2JqZWN0ICphbGxvY19wdF9kbWEoc3RydWN0IGk5MTVfYWRkcmVzc19zcGFj ZSAqdm0sIGludCBzeikKPiAgCSAqIG9iamVjdCB1bmRlcm5lYXRoLCB3aXRoIHRoZSBpZGVhIHRo YXQgb25lIG9iamVjdF9sb2NrKCkgd2lsbCBsb2NrCj4gIAkgKiB0aGVtIGFsbCBhdCBvbmNlLgo+ ICAJICovCj4gLQlpZiAoIUlTX0VSUihvYmopKQo+IC0JCW9iai0+YmFzZS5yZXN2ID0gJnZtLT5y ZXN2Owo+ICsJaWYgKCFJU19FUlIob2JqKSkgewo+ICsJCW9iai0+YmFzZS5yZXN2ID0gaTkxNV92 bV9yZXN2X2dldCh2bSk7Cj4gKwkJb2JqLT5yZXN2X3NoYXJlZF9mcm9tID0gb2JqLT5iYXNlLnJl c3Y7Cj4gKwl9Cj4gKwo+ICAJcmV0dXJuIG9iajsKPiAgfQo+ICAKPiBAQCAtMTAyLDcgKzEwOCw3 IEBAIHZvaWQgX19pOTE1X3ZtX2Nsb3NlKHN0cnVjdCBpOTE1X2FkZHJlc3Nfc3BhY2UgKnZtKQo+ ICBpbnQgaTkxNV92bV9sb2NrX29iamVjdHMoc3RydWN0IGk5MTVfYWRkcmVzc19zcGFjZSAqdm0s Cj4gIAkJCSBzdHJ1Y3QgaTkxNV9nZW1fd3dfY3R4ICp3dykKPiAgewo+IC0JaWYgKHZtLT5zY3Jh dGNoWzBdLT5iYXNlLnJlc3YgPT0gJnZtLT5yZXN2KSB7Cj4gKwlpZiAodm0tPnNjcmF0Y2hbMF0t PmJhc2UucmVzdiA9PSAmdm0tPl9yZXN2KSB7Cj4gIAkJcmV0dXJuIGk5MTVfZ2VtX29iamVjdF9s b2NrKHZtLT5zY3JhdGNoWzBdLCB3dyk7Cj4gIAl9IGVsc2Ugewo+ICAJCXN0cnVjdCBpOTE1X3Bw Z3R0ICpwcGd0dCA9IGk5MTVfdm1fdG9fcHBndHQodm0pOwo+IEBAIC0xMTgsNiArMTI0LDIyIEBA IHZvaWQgaTkxNV9hZGRyZXNzX3NwYWNlX2Zpbmkoc3RydWN0IGk5MTVfYWRkcmVzc19zcGFjZSAq dm0pCj4gIAltdXRleF9kZXN0cm95KCZ2bS0+bXV0ZXgpOwo+ICB9Cj4gIAo+ICsvKioKPiArICog aTkxNV92bV9yZXN2X3JlbGVhc2UgLSBGaW5hbCBzdHJ1Y3QgaTkxNV9hZGRyZXNzX3NwYWNlIGRl c3RydWN0b3IKPiArICogQGtyZWY6IFBvaW50ZXIgdG8gdGhlICZpOTE1X2FkZHJlc3Nfc3BhY2Uu cmVzdl9yZWYgbWVtYmVyLgo+ICsgKgo+ICsgKiBUaGlzIGZ1bmN0aW9uIGlzIGNhbGxlZCB3aGVu IHRoZSBsYXN0IGxvY2sgc2hhcmVyIG5vIGxvbmdlciBzaGFyZXMgdGhlCj4gKyAqICZpOTE1X2Fk ZHJlc3Nfc3BhY2UuX3Jlc3YgbG9jay4KPiArICovCj4gK3ZvaWQgaTkxNV92bV9yZXN2X3JlbGVh c2Uoc3RydWN0IGtyZWYgKmtyZWYpCj4gK3sKPiArCXN0cnVjdCBpOTE1X2FkZHJlc3Nfc3BhY2Ug KnZtID0KPiArCQljb250YWluZXJfb2Yoa3JlZiwgdHlwZW9mKCp2bSksIHJlc3ZfcmVmKTsKPiAr Cj4gKwlkbWFfcmVzdl9maW5pKCZ2bS0+X3Jlc3YpOwo+ICsJa2ZyZWUodm0pOwo+ICt9Cj4gKwo+ ICBzdGF0aWMgdm9pZCBfX2k5MTVfdm1fcmVsZWFzZShzdHJ1Y3Qgd29ya19zdHJ1Y3QgKndvcmsp Cj4gIHsKPiAgCXN0cnVjdCBpOTE1X2FkZHJlc3Nfc3BhY2UgKnZtID0KPiBAQCAtMTI1LDkgKzE0 Nyw4IEBAIHN0YXRpYyB2b2lkIF9faTkxNV92bV9yZWxlYXNlKHN0cnVjdCB3b3JrX3N0cnVjdCAq d29yaykKPiAgCj4gIAl2bS0+Y2xlYW51cCh2bSk7Cj4gIAlpOTE1X2FkZHJlc3Nfc3BhY2VfZmlu aSh2bSk7Cj4gLQlkbWFfcmVzdl9maW5pKCZ2bS0+cmVzdik7Cj4gIAo+IC0Ja2ZyZWUodm0pOwo+ ICsJaTkxNV92bV9yZXN2X3B1dCgmdm0tPl9yZXN2KTsKPiAgfQo+ICAKPiAgdm9pZCBpOTE1X3Zt X3JlbGVhc2Uoc3RydWN0IGtyZWYgKmtyZWYpCj4gQEAgLTE0NCw2ICsxNjUsMTQgQEAgdm9pZCBp OTE1X3ZtX3JlbGVhc2Uoc3RydWN0IGtyZWYgKmtyZWYpCj4gIHZvaWQgaTkxNV9hZGRyZXNzX3Nw YWNlX2luaXQoc3RydWN0IGk5MTVfYWRkcmVzc19zcGFjZSAqdm0sIGludCBzdWJjbGFzcykKPiAg ewo+ICAJa3JlZl9pbml0KCZ2bS0+cmVmKTsKPiArCj4gKwkvKgo+ICsJICogU3BlY2lhbCBjYXNl IGZvciBHR1RUIHRoYXQgaGFzIGFscmVhZHkgZG9uZSBhbiBlYXJseQo+ICsJICoga3JlZl9pbml0 IGhlcmUuCj4gKwkgKi8KPiArCWlmICgha3JlZl9yZWFkKCZ2bS0+cmVzdl9yZWYpKQo+ICsJCWty ZWZfaW5pdCgmdm0tPnJlc3ZfcmVmKTsKPiArCj4gIAlJTklUX1JDVV9XT1JLKCZ2bS0+cmN1LCBf X2k5MTVfdm1fcmVsZWFzZSk7Cj4gIAlhdG9taWNfc2V0KCZ2bS0+b3BlbiwgMSk7Cj4gIAo+IEBA IC0xNzAsNyArMTk5LDcgQEAgdm9pZCBpOTE1X2FkZHJlc3Nfc3BhY2VfaW5pdChzdHJ1Y3QgaTkx NV9hZGRyZXNzX3NwYWNlICp2bSwgaW50IHN1YmNsYXNzKQo+ICAJCW1pZ2h0X2FsbG9jKEdGUF9L RVJORUwpOwo+ICAJCW11dGV4X3JlbGVhc2UoJnZtLT5tdXRleC5kZXBfbWFwLCBfVEhJU19JUF8p Owo+ICAJfQo+IC0JZG1hX3Jlc3ZfaW5pdCgmdm0tPnJlc3YpOwo+ICsJZG1hX3Jlc3ZfaW5pdCgm dm0tPl9yZXN2KTsKPiAgCj4gIAlHRU1fQlVHX09OKCF2bS0+dG90YWwpOwo+ICAJZHJtX21tX2lu aXQoJnZtLT5tbSwgMCwgdm0tPnRvdGFsKTsKPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJt L2k5MTUvZ3QvaW50ZWxfZ3R0LmggYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9ndC9pbnRlbF9ndHQu aAo+IGluZGV4IGNhMDBiNDU4MjdiNy4uYjFiNjg3MTQzMTQ0IDEwMDY0NAo+IC0tLSBhL2RyaXZl cnMvZ3B1L2RybS9pOTE1L2d0L2ludGVsX2d0dC5oCj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL2k5 MTUvZ3QvaW50ZWxfZ3R0LmgKPiBAQCAtMjQ1LDcgKzI0NSw5IEBAIHN0cnVjdCBpOTE1X2FkZHJl c3Nfc3BhY2Ugewo+ICAJYXRvbWljX3Qgb3BlbjsKPiAgCj4gIAlzdHJ1Y3QgbXV0ZXggbXV0ZXg7 IC8qIHByb3RlY3RzIHZtYSBhbmQgb3VyIGxpc3RzICovCj4gLQlzdHJ1Y3QgZG1hX3Jlc3YgcmVz djsgLyogcmVzZXJ2YXRpb24gbG9jayBmb3IgYWxsIHBkIG9iamVjdHMsIGFuZCBidWZmZXIgcG9v bCAqLwo+ICsKPiArCXN0cnVjdCBrcmVmIHJlc3ZfcmVmOyAvKiBrcmVmIHRvIGtlZXAgdGhlIHJl c2VydmF0aW9uIGxvY2sgYWxpdmUuICovCj4gKwlzdHJ1Y3QgZG1hX3Jlc3YgX3Jlc3Y7IC8qIHJl c2VydmF0aW9uIGxvY2sgZm9yIGFsbCBwZCBvYmplY3RzLCBhbmQgYnVmZmVyIHBvb2wgKi8KPiAg I2RlZmluZSBWTV9DTEFTU19HR1RUIDAKPiAgI2RlZmluZSBWTV9DTEFTU19QUEdUVCAxCj4gICNk ZWZpbmUgVk1fQ0xBU1NfRFBUIDIKPiBAQCAtNDA0LDEzICs0MDYsMzggQEAgaTkxNV92bV9nZXQo c3RydWN0IGk5MTVfYWRkcmVzc19zcGFjZSAqdm0pCj4gIAlyZXR1cm4gdm07Cj4gIH0KPiAgCj4g Ky8qKgo+ICsgKiBpOTE1X3ZtX3Jlc3ZfZ2V0IC0gT2J0YWluIGEgcmVmZXJlbmNlIG9uIHRoZSB2 bSdzIHJlc2VydmF0aW9uIGxvY2sKPiArICogQHZtOiBUaGUgdm0gd2hvc2UgcmVzZXJ2YXRpb24g bG9jayB3ZSB3YW50IHRvIHNoYXJlLgo+ICsgKgo+ICsgKiBSZXR1cm46IEEgcG9pbnRlciB0byB0 aGUgdm0ncyByZXNlcnZhdGlvbiBsb2NrLgo+ICsgKi8KPiArc3RhdGljIGlubGluZSBzdHJ1Y3Qg ZG1hX3Jlc3YgKmk5MTVfdm1fcmVzdl9nZXQoc3RydWN0IGk5MTVfYWRkcmVzc19zcGFjZSAqdm0p Cj4gK3sKPiArCWtyZWZfZ2V0KCZ2bS0+cmVzdl9yZWYpOwo+ICsJcmV0dXJuICZ2bS0+X3Jlc3Y7 Cj4gK30KPiArCj4gIHZvaWQgaTkxNV92bV9yZWxlYXNlKHN0cnVjdCBrcmVmICprcmVmKTsKPiAg Cj4gK3ZvaWQgaTkxNV92bV9yZXN2X3JlbGVhc2Uoc3RydWN0IGtyZWYgKmtyZWYpOwo+ICsKPiAg c3RhdGljIGlubGluZSB2b2lkIGk5MTVfdm1fcHV0KHN0cnVjdCBpOTE1X2FkZHJlc3Nfc3BhY2Ug KnZtKQo+ICB7Cj4gIAlrcmVmX3B1dCgmdm0tPnJlZiwgaTkxNV92bV9yZWxlYXNlKTsKPiAgfQo+ ICAKPiArLyoqCj4gKyAqIGk5MTVfdm1fcmVzdl9wdXQgLSBSZWxlYXNlIGEgcmVmZXJlbmNlIG9u IHRoZSB2bSdzIHJlc2VydmF0aW9uIGxvY2sKPiArICogQHJlc3Y6IFBvaW50ZXIgdG8gYSByZXNl cnZhdGlvbiBsb2NrIG9idGFpbmVkIGZyb20gaTkxNV92bV9yZXN2X2dldCgpCj4gKyAqLwo+ICtz dGF0aWMgaW5saW5lIHZvaWQgaTkxNV92bV9yZXN2X3B1dChzdHJ1Y3QgZG1hX3Jlc3YgKnJlc3Yp Cj4gK3sKPiArCXN0cnVjdCBpOTE1X2FkZHJlc3Nfc3BhY2UgKnZtID0gY29udGFpbmVyX29mKHJl c3YsIHR5cGVvZigqdm0pLCBfcmVzdik7Cj4gKwo+ICsJa3JlZl9wdXQoJnZtLT5yZXN2X3JlZiwg aTkxNV92bV9yZXN2X3JlbGVhc2UpOwo+ICt9Cj4gKwo+ICBzdGF0aWMgaW5saW5lIHN0cnVjdCBp OTE1X2FkZHJlc3Nfc3BhY2UgKgo+ICBpOTE1X3ZtX29wZW4oc3RydWN0IGk5MTVfYWRkcmVzc19z cGFjZSAqdm0pCj4gIHsKPiBAQCAtNTA2LDYgKzUzMyw3IEBAIHZvaWQgaTkxNV9nZ3R0X2VuYWJs ZV9ndWMoc3RydWN0IGk5MTVfZ2d0dCAqZ2d0dCk7Cj4gIHZvaWQgaTkxNV9nZ3R0X2Rpc2FibGVf Z3VjKHN0cnVjdCBpOTE1X2dndHQgKmdndHQpOwo+ICBpbnQgaTkxNV9pbml0X2dndHQoc3RydWN0 IGRybV9pOTE1X3ByaXZhdGUgKmk5MTUpOwo+ICB2b2lkIGk5MTVfZ2d0dF9kcml2ZXJfcmVsZWFz ZShzdHJ1Y3QgZHJtX2k5MTVfcHJpdmF0ZSAqaTkxNSk7Cj4gK3ZvaWQgaTkxNV9nZ3R0X2RyaXZl cl9sYXRlX3JlbGVhc2Uoc3RydWN0IGRybV9pOTE1X3ByaXZhdGUgKmk5MTUpOwo+ICAKPiAgc3Rh dGljIGlubGluZSBib29sIGk5MTVfZ2d0dF9oYXNfYXBlcnR1cmUoY29uc3Qgc3RydWN0IGk5MTVf Z2d0dCAqZ2d0dCkKPiAgewo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9ndC9p bnRlbF9wcGd0dC5jIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ3QvaW50ZWxfcHBndHQuYwo+IGlu ZGV4IDRlM2Q4MGMyMjk1Yy4uYWVlM2E4OTI5MjQ1IDEwMDY0NAo+IC0tLSBhL2RyaXZlcnMvZ3B1 L2RybS9pOTE1L2d0L2ludGVsX3BwZ3R0LmMKPiArKysgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9n dC9pbnRlbF9wcGd0dC5jCj4gQEAgLTMwNyw3ICszMDcsNyBAQCB2b2lkIHBwZ3R0X2luaXQoc3Ry dWN0IGk5MTVfcHBndHQgKnBwZ3R0LCBzdHJ1Y3QgaW50ZWxfZ3QgKmd0KQo+ICAJcHBndHQtPnZt LmRtYSA9IGk5MTUtPmRybS5kZXY7Cj4gIAlwcGd0dC0+dm0udG90YWwgPSBCSVRfVUxMKElOVEVM X0lORk8oaTkxNSktPnBwZ3R0X3NpemUpOwo+ICAKPiAtCWRtYV9yZXN2X2luaXQoJnBwZ3R0LT52 bS5yZXN2KTsKPiArCWRtYV9yZXN2X2luaXQoJnBwZ3R0LT52bS5fcmVzdik7Cj4gIAlpOTE1X2Fk ZHJlc3Nfc3BhY2VfaW5pdCgmcHBndHQtPnZtLCBWTV9DTEFTU19QUEdUVCk7Cj4gIAo+ICAJcHBn dHQtPnZtLnZtYV9vcHMuYmluZF92bWEgICAgPSBwcGd0dF9iaW5kX3ZtYTsKPiBkaWZmIC0tZ2l0 IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9kcnYuYyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1 L2k5MTVfZHJ2LmMKPiBpbmRleCA1MTE4ZGM4Mzg2YjIuLjkyYmNjYzU2MjNhOCAxMDA2NDQKPiAt LS0gYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X2Rydi5jCj4gKysrIGIvZHJpdmVycy9ncHUv ZHJtL2k5MTUvaTkxNV9kcnYuYwo+IEBAIC02MzEsNiArNjMxLDggQEAgc3RhdGljIGludCBpOTE1 X2RyaXZlcl9od19wcm9iZShzdHJ1Y3QgZHJtX2k5MTVfcHJpdmF0ZSAqZGV2X3ByaXYpCj4gIAlp bnRlbF9tZW1vcnlfcmVnaW9uc19kcml2ZXJfcmVsZWFzZShkZXZfcHJpdik7Cj4gIGVycl9nZ3R0 Ogo+ICAJaTkxNV9nZ3R0X2RyaXZlcl9yZWxlYXNlKGRldl9wcml2KTsKPiArCWk5MTVfZ2VtX2Ry YWluX2ZyZWVkX29iamVjdHMoZGV2X3ByaXYpOwo+ICsJaTkxNV9nZ3R0X2RyaXZlcl9sYXRlX3Jl bGVhc2UoZGV2X3ByaXYpOwo+ICBlcnJfcGVyZjoKPiAgCWk5MTVfcGVyZl9maW5pKGRldl9wcml2 KTsKPiAgCXJldHVybiByZXQ7Cj4gQEAgLTg4MCw2ICs4ODIsOCBAQCBpbnQgaTkxNV9kcml2ZXJf cHJvYmUoc3RydWN0IHBjaV9kZXYgKnBkZXYsIGNvbnN0IHN0cnVjdCBwY2lfZGV2aWNlX2lkICpl bnQpCj4gIAlpOTE1X2RyaXZlcl9od19yZW1vdmUoaTkxNSk7Cj4gIAlpbnRlbF9tZW1vcnlfcmVn aW9uc19kcml2ZXJfcmVsZWFzZShpOTE1KTsKPiAgCWk5MTVfZ2d0dF9kcml2ZXJfcmVsZWFzZShp OTE1KTsKPiArCWk5MTVfZ2VtX2RyYWluX2ZyZWVkX29iamVjdHMoaTkxNSk7Cj4gKwlpOTE1X2dn dHRfZHJpdmVyX2xhdGVfcmVsZWFzZShpOTE1KTsKPiAgb3V0X2NsZWFudXBfbW1pbzoKPiAgCWk5 MTVfZHJpdmVyX21taW9fcmVsZWFzZShpOTE1KTsKPiAgb3V0X3J1bnRpbWVfcG1fcHV0Ogo+IEBA IC05MzYsNiArOTQwLDcgQEAgc3RhdGljIHZvaWQgaTkxNV9kcml2ZXJfcmVsZWFzZShzdHJ1Y3Qg ZHJtX2RldmljZSAqZGV2KQo+ICAJaW50ZWxfbWVtb3J5X3JlZ2lvbnNfZHJpdmVyX3JlbGVhc2Uo ZGV2X3ByaXYpOwo+ICAJaTkxNV9nZ3R0X2RyaXZlcl9yZWxlYXNlKGRldl9wcml2KTsKPiAgCWk5 MTVfZ2VtX2RyYWluX2ZyZWVkX29iamVjdHMoZGV2X3ByaXYpOwo+ICsJaTkxNV9nZ3R0X2RyaXZl cl9sYXRlX3JlbGVhc2UoZGV2X3ByaXYpOwo+ICAKPiAgCWk5MTVfZHJpdmVyX21taW9fcmVsZWFz ZShkZXZfcHJpdik7Cj4gIAoKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fCkludGVsLWdmeCBtYWlsaW5nIGxpc3QKSW50ZWwtZ2Z4QGxpc3RzLmZyZWVkZXNr dG9wLm9yZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2lu dGVsLWdmeAo=