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[188.155.174.239]) by smtp.gmail.com with ESMTPSA id 10-20020adf808a000000b001edd413a952sm6726713wrl.95.2022.03.11.06.33.06 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 11 Mar 2022 06:33:07 -0800 (PST) Message-ID: <2f53f17a-427c-62d6-a0c6-4a3962ab01f0@canonical.com> Date: Fri, 11 Mar 2022 15:33:06 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [PATCH v2 3/3] ARM: dts: lpc32xx: Update spi clock properties Content-Language: en-US To: Vladimir Zapolskiy , Arnd Bergmann Cc: Kuldeep Singh , Olof Johansson , SoC Team , Rob Herring , DTML , Linux ARM , Linux Kernel Mailing List References: <20220311093800.18778-1-singh.kuldeep87k@gmail.com> <20220311093800.18778-4-singh.kuldeep87k@gmail.com> <4aae560d-d266-d0d0-136f-32891b15bc01@mleia.com> <4f39f086-1932-1729-8761-d5c533356812@mleia.com> From: Krzysztof Kozlowski In-Reply-To: <4f39f086-1932-1729-8761-d5c533356812@mleia.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 11/03/2022 15:07, Vladimir Zapolskiy wrote: > On 3/11/22 3:38 PM, Arnd Bergmann wrote: >> On Fri, Mar 11, 2022 at 2:20 PM Vladimir Zapolskiy wrote: >>> >>> On 3/11/22 11:38 AM, Kuldeep Singh wrote: >>>> PL022 binding require two clocks to be defined but lpc platform doesn't >>>> comply with bindings and define only one clock i.e apb_pclk. >>>> >>>> Update spi clocks and clocks-names property by adding appropriate clock >>>> reference to make it compliant with bindings. >>>> >>>> CC: Vladimir Zapolskiy >>>> Signed-off-by: Kuldeep Singh >>>> --- >>>> v2: >>>> - New patch with similar changeset >>>> - Send to soc ML >>>> >>>> arch/arm/boot/dts/lpc32xx.dtsi | 8 ++++---- >>>> 1 file changed, 4 insertions(+), 4 deletions(-) >>>> >>>> diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi >>>> index c87066d6c995..30958e02d5e2 100644 >>>> --- a/arch/arm/boot/dts/lpc32xx.dtsi >>>> +++ b/arch/arm/boot/dts/lpc32xx.dtsi >>>> @@ -178,8 +178,8 @@ ssp0: spi@20084000 { >>>> compatible = "arm,pl022", "arm,primecell"; >>>> reg = <0x20084000 0x1000>; >>>> interrupts = <20 IRQ_TYPE_LEVEL_HIGH>; >>>> - clocks = <&clk LPC32XX_CLK_SSP0>; >>>> - clock-names = "apb_pclk"; >>>> + clocks = <&clk LPC32XX_CLK_SSP0>, <&clk LPC32XX_CLK_SSP0>; >>>> + clock-names = "sspclk", "apb_pclk"; >>> >>> In fact I'm uncertain if it is the right change, could it happen that the commit >>> cc0f6e96c4fd ("spi: dt-bindings: Convert Arm pl022 to json-schema") sets a wrong >>> schema pattern? >> >> Good pointm this doesn't quite seem right: it is unlikely that the same clock >> is used for both the SPI bus and the APB bus. >> >>> Apparently just one clock is wanted on all observed platforms and cases, this >>> is implicitly confirmed by clock handling in the drivers/spi/spi-pl022.c : >>> >>> pl022->clk = devm_clk_get(&adev->dev, NULL); >>> >>> So, I would vote to fix the device tree bindings schema. Drivers do not describe the hardware. Bindings should not be modeled on drivers, but on actual hardware, so the example is not convincing. >> >> Isn't this just using the wrong name? The name of the macro >> LPC32XX_CLK_SSP0 might indicate that this is indeed the SPI clock >> rather than the APB clock, so we only need to change clock-names >> property here and leave it unchanged otherwise. > > Yes, the name is wrong, here I'm ready to take the blame: > > Fixes: 93898eb775e5 ("arm: dts: lpc32xx: add clock properties to device nodes") > > Noteworthy the commit above presets the same clock name to other PrimeCell > controllers, namely pl110 (LCD), pl080 (DMA), pl175 (EMC) and pl18x (SD), > plus this one pl022 (SSP), and all but SSP and SD are AHB slaves in fact. > > On LPC32xx the bus clock source and function clock source for SSP is HCLK. > > My guess is that the misnamed "apb_pclk" migrated into the schema from > the lpc32xx.dtsi, so I'd suggest, unless some platform really needs it, > firstly fix the schema by removing "apb_pclk" clock. It will leave just one > clock, so "clock-names" property can be set as optional, and the drop > the property from the lpc32xx.dtsi. > >> Looking at the driver, I also see that this refers to the clock as >> "SSP/SPI bus clock", and it reads the rate from that. > > Yes, that's correct, it's a SPI bus clock with an option to set a rate. It seems versioning of this patchset lacks proper references to previous discussions: https://lore.kernel.org/linux-devicetree/Yip2MZdQNjMz%2FCos@robh.at.kernel.org/ Best regards, Krzysztof From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 657B0C433F5 for ; Fri, 11 Mar 2022 14:34:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To: Subject:MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=/+zPwopvKa8jQhCPUDwA/1o4hKEmalkB3AyyimwRIVM=; b=Kipcon19Q3vlLW jdvO3Ae888jLscx+zJ2OEYMq8Zk9V8pBzfDwkYo381LMffZ21ctoSHB/Eq+wppqrqUbOlwkvfyIU4 Ob538bUieew5YGo2/Q0TrzMAltSD1V2e9dfQHrP3U1hwhAWbFejJAAGZJcFWxYX98UjUIpleB96cN 9oogfKju63Es09RjibEuuLhBg01hRbkWUfkoPQBhwJKu4MWD/SI14u7lsvYmoJNqPTwJyie3+PRAP R4V5vlJ04aN8YEJ13Wm8VF4Q+Qy3x6UjSeqIseuogcKTLCYnuHxV9X8s5krpqW9N+KQAzPJo+xQCM i0fVwfb6U+19gV1cPJhw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nSgKQ-00Gn6a-7y; Fri, 11 Mar 2022 14:33:14 +0000 Received: from smtp-relay-internal-0.canonical.com ([185.125.188.122]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nSgKL-00Gn5s-WA for linux-arm-kernel@lists.infradead.org; Fri, 11 Mar 2022 14:33:11 +0000 Received: from mail-wr1-f69.google.com (mail-wr1-f69.google.com [209.85.221.69]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-0.canonical.com (Postfix) with ESMTPS id 6E34B3F4BC for ; Fri, 11 Mar 2022 14:33:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1647009188; bh=OnW6EN46n7vaYBFSgg2vgSftb7Rx3mwGGTomxWm4iNQ=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=jRWetIREIKNVrL4/o42mzVkqKP1aHpmS5Fyi4qT6dNPKHbe0ww+wK/sO4CqHAcZbh ysHr7B0IuQ1TB6nk3ecm23Hdrvm20n7uDxiJkKuNv+Fa/37D9ykn8SD/e8HHTw8bSf H7ZLYcuhmVQBgBXNE09RLg1fo4aC0xCL6iQLrGdcAeb+CC+RFKUit98cNHQJtJxUew OMxycZSJ/NwM+fZhtJ3tO2N2bRWJ84n0uaMjtpE5mM1kdwA5Jk3Rb/TAOVzvT68ynj ZUZDNWZV5zLLPxBfNoai+HKG6q9L8cR3s+qXVH6kr6g4jDTZPOsrON8u7hRSGPsHCD DbkPXcmx5TYzA== Received: by mail-wr1-f69.google.com with SMTP id m18-20020a5d4a12000000b00203731460e6so2881176wrq.3 for ; Fri, 11 Mar 2022 06:33:08 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:message-id:date:mime-version:user-agent:subject :content-language:to:cc:references:from:in-reply-to :content-transfer-encoding; bh=OnW6EN46n7vaYBFSgg2vgSftb7Rx3mwGGTomxWm4iNQ=; b=u7x0IN8K4poHQhv3i5Kc7/INXEHnO4i+d1/ItdAJy+8pNBnX6WkJBwcCITMpe0866q pbRi3E3CbJK/ZW10mY0mIXXshCM4kbaW+lW24Nhb9XkhGm39flANsZ33bwSpy8I6M8Zr 6dpkbvdY9pNdgqjdL9MBjM/eV8IrXeARXfT22viMw8Xr1Tk5/CNlNoaaEgv/HG7xoMNZ l3KtVfm2szMOVrjWBaKoZb3WBwAFR2KPAgRWK1Pvl2g9ZCBa2ODu4h/xiOGM6Alg0pDj xFoR4l+ODWuYDrqaTYFPkaO1QHcYJmeycwvI/Q6QpThKiQ94n/Me0OFRrUc8yvqvuk2L /1GQ== X-Gm-Message-State: AOAM533AKHl6blIwE1P8wMmhVLA7FXD7zk3DctFkPW7rp44yI57pP9/s Z928EbHOR97DQ5956nPhn6vWU9L0xCcZ2o1qpphaZYryppA8hx7MiYeXvUlQegSVk3ZnetCsnqd WYwlvGp+2fPT2C1AaodfCL0vOc5j2prBoC7hfF7nUvf1tqqtV7Q3F X-Received: by 2002:a05:600c:34c4:b0:389:a4c3:c4b1 with SMTP id d4-20020a05600c34c400b00389a4c3c4b1mr7607585wmq.65.1647009188078; Fri, 11 Mar 2022 06:33:08 -0800 (PST) X-Google-Smtp-Source: ABdhPJyFzx1SPSweAq4eva3FzBdIfwL59AEbdj699V43mjce3zliJKeU+w5FN7C7Zd5dBSf5kORNAg== X-Received: by 2002:a05:600c:34c4:b0:389:a4c3:c4b1 with SMTP id d4-20020a05600c34c400b00389a4c3c4b1mr7607573wmq.65.1647009187861; Fri, 11 Mar 2022 06:33:07 -0800 (PST) Received: from [192.168.0.148] (xdsl-188-155-174-239.adslplus.ch. [188.155.174.239]) by smtp.gmail.com with ESMTPSA id 10-20020adf808a000000b001edd413a952sm6726713wrl.95.2022.03.11.06.33.06 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 11 Mar 2022 06:33:07 -0800 (PST) Message-ID: <2f53f17a-427c-62d6-a0c6-4a3962ab01f0@canonical.com> Date: Fri, 11 Mar 2022 15:33:06 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [PATCH v2 3/3] ARM: dts: lpc32xx: Update spi clock properties Content-Language: en-US To: Vladimir Zapolskiy , Arnd Bergmann Cc: Kuldeep Singh , Olof Johansson , SoC Team , Rob Herring , DTML , Linux ARM , Linux Kernel Mailing List References: <20220311093800.18778-1-singh.kuldeep87k@gmail.com> <20220311093800.18778-4-singh.kuldeep87k@gmail.com> <4aae560d-d266-d0d0-136f-32891b15bc01@mleia.com> <4f39f086-1932-1729-8761-d5c533356812@mleia.com> From: Krzysztof Kozlowski In-Reply-To: <4f39f086-1932-1729-8761-d5c533356812@mleia.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220311_063310_213590_95CF7F23 X-CRM114-Status: GOOD ( 31.19 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 11/03/2022 15:07, Vladimir Zapolskiy wrote: > On 3/11/22 3:38 PM, Arnd Bergmann wrote: >> On Fri, Mar 11, 2022 at 2:20 PM Vladimir Zapolskiy wrote: >>> >>> On 3/11/22 11:38 AM, Kuldeep Singh wrote: >>>> PL022 binding require two clocks to be defined but lpc platform doesn't >>>> comply with bindings and define only one clock i.e apb_pclk. >>>> >>>> Update spi clocks and clocks-names property by adding appropriate clock >>>> reference to make it compliant with bindings. >>>> >>>> CC: Vladimir Zapolskiy >>>> Signed-off-by: Kuldeep Singh >>>> --- >>>> v2: >>>> - New patch with similar changeset >>>> - Send to soc ML >>>> >>>> arch/arm/boot/dts/lpc32xx.dtsi | 8 ++++---- >>>> 1 file changed, 4 insertions(+), 4 deletions(-) >>>> >>>> diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi >>>> index c87066d6c995..30958e02d5e2 100644 >>>> --- a/arch/arm/boot/dts/lpc32xx.dtsi >>>> +++ b/arch/arm/boot/dts/lpc32xx.dtsi >>>> @@ -178,8 +178,8 @@ ssp0: spi@20084000 { >>>> compatible = "arm,pl022", "arm,primecell"; >>>> reg = <0x20084000 0x1000>; >>>> interrupts = <20 IRQ_TYPE_LEVEL_HIGH>; >>>> - clocks = <&clk LPC32XX_CLK_SSP0>; >>>> - clock-names = "apb_pclk"; >>>> + clocks = <&clk LPC32XX_CLK_SSP0>, <&clk LPC32XX_CLK_SSP0>; >>>> + clock-names = "sspclk", "apb_pclk"; >>> >>> In fact I'm uncertain if it is the right change, could it happen that the commit >>> cc0f6e96c4fd ("spi: dt-bindings: Convert Arm pl022 to json-schema") sets a wrong >>> schema pattern? >> >> Good pointm this doesn't quite seem right: it is unlikely that the same clock >> is used for both the SPI bus and the APB bus. >> >>> Apparently just one clock is wanted on all observed platforms and cases, this >>> is implicitly confirmed by clock handling in the drivers/spi/spi-pl022.c : >>> >>> pl022->clk = devm_clk_get(&adev->dev, NULL); >>> >>> So, I would vote to fix the device tree bindings schema. Drivers do not describe the hardware. Bindings should not be modeled on drivers, but on actual hardware, so the example is not convincing. >> >> Isn't this just using the wrong name? The name of the macro >> LPC32XX_CLK_SSP0 might indicate that this is indeed the SPI clock >> rather than the APB clock, so we only need to change clock-names >> property here and leave it unchanged otherwise. > > Yes, the name is wrong, here I'm ready to take the blame: > > Fixes: 93898eb775e5 ("arm: dts: lpc32xx: add clock properties to device nodes") > > Noteworthy the commit above presets the same clock name to other PrimeCell > controllers, namely pl110 (LCD), pl080 (DMA), pl175 (EMC) and pl18x (SD), > plus this one pl022 (SSP), and all but SSP and SD are AHB slaves in fact. > > On LPC32xx the bus clock source and function clock source for SSP is HCLK. > > My guess is that the misnamed "apb_pclk" migrated into the schema from > the lpc32xx.dtsi, so I'd suggest, unless some platform really needs it, > firstly fix the schema by removing "apb_pclk" clock. It will leave just one > clock, so "clock-names" property can be set as optional, and the drop > the property from the lpc32xx.dtsi. > >> Looking at the driver, I also see that this refers to the clock as >> "SSP/SPI bus clock", and it reads the rate from that. > > Yes, that's correct, it's a SPI bus clock with an option to set a rate. It seems versioning of this patchset lacks proper references to previous discussions: https://lore.kernel.org/linux-devicetree/Yip2MZdQNjMz%2FCos@robh.at.kernel.org/ Best regards, Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel