From mboxrd@z Thu Jan 1 00:00:00 1970 From: David Wu Date: Sat, 9 May 2020 10:41:46 +0800 Subject: [PATCH 3/8] net: dwc_eth_qos: Add option "snps, reset-gpio" phy-rst gpio for stm32 In-Reply-To: <5429ce30-171a-6ec5-846c-fb5fcb5a5a74@wwwdotorg.org> References: <20200430103656.29728-1-david.wu@rock-chips.com> <20200430103656.29728-4-david.wu@rock-chips.com> <5429ce30-171a-6ec5-846c-fb5fcb5a5a74@wwwdotorg.org> Message-ID: <309a8600-1383-7f6f-51c7-1a1d6fb54580@rock-chips.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Stephen, ? 2020/5/1 ??6:36, Stephen Warren ??: > The kernel's bindings/net/snps,dwmac.yaml does not mention any > reset-gpios property (which is what the existing code parses just above > the portion that is quoted by this patch as context). I suspect that > this patch should simply change the name of the property that this > function parses to align with the binding, and fix any DTs in U-Boot > that also don't match the binding? The kernel's ./Documentation/devicetree/bindings/net/stmmac.txt mentions that Required properties: - phy-mode: See ethernet.txt file in the same directory. - snps,reset-gpio gpio number for phy reset. - snps,reset-active-low boolean flag to indicate if phy reset is active low. - snps,reset-delays-us is triplet of delays The 1st cell is reset pre-delay in micro seconds. The 2nd cell is reset pulse in micro seconds. The 3rd cell is reset post-delay in micro seconds.