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Fri, 21 Feb 2020 17:51:19 +0000 Subject: Re: [PATCH v4 04/16] hw/i386: Introduce init_topo_info to initialize X86CPUTopoInfo To: Igor Mammedov References: <158161767653.48948.10578064482878399556.stgit@naples-babu.amd.com> <158161781120.48948.3568234592332597800.stgit@naples-babu.amd.com> <20200221180501.72e4ff3c@redhat.com> From: Babu Moger Message-ID: <3188d0e7-7f1c-aa03-d3ec-f512d9905158@amd.com> Date: Fri, 21 Feb 2020 11:51:15 -0600 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 In-Reply-To: <20200221180501.72e4ff3c@redhat.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-ClientProxiedBy: DM6PR12CA0008.namprd12.prod.outlook.com (2603:10b6:5:1c0::21) To SN1PR12MB2560.namprd12.prod.outlook.com (2603:10b6:802:26::19) MIME-Version: 1.0 Received: from [10.236.30.87] (165.204.77.1) by DM6PR12CA0008.namprd12.prod.outlook.com (2603:10b6:5:1c0::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2750.18 via Frontend Transport; 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X-Microsoft-Antispam-Message-Info: 68po04jmVSObHiZXWfLA5OVY8wuVBbI/7S1hL4SYmEVnCk0Fz8NalGJ7PKqPrfsauCaP/HQ5Lm3K5+uSS1bTGoRyBKIEVN8BIx42D19JN/nnbkBVVAv1rxMRbc02fnq09dCijHp1cjJiURhIhlm6YrAVnY8oKmo+MMeU3zRYfNuWhdYD83PTxoc/r7skHcrqKNKq23ZyFR9daIPZIOUmPmJppJb9GP1qoeh68yPtk25ZT2H31GqfSnL383twb5+3blTOg74HmRFy0ka5zsuqqGdkxKcF6ZpAf+LE+9tuDG2JDqy+dIeFiUG/WVoDknkM8/ubXmfeImjzLXq0VLZDEdLQgQkGIkyAyxiozraKBH6EtYEDrjNk79Eii4tkdsV4CTNtzqMGhuxhxcYxG8rTjRLO0pM0sGDhkn6t6rF/tBhhjH3+B4Kw1pcSAobhpXhF X-MS-Exchange-AntiSpam-MessageData: P3t2dhETppWn9ETKqIx20luWUdsWAAwpuCHOermnNt4AfIjSki2LSHYIa/n7MZDvlKZZ4y/MK07Oke/xkyiMG7gdq79FST1ed1v24ULyBoe9iPbidyB7cnJKJsSdQKPv+VDXFYaRi8rp1KRjvoqdqQ== X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 7744dabe-4635-4e75-ef9e-08d7b6f6a7d2 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Feb 2020 17:51:19.1142 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: z/l+fRNW7hF3iPP/2P8vPf+u3EMm+H3Vb0JiYC5x94sUNCEBX0hCTTo9P091u22b X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1PR12MB2560 X-detected-operating-system: by eggs.gnu.org: Windows NT kernel [generic] [fuzzy] X-Received-From: 40.107.220.87 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ehabkost@redhat.com, mst@redhat.com, qemu-devel@nongnu.org, pbonzini@redhat.com, rth@twiddle.net Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 2/21/20 11:05 AM, Igor Mammedov wrote: > On Thu, 13 Feb 2020 12:16:51 -0600 > Babu Moger wrote: > >> Initialize all the parameters in one function init_topo_info. > > is it possible to squash it in 2/16 > Sure. We can do that. > >> >> Move the data structure X86CPUTopoIDs and X86CPUTopoInfo into >> x86.h. > A reason why it's moved should be here. Apicid functions will be part of X86MachineState data structure(patches introduced later).These functions will use X86CPUTopoIDs and X86CPUTopoInfo definition. Will add these details. Thanks > >> >> Signed-off-by: Babu Moger >> Reviewed-by: Eduardo Habkost >> --- >> hw/i386/pc.c | 4 +--- >> hw/i386/x86.c | 14 +++----------- >> include/hw/i386/topology.h | 26 ++++++++++---------------- >> include/hw/i386/x86.h | 17 +++++++++++++++++ >> 4 files changed, 31 insertions(+), 30 deletions(-) >> >> diff --git a/hw/i386/pc.c b/hw/i386/pc.c >> index 2adf7f6afa..9803413dd9 100644 >> --- a/hw/i386/pc.c >> +++ b/hw/i386/pc.c >> @@ -1749,9 +1749,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev, >> return; >> } >> >> - topo_info.dies_per_pkg = x86ms->smp_dies; >> - topo_info.cores_per_die = smp_cores; >> - topo_info.threads_per_core = smp_threads; >> + init_topo_info(&topo_info, x86ms); >> >> env->nr_dies = x86ms->smp_dies; >> >> diff --git a/hw/i386/x86.c b/hw/i386/x86.c >> index f18cab8e5c..083effb2f5 100644 >> --- a/hw/i386/x86.c >> +++ b/hw/i386/x86.c >> @@ -63,15 +63,12 @@ static size_t pvh_start_addr; >> uint32_t x86_cpu_apic_id_from_index(X86MachineState *x86ms, >> unsigned int cpu_index) >> { >> - MachineState *ms = MACHINE(x86ms); >> X86MachineClass *x86mc = X86_MACHINE_GET_CLASS(x86ms); >> X86CPUTopoInfo topo_info; >> uint32_t correct_id; >> static bool warned; >> >> - topo_info.dies_per_pkg = x86ms->smp_dies; >> - topo_info.cores_per_die = ms->smp.cores; >> - topo_info.threads_per_core = ms->smp.threads; >> + init_topo_info(&topo_info, x86ms); >> >> correct_id = x86_apicid_from_cpu_idx(&topo_info, cpu_index); >> if (x86mc->compat_apic_id_mode) { >> @@ -146,10 +143,7 @@ int64_t x86_get_default_cpu_node_id(const MachineState *ms, int idx) >> X86MachineState *x86ms = X86_MACHINE(ms); >> X86CPUTopoInfo topo_info; >> >> - topo_info.dies_per_pkg = x86ms->smp_dies; >> - topo_info.cores_per_die = ms->smp.cores; >> - topo_info.threads_per_core = ms->smp.threads; >> - >> + init_topo_info(&topo_info, x86ms); >> >> assert(idx < ms->possible_cpus->len); >> x86_topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id, >> @@ -177,9 +171,7 @@ const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms) >> sizeof(CPUArchId) * max_cpus); >> ms->possible_cpus->len = max_cpus; >> >> - topo_info.dies_per_pkg = x86ms->smp_dies; >> - topo_info.cores_per_die = ms->smp.cores; >> - topo_info.threads_per_core = ms->smp.threads; >> + init_topo_info(&topo_info, x86ms); >> >> for (i = 0; i < ms->possible_cpus->len; i++) { >> X86CPUTopoIDs topo_ids; >> diff --git a/include/hw/i386/topology.h b/include/hw/i386/topology.h >> index ba52d49079..ef0ab0b6a3 100644 >> --- a/include/hw/i386/topology.h >> +++ b/include/hw/i386/topology.h >> @@ -40,23 +40,17 @@ >> >> >> #include "qemu/bitops.h" >> +#include "hw/i386/x86.h" >> >> -/* APIC IDs can be 32-bit, but beware: APIC IDs > 255 require x2APIC support >> - */ >> -typedef uint32_t apic_id_t; >> - >> -typedef struct X86CPUTopoIDs { >> - unsigned pkg_id; >> - unsigned die_id; >> - unsigned core_id; >> - unsigned smt_id; >> -} X86CPUTopoIDs; >> - >> -typedef struct X86CPUTopoInfo { >> - unsigned dies_per_pkg; >> - unsigned cores_per_die; >> - unsigned threads_per_core; >> -} X86CPUTopoInfo; >> +static inline void init_topo_info(X86CPUTopoInfo *topo_info, >> + const X86MachineState *x86ms) >> +{ >> + MachineState *ms = MACHINE(x86ms); >> + >> + topo_info->dies_per_pkg = x86ms->smp_dies; >> + topo_info->cores_per_die = ms->smp.cores; >> + topo_info->threads_per_core = ms->smp.threads; >> +} >> >> /* Return the bit width needed for 'count' IDs >> */ >> diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h >> index 4b84917885..ad62b01cf2 100644 >> --- a/include/hw/i386/x86.h >> +++ b/include/hw/i386/x86.h >> @@ -36,6 +36,23 @@ typedef struct { >> bool compat_apic_id_mode; >> } X86MachineClass; >> >> +/* APIC IDs can be 32-bit, but beware: APIC IDs > 255 require x2APIC support >> + */ >> +typedef uint32_t apic_id_t; >> + >> +typedef struct X86CPUTopoIDs { >> + unsigned pkg_id; >> + unsigned die_id; >> + unsigned core_id; >> + unsigned smt_id; >> +} X86CPUTopoIDs; >> + >> +typedef struct X86CPUTopoInfo { >> + unsigned dies_per_pkg; >> + unsigned cores_per_die; >> + unsigned threads_per_core; >> +} X86CPUTopoInfo; >> + >> typedef struct { >> /*< private >*/ >> MachineState parent; >> >