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([2a02:810d:15c0:828:c9ff:4c84:dd21:568d]) by smtp.gmail.com with ESMTPSA id ay20-20020a056402203400b00502689a06b2sm9632296edb.91.2023.05.17.10.58.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 17 May 2023 10:58:47 -0700 (PDT) Message-ID: <3239db1b-3ade-8881-e05b-2e69a7d5f287@linaro.org> Date: Wed, 17 May 2023 19:58:46 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH 1/4] dt-bindings: clock: Add Qcom SM8450 GPUCC Content-Language: en-US To: Konrad Dybcio , Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel Cc: Marijn Suijten , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20230517-topic-waipio-gpucc-v1-0-4f40e282af1d@linaro.org> <20230517-topic-waipio-gpucc-v1-1-4f40e282af1d@linaro.org> From: Krzysztof Kozlowski In-Reply-To: <20230517-topic-waipio-gpucc-v1-1-4f40e282af1d@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 17/05/2023 18:40, Konrad Dybcio wrote: > Add device tree bindings for the graphics clock controller on Qualcomm > Technology Inc's SM8450 SoCs. > > Signed-off-by: Konrad Dybcio > --- > .../bindings/clock/qcom,sm8450-gpucc.yaml | 73 ++++++++++++++++++++++ > include/dt-bindings/clock/qcom,sm8450-gpucc.h | 48 ++++++++++++++ > include/dt-bindings/reset/qcom,sm8450-gpucc.h | 20 ++++++ > 3 files changed, 141 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml > new file mode 100644 > index 000000000000..ad913b2daf0c > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml > @@ -0,0 +1,73 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/qcom,sm8450-gpucc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm Graphics Clock & Reset Controller on SM8450 > + > +maintainers: > + - Konrad Dybcio > + > +description: | > + Qualcomm graphics clock control module provides the clocks, resets and power > + domains on Qualcomm SoCs. > + > + See also:: > + include/dt-bindings/clock/qcom,sm8450-gpucc.h > + include/dt-bindings/reset/qcom,sm8450-gpucc.h > + > +properties: > + compatible: > + enum: > + - qcom,sm8450-gpucc > + > + clocks: > + items: > + - description: Board XO source > + - description: GPLL0 main branch source > + - description: GPLL0 div branch source > + > + '#clock-cells': > + const: 1 > + > + '#reset-cells': > + const: 1 > + > + '#power-domain-cells': > + const: 1 > + > + reg: > + maxItems: 1 > + > +required: > + - compatible > + - reg If there is going to be new version: Keep the same order as in properties:, so if reg is not second there, neither should be here. In any case: Reviewed-by: Krzysztof Kozlowski Best regards, Krzysztof