Re: [PATCH 1/4] pinctrl: sh-pfc: r8a77951: Add VIN pins, groups and functions

From: Sergei Shtylyov <sergei.shtylyov@gmail.com>
To: "Niklas Söderlund" <niklas.soderlund+renesas@ragnatech.se>,
	"Geert Uytterhoeven" <geert@linux-m68k.org>
Cc: linux-renesas-soc@vger.kernel.org,
	Takeshi Kihara <takeshi.kihara.df@renesas.com>
Subject: Re: [PATCH 1/4] pinctrl: sh-pfc: r8a77951: Add VIN pins, groups and functions
Date: Tue, 15 Sep 2020 11:23:01 +0300	[thread overview]
Message-ID: <329605c4-99fe-da88-1b3a-a0f991dbb3d4@gmail.com> (raw)
In-Reply-To: <20200914233744.468175-2-niklas.soderlund+renesas@ragnatech.se>

On 15.09.2020 2:37, Niklas Söderlund wrote:

> From: Takeshi Kihara <takeshi.kihara.df@renesas.com>

    Re: subject -- you seem to be only adding the SFT8 pins/groups/funcs...

> This patch adds VIN{4,5} pins, groups and functions to the R8A77951 SoC.
> 
> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> [Niklas: Rework to fit upstream driver]
> Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
> ---
>   drivers/pinctrl/sh-pfc/pfc-r8a77951.c | 28 +++++++++++++++++++++++++++
>   1 file changed, 28 insertions(+)
> 
> diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77951.c b/drivers/pinctrl/sh-pfc/pfc-r8a77951.c
> index a94ebe0bf5d06127..afba52ae92009f17 100644
> --- a/drivers/pinctrl/sh-pfc/pfc-r8a77951.c
> +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77951.c
> @@ -4074,6 +4074,18 @@ static const union vin_data vin4_data_b_mux = {
>   		VI4_DATA22_MARK, VI4_DATA23_MARK,
>   	},
>   };
> +static const unsigned int vin4_data8_sft8_pins[] = {
> +	RCAR_GP_PIN(1, 0),  RCAR_GP_PIN(1, 1),
> +	RCAR_GP_PIN(1, 2),  RCAR_GP_PIN(1, 3),
> +	RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 5),
> +	RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 7),
> +};
> +static const unsigned int vin4_data8_sft8_mux[] = {
> +	VI4_DATA8_MARK,  VI4_DATA9_MARK,
> +	VI4_DATA10_MARK, VI4_DATA11_MARK,
> +	VI4_DATA12_MARK, VI4_DATA13_MARK,
> +	VI4_DATA14_MARK, VI4_DATA15_MARK,
> +};
>   static const unsigned int vin4_sync_pins[] = {
>   	/* HSYNC#, VSYNC# */
>   	RCAR_GP_PIN(1, 18), RCAR_GP_PIN(1, 17),
> @@ -4128,6 +4140,18 @@ static const union vin_data16 vin5_data_mux = {
>   		VI5_DATA14_MARK, VI5_DATA15_MARK,
>   	},
>   };
> +static const unsigned int vin5_data8_sft8_pins[] = {
> +	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13),
> +	RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 15),
> +	RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 5),
> +	RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 7),
> +};
> +static const unsigned int vin5_data8_sft8_mux[] = {
> +	VI5_DATA8_MARK,  VI5_DATA9_MARK,
> +	VI5_DATA10_MARK, VI5_DATA11_MARK,
> +	VI5_DATA12_MARK, VI5_DATA13_MARK,
> +	VI5_DATA14_MARK, VI5_DATA15_MARK,
> +};
>   static const unsigned int vin5_sync_pins[] = {
>   	/* HSYNC#, VSYNC# */
>   	RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 9),
> @@ -4470,6 +4494,7 @@ static const struct {
>   		SH_PFC_PIN_GROUP(vin4_data18_b),
>   		VIN_DATA_PIN_GROUP(vin4_data, 20, _b),
>   		VIN_DATA_PIN_GROUP(vin4_data, 24, _b),
> +		SH_PFC_PIN_GROUP(vin4_data8_sft8),
>   		SH_PFC_PIN_GROUP(vin4_sync),
>   		SH_PFC_PIN_GROUP(vin4_field),
>   		SH_PFC_PIN_GROUP(vin4_clkenb),
> @@ -4478,6 +4503,7 @@ static const struct {
>   		VIN_DATA_PIN_GROUP(vin5_data, 10),
>   		VIN_DATA_PIN_GROUP(vin5_data, 12),
>   		VIN_DATA_PIN_GROUP(vin5_data, 16),
> +		SH_PFC_PIN_GROUP(vin5_data8_sft8),
>   		SH_PFC_PIN_GROUP(vin5_sync),
>   		SH_PFC_PIN_GROUP(vin5_field),
>   		SH_PFC_PIN_GROUP(vin5_clkenb),
> @@ -5022,6 +5048,7 @@ static const char * const vin4_groups[] = {
>   	"vin4_data18_b",
>   	"vin4_data20_b",
>   	"vin4_data24_b",
> +	"vin4_data8_sft8",
>   	"vin4_sync",
>   	"vin4_field",
>   	"vin4_clkenb",
> @@ -5033,6 +5060,7 @@ static const char * const vin5_groups[] = {
>   	"vin5_data10",
>   	"vin5_data12",
>   	"vin5_data16",
> +	"vin5_data8_sft8",
>   	"vin5_sync",
>   	"vin5_field",
>   	"vin5_clkenb",

MBR, Sergei