From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 71681C433F5 for ; Thu, 14 Apr 2022 17:50:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date: Message-ID:From:References:Cc:To:Subject:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=xd91sz/OkTP2Jhef82ujDMR0jLXiKhjPGaCffKKcKhM=; b=dteJ/iUZimMr/s5r/VETOktQqM hRw1OIpXxAb0E/eNXOV54QB0TclOhIUgVxrwnyMNyfjGXE0J/i5k3iBPUfy0Sj/Hf5EfACWDw3Bpm 6L5b6OrRErCtGdEX5hvrhHe0suO7ftmD4Jn2N1ArPmr8zLsz70PpffB8kRKqGmWlkcx7CBcqIuwtl SvRfEOOnrd3exvH3yEbG/tWXpKB6PoxRsP9Gdj11Pm1CKSZPZGj3SfJhTjMm4CmF+x+k1ZL7TmGve kqwNMqokq2LVK3N1+LlttvsJo6T40PU4vchNf/XkOmnY696Fr+0aLpNyqpwhRN/8xqL3BSKJNI1Yp alCEEtrw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nf3b6-006iRB-8e; Thu, 14 Apr 2022 17:49:37 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nf3X2-006gQp-UL for linux-arm-kernel@lists.infradead.org; Thu, 14 Apr 2022 17:45:26 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4260512FC; Thu, 14 Apr 2022 10:45:24 -0700 (PDT) Received: from [10.1.196.218] (eglon.cambridge.arm.com [10.1.196.218]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9220E3F5A1; Thu, 14 Apr 2022 10:45:23 -0700 (PDT) Subject: Re: [PATCH v2 1/2] arm64: errata: Remove AES hwcap for COMPAT tasks To: Ard Biesheuvel Cc: Linux ARM , Russell King , Catalin Marinas , Will Deacon References: <20220413170545.3042558-1-james.morse@arm.com> <20220413170545.3042558-2-james.morse@arm.com> From: James Morse Message-ID: <32d748a9-1199-b72d-1dd3-d64ce0392cd0@arm.com> Date: Thu, 14 Apr 2022 18:45:18 +0100 User-Agent: Mozilla/5.0 (X11; Linux aarch64; rv:78.0) Gecko/20100101 Thunderbird/78.12.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220414_104525_086602_75C0AD64 X-CRM114-Status: GOOD ( 15.92 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Ard, On 13/04/2022 18:33, Ard Biesheuvel wrote: > On Wed, 13 Apr 2022 at 19:06, James Morse wrote: >> >> Cortex-A57 and Cortex-A72 have an erratum where an interrupt that >> occurs between a pair of AES instructions in aarch32 mode may corrupt >> the ELR. The task will subsequently produce the wrong AES result. >> >> The AES instructions are part of the cryptographic extensions, which are >> optional. User-space software will detect the support for these >> instructions from the hwcaps. If the platform doesn't support these >> instructions a software implementation should be used. >> >> Remove the hwcap bits on affected parts to indicate user-space should >> not use the AES instructions. >> >> Signed-off-by: James Morse > > Acked-by: Ard Biesheuvel Thanks! > One nit/question below, >> diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c >> index 4c9b5b4b7a0b..8f85dac4cd79 100644 >> --- a/arch/arm64/kernel/cpu_errata.c >> +++ b/arch/arm64/kernel/cpu_errata.c >> @@ -393,6 +393,14 @@ static struct midr_range trbe_write_out_of_range_cpus[] = { >> }; >> #endif /* CONFIG_ARM64_WORKAROUND_TRBE_WRITE_OUT_OF_RANGE */ >> >> +#ifdef CONFIG_ARM64_ERRATUM_1742098 >> +static struct midr_range broken_aarch32_aes[] = { >> + MIDR_ALL_VERSIONS(MIDR_CORTEX_A57), > Not sure it matters, but are you sure early A57 is affected as well? That's what I remember reading last time too - but this is what the errata document on developer.arm.com says. It's something I'm chasing up... Thanks, James _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel