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To: Patches and discussions about the oe-core layer
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Op 27 jul. 2011, om 16:57 heeft Phil Blundell het volgende geschreven:

> On Wed, 2011-07-27 at 09:49 -0500, Mark Hatle wrote:
>> On 7/27/11 9:33 AM, Koen Kooi wrote:
>>> As I understand it:
>>>=20
>>> arm1136 doesn't have t2
>>> arm1176 does have t2
>>>=20
>>> both are armv6 :)
>>=20
>> They also don't have "thumb" support either.  So armv6 & thumb =3D=3D =
t2.
>=20
> No, that's incorrect.  Both ARM1136 and ARM1176 do have Thumb-1 and, =
as
> I wrote in my last mail, I can't think of any plausible target =
processor
> for OE that has both ARMv6 and Thumb-2.  So, for all current intents =
and
> purposes, (armv6 && thumb) =3D=3D thumb-1.

the s3c6410 is arm1176 which should support T2. Having said that, I'm =
not  sure if that actually works since T2 was broken in silicon for =
early cortex a8 revisions.=