From: Akira Yokosawa <akiyks@gmail.com>
To: "Paul E. McKenney" <paulmck@kernel.org>
Cc: perfbook@vger.kernel.org, Akira Yokosawa <akiyks@gmail.com>
Subject: [PATCH 3/3] memorder: Substitute MIPS memory model reference
Date: Mon, 8 Feb 2021 00:27:09 +0900 [thread overview]
Message-ID: <33bbd170-4294-9eb8-9d53-91ab9f7e5810@gmail.com> (raw)
In-Reply-To: <21a2baaf-887d-8e98-eaad-f18948e9c377@gmail.com>
Use an bib entry with live URL.
Signed-off-by: Akira Yokosawa <akiyks@gmail.com>
---
memorder/memorder.tex | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/memorder/memorder.tex b/memorder/memorder.tex
index c9c35b5b..362bff16 100644
--- a/memorder/memorder.tex
+++ b/memorder/memorder.tex
@@ -4452,7 +4452,7 @@ CPU, including those to the same variable.
\subsection{MIPS}
-The MIPS memory model~\cite[page~479]{MIPSvII-A-2017}
+The MIPS memory model~\cite[page~479]{MIPSvII-A-2016}
appears to resemble that of \ARM, Itanium, and \Power{},
being weakly ordered by default, but respecting dependencies.
MIPS has a wide variety of memory-barrier instructions, but ties them
--
2.17.1
next prev parent reply other threads:[~2021-02-07 15:27 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-07 15:22 [PATCH 1/3] advsync: Fix duplicate bibliography reference Akira Yokosawa
2021-02-07 15:24 ` [PATCH 2/3] bib: Update missing/broken links in RCU.bib and hw.bib Akira Yokosawa
2021-02-07 15:27 ` Akira Yokosawa [this message]
2021-02-07 23:14 ` [PATCH 3/3] memorder: Substitute MIPS memory model reference Paul E. McKenney
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