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([2001:b07:6468:f312:91d0:a5f0:9f34:4d80]) by smtp.gmail.com with ESMTPSA id b18sm2293269wmb.18.2020.06.25.06.30.39 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 25 Jun 2020 06:30:40 -0700 (PDT) Subject: Re: [PATCH 6/8] i386: hvf: Drop hvf_reset_vcpu() To: Roman Bolshakov References: <20200624225850.16982-1-r.bolshakov@yadro.com> <20200624225850.16982-7-r.bolshakov@yadro.com> <20200625123637.GG25104@SPB-NB-133.local> From: Paolo Bonzini Message-ID: <34821aae-e8f5-adc6-eab5-0a6f6b2835e8@redhat.com> Date: Thu, 25 Jun 2020 15:30:38 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.6.0 MIME-Version: 1.0 In-Reply-To: <20200625123637.GG25104@SPB-NB-133.local> Content-Language: en-US X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=205.139.110.61; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/25 00:45:15 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , Richard Henderson , qemu-devel@nongnu.org, Cameron Esfahani , Claudio Fontana Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 25/06/20 14:36, Roman Bolshakov wrote: > > Yes, there's such a place. post-init and post-reset invoke > hvf_put_registers() and the latter one calls hvf_put_segments(). > hvf_put_segments() sets CR4 and CR0 via macvm_set_cr0/macvm_set_cr4 > using the CR0/CR4 from env. So, the reset is relying on generic QEMU > CPUX86State now. LMA in EFER is reset there as well. Ok, do you want to send a follow-up or a v2 of this? > I don't know any alternative for PDPTE and VMCS Entry Controls in > CPUX86State, that's why I left explicit reset of the VMCS fields in > post-reset. VMCS entry controls should be handled by macvm_set_cr0 as well, because QEMU does not use any except for the LMA bit. They are initialized zero wvmcs(cpu->hvf_fd, VMCS_ENTRY_CTLS, cap2ctrl(hvf_state->hvf_caps->vmx_cap_entry, 0)); but in practice the last argument ends up being zero all the time. PDPTEs are not a problem, because they are not used after reset (only if CR4.PAE=CR4.PG=1 and EFER.LME=0). Thanks, Paolo