From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A62B9C54EBC for ; Thu, 12 Jan 2023 08:34:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235829AbjALIeI (ORCPT ); Thu, 12 Jan 2023 03:34:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33194 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239669AbjALIdn (ORCPT ); Thu, 12 Jan 2023 03:33:43 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 20E0D10065; Thu, 12 Jan 2023 00:33:42 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 040DBFEC; Thu, 12 Jan 2023 00:34:24 -0800 (PST) Received: from [192.168.1.12] (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 572C03F71A; Thu, 12 Jan 2023 00:33:40 -0800 (PST) Message-ID: <35413b5c-0d83-0f37-9ea7-1217305c138b@arm.com> Date: Thu, 12 Jan 2023 09:33:30 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 From: Pierre Gondois Subject: Re: [PATCH v2 17/23] arm64: dts: Update cache properties for realtek To: LKML Cc: =?UTF-8?Q?Andreas_F=c3=a4rber?= , Rob Herring , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-realtek-soc@lists.infradead.org, devicetree@vger.kernel.org References: <20221107155825.1644604-1-pierre.gondois@arm.com> <20221107155825.1644604-18-pierre.gondois@arm.com> Content-Language: en-US In-Reply-To: <20221107155825.1644604-18-pierre.gondois@arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org (subset for cc list) Hello, Just a reminder in case the patch was forgotten, Regards, Pierre On 11/7/22 16:57, Pierre Gondois wrote: > The DeviceTree Specification v0.3 specifies that the cache node > 'compatible' and 'cache-level' properties are 'required'. Cf. > s3.8 Multi-level and Shared Cache Nodes > The 'cache-unified' property should be present if one of the > properties for unified cache is present ('cache-size', ...). > > Update the Device Trees accordingly. > > Signed-off-by: Pierre Gondois > --- > arch/arm64/boot/dts/realtek/rtd1293.dtsi | 1 + > arch/arm64/boot/dts/realtek/rtd1295.dtsi | 1 + > arch/arm64/boot/dts/realtek/rtd1296.dtsi | 1 + > arch/arm64/boot/dts/realtek/rtd1395.dtsi | 1 + > arch/arm64/boot/dts/realtek/rtd16xx.dtsi | 2 ++ > 5 files changed, 6 insertions(+) > > diff --git a/arch/arm64/boot/dts/realtek/rtd1293.dtsi b/arch/arm64/boot/dts/realtek/rtd1293.dtsi > index 2d92b56ac94d..0696b99fc40d 100644 > --- a/arch/arm64/boot/dts/realtek/rtd1293.dtsi > +++ b/arch/arm64/boot/dts/realtek/rtd1293.dtsi > @@ -30,6 +30,7 @@ cpu1: cpu@1 { > > l2: l2-cache { > compatible = "cache"; > + cache-level = <2>; > }; > }; > > diff --git a/arch/arm64/boot/dts/realtek/rtd1295.dtsi b/arch/arm64/boot/dts/realtek/rtd1295.dtsi > index 1402abe80ea1..4ca322e420e6 100644 > --- a/arch/arm64/boot/dts/realtek/rtd1295.dtsi > +++ b/arch/arm64/boot/dts/realtek/rtd1295.dtsi > @@ -44,6 +44,7 @@ cpu3: cpu@3 { > > l2: l2-cache { > compatible = "cache"; > + cache-level = <2>; > }; > }; > > diff --git a/arch/arm64/boot/dts/realtek/rtd1296.dtsi b/arch/arm64/boot/dts/realtek/rtd1296.dtsi > index fb864a139c97..03fccd48f0c0 100644 > --- a/arch/arm64/boot/dts/realtek/rtd1296.dtsi > +++ b/arch/arm64/boot/dts/realtek/rtd1296.dtsi > @@ -44,6 +44,7 @@ cpu3: cpu@3 { > > l2: l2-cache { > compatible = "cache"; > + cache-level = <2>; > }; > }; > > diff --git a/arch/arm64/boot/dts/realtek/rtd1395.dtsi b/arch/arm64/boot/dts/realtek/rtd1395.dtsi > index 05c9216a87ee..94c0a8cf4953 100644 > --- a/arch/arm64/boot/dts/realtek/rtd1395.dtsi > +++ b/arch/arm64/boot/dts/realtek/rtd1395.dtsi > @@ -44,6 +44,7 @@ cpu3: cpu@3 { > > l2: l2-cache { > compatible = "cache"; > + cache-level = <2>; > }; > }; > > diff --git a/arch/arm64/boot/dts/realtek/rtd16xx.dtsi b/arch/arm64/boot/dts/realtek/rtd16xx.dtsi > index afba5f04c8ec..2ee9ba1ecdc1 100644 > --- a/arch/arm64/boot/dts/realtek/rtd16xx.dtsi > +++ b/arch/arm64/boot/dts/realtek/rtd16xx.dtsi > @@ -87,12 +87,14 @@ cpu5: cpu@500 { > > l2: l2-cache { > compatible = "cache"; > + cache-level = <2>; > next-level-cache = <&l3>; > > }; > > l3: l3-cache { > compatible = "cache"; > + cache-level = <3>; > }; > }; > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 191DCC54EBC for ; Thu, 12 Jan 2023 08:34:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:References:Cc:To:Subject:From: MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=OdoFl1H7tad+FiH6Jx4QX+0Ct9KSzdxHRVg4nxEDkI8=; b=zQh/cNisk7VHJC F/8o7fSFN2zM92l3nGbw1ZvLza+1BYStpGA4W1oAbj1ycTKtZ6VxAnD6M+sLxcA8x0py5Tel8/SwX 1vdFiYwzFx+Ifd+lgt5t3avzGVSAAhF6XWwrbZAojgpPU7eSVYG+MiuIb5zeB7NM+3J+UvqKWPmWR drQyMI26RwxBLSyC8E/+Q8I1vwMMun4RF8wUIuW7P2NIxDsojrEM0fAO79PXf2LU40l77xwF495vk yacsawn8YB5NTBOVYxDDJDPaOOciTfo96c3P6GKQS5nOz8T89j7wjXxhS5rwrDaWUqK0RMaDpmeOF p6sTfcERm7cK8l1TeBOg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pFt21-00E6wy-Ka; Thu, 12 Jan 2023 08:33:53 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pFt1r-00E6u6-R1; Thu, 12 Jan 2023 08:33:46 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 040DBFEC; Thu, 12 Jan 2023 00:34:24 -0800 (PST) Received: from [192.168.1.12] (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 572C03F71A; Thu, 12 Jan 2023 00:33:40 -0800 (PST) Message-ID: <35413b5c-0d83-0f37-9ea7-1217305c138b@arm.com> Date: Thu, 12 Jan 2023 09:33:30 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 From: Pierre Gondois Subject: Re: [PATCH v2 17/23] arm64: dts: Update cache properties for realtek To: LKML Cc: =?UTF-8?Q?Andreas_F=c3=a4rber?= , Rob Herring , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-realtek-soc@lists.infradead.org, devicetree@vger.kernel.org References: <20221107155825.1644604-1-pierre.gondois@arm.com> <20221107155825.1644604-18-pierre.gondois@arm.com> Content-Language: en-US In-Reply-To: <20221107155825.1644604-18-pierre.gondois@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230112_003344_015053_65B9E819 X-CRM114-Status: GOOD ( 13.53 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org (subset for cc list) Hello, Just a reminder in case the patch was forgotten, Regards, Pierre On 11/7/22 16:57, Pierre Gondois wrote: > The DeviceTree Specification v0.3 specifies that the cache node > 'compatible' and 'cache-level' properties are 'required'. Cf. > s3.8 Multi-level and Shared Cache Nodes > The 'cache-unified' property should be present if one of the > properties for unified cache is present ('cache-size', ...). > > Update the Device Trees accordingly. > > Signed-off-by: Pierre Gondois > --- > arch/arm64/boot/dts/realtek/rtd1293.dtsi | 1 + > arch/arm64/boot/dts/realtek/rtd1295.dtsi | 1 + > arch/arm64/boot/dts/realtek/rtd1296.dtsi | 1 + > arch/arm64/boot/dts/realtek/rtd1395.dtsi | 1 + > arch/arm64/boot/dts/realtek/rtd16xx.dtsi | 2 ++ > 5 files changed, 6 insertions(+) > > diff --git a/arch/arm64/boot/dts/realtek/rtd1293.dtsi b/arch/arm64/boot/dts/realtek/rtd1293.dtsi > index 2d92b56ac94d..0696b99fc40d 100644 > --- a/arch/arm64/boot/dts/realtek/rtd1293.dtsi > +++ b/arch/arm64/boot/dts/realtek/rtd1293.dtsi > @@ -30,6 +30,7 @@ cpu1: cpu@1 { > > l2: l2-cache { > compatible = "cache"; > + cache-level = <2>; > }; > }; > > diff --git a/arch/arm64/boot/dts/realtek/rtd1295.dtsi b/arch/arm64/boot/dts/realtek/rtd1295.dtsi > index 1402abe80ea1..4ca322e420e6 100644 > --- a/arch/arm64/boot/dts/realtek/rtd1295.dtsi > +++ b/arch/arm64/boot/dts/realtek/rtd1295.dtsi > @@ -44,6 +44,7 @@ cpu3: cpu@3 { > > l2: l2-cache { > compatible = "cache"; > + cache-level = <2>; > }; > }; > > diff --git a/arch/arm64/boot/dts/realtek/rtd1296.dtsi b/arch/arm64/boot/dts/realtek/rtd1296.dtsi > index fb864a139c97..03fccd48f0c0 100644 > --- a/arch/arm64/boot/dts/realtek/rtd1296.dtsi > +++ b/arch/arm64/boot/dts/realtek/rtd1296.dtsi > @@ -44,6 +44,7 @@ cpu3: cpu@3 { > > l2: l2-cache { > compatible = "cache"; > + cache-level = <2>; > }; > }; > > diff --git a/arch/arm64/boot/dts/realtek/rtd1395.dtsi b/arch/arm64/boot/dts/realtek/rtd1395.dtsi > index 05c9216a87ee..94c0a8cf4953 100644 > --- a/arch/arm64/boot/dts/realtek/rtd1395.dtsi > +++ b/arch/arm64/boot/dts/realtek/rtd1395.dtsi > @@ -44,6 +44,7 @@ cpu3: cpu@3 { > > l2: l2-cache { > compatible = "cache"; > + cache-level = <2>; > }; > }; > > diff --git a/arch/arm64/boot/dts/realtek/rtd16xx.dtsi b/arch/arm64/boot/dts/realtek/rtd16xx.dtsi > index afba5f04c8ec..2ee9ba1ecdc1 100644 > --- a/arch/arm64/boot/dts/realtek/rtd16xx.dtsi > +++ b/arch/arm64/boot/dts/realtek/rtd16xx.dtsi > @@ -87,12 +87,14 @@ cpu5: cpu@500 { > > l2: l2-cache { > compatible = "cache"; > + cache-level = <2>; > next-level-cache = <&l3>; > > }; > > l3: l3-cache { > compatible = "cache"; > + cache-level = <3>; > }; > }; > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel