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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id fj14-20020a056a003a0e00b006e554afa254sm1698720pfb.38.2024.03.28.11.38.30 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 28 Mar 2024 11:38:31 -0700 (PDT) Message-ID: <364a15eb-ca23-4cd1-aff7-37de8bd7e825@linaro.org> Date: Thu, 28 Mar 2024 08:38:27 -1000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] hw/intc/arm_gicv3: ICC_HPPIR* return SPURIOUS if int group is disabled To: Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org References: <20240328153333.2522667-1-peter.maydell@linaro.org> Content-Language: en-US From: Richard Henderson In-Reply-To: <20240328153333.2522667-1-peter.maydell@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::435; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 3/28/24 05:33, Peter Maydell wrote: > If the group of the highest priority pending interrupt is disabled > via ICC_IGRPEN*, the ICC_HPPIR* registers should return > INTID_SPURIOUS, not the interrupt ID. (See the GIC architecture > specification pseudocode functions ICC_HPPIR1_EL1[] and > HighestPriorityPendingInterrupt().) > > Make HPPIR reads honour the group disable, the way we already do > when determining whether to preempt in icc_hppi_can_preempt(). > > Cc:qemu-stable@nongnu.org > Signed-off-by: Peter Maydell > --- > Pre-existing bug which I happened to notice while working > on review of the FEAT_NMI patches. I don't suppose real world > code disables interrupt groups which it's actually using, which > is why nobody's noticed it. Still, it's a safe bugfix so might > as well go to stable too. > --- > hw/intc/arm_gicv3_cpuif.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) Reviewed-by: Richard Henderson r~