On 23/09/2021 03:22, Florian Fainelli wrote: > > > On 9/22/2021 3:26 PM, Arınç ÜNAL wrote: >> On 22/09/2021 21:15, Florian Fainelli wrote: >>> On 9/21/21 5:19 AM, Arınç ÜNAL wrote: >>>> Hardware Info >>>> ------------- >>>> >>>> Processor    - Broadcom BCM4709C0KFEBG dual-core @ 1.4 GHz >>>> Switch        - BCM53012 in BCM4709C0KFEBG & external RTL8365MB >>> >>> There is no Device Tree description of the RTL8365MB switch, can it be >>> driven/controlled via MDIO, SPI or GPIOs by any chance? This is not a >>> show stopper for accepting the patch, just wondering if you are somehow >>> trying to get that switch controlled by the rtl8366 DSA driver as well? >>> >> There's a v1 patch on net-next adding DSA support for RTL8365MB by >> Alvin Šipraga, CC'ing them. There's also a v2 patch coming. >> https://lore.kernel.org/netdev/20210822193145.1312668-1-alvin@pqrs.dk/ >> >> I've been mailing Alvin to figure out how to define it on the device >> tree. They have provided very useful information. Quoting a few: >> >>  >> I'm trying to write the device tree to support this switch. I'm >> not sure >>  >> whether the default GPIO IDs of mdc-gpios, mdio-gpios, reset-gpios & >>  >> interrupts on realtek-smi.txt kernel documentation are correct. >>  >> >> https://elixir.bootlin.com/linux/latest/source/Documentation/devicetree/bindings/net/dsa/realtek-smi.txt >> >>  > >>  > These gpios are just an example. It really depends how your board is >>  > wired up. You have to figure out which SoC pad is wired to the MDC, >>  > MDIO, and RESET pins on the RTL8365MB. Then you have to make sure the >>  > pinmux is set up correctly so that these pads correspond to some GPIO >>  > with a given ID, and then pick the right GPIO controller >> (&chipcommon?) >>  > and put the ID after that. It will not necessarily be 21, 22, 14. >> >>  > In summary: >>  > >>  > - figure out which pads are wired to MDC, MDIO, RESET >>  > - figure out pinmux to make them into gpios >>  > - figure out gpio ID and describe that in the device tree >>  > >> >> I have backported the v1 patch to kernel 5.10 and tried an example >> definition on the device tree to test it out on RT-AC88U. It's on this >> branch: >> https://github.com/arinc9/openwrt/commits/realtek-work-asus_rt-ac88u > > Your dsa,member proper looks reversed, you would want it to be: > > dsa,member = <1 0>; Thanks! > > to indicate that these are indeed disjoint DSA trees with the tree being > 1 and the switch being member 0 (the one and only). This part of the > driver/binding looks a bit weird too: > >     switch@1 { > +        compatible = "realtek,rtl8365mb"; > +        /* 22 = MDIO (has input reads), 21 = MDC (clock, output only) */ > +        mdc-gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>; > +        mdio-gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>; > +        reset-gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>; > > this is clearly a MDIO-attached switch, so it should be a children of > the GPIO controller node. There is a hardware MDIO controller on the > BCM5301X so you should be able to avoid using bit-banging here and > instead using the BCM5301X's MDIO controller proper. I took linksys panamera device tree as an example, this device is very similar to Asus RT-AC88U. https://github.com/Broadcom/stblinux/blob/devicetree/next/arch/arm/boot/dts/bcm47094-linksys-panamera.dts I commented out the "reg" property on switch@1 so we can see if it finds the switch while scanning PHY addresses on mdio 200. I don't know if the default "interrupt-controller" and "compatible = "realtek,smi-mdio", "dsa-mdio";" specification is correct, so I took them out for now. mdio-mux@18003000 { /* BIT(9) = 1 => external mdio */ mdio@200 { reg = <0x200>; #address-cells = <1>; #size-cells = <0>; switch@1 { compatible = "realtek,rtl8365mb"; #address-cells = <1>; #size-cells = <0>; reset-gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>; reset-names = "robo_reset"; /* reg = <0>;*/ dsa,member = <1 0>; pinctrl-names = "default"; pinctrl-0 = <&pinmux_mdio>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; label = "lan8"; }; port@1 { reg = <1>; label = "lan7"; }; port@2 { reg = <2>; label = "lan6"; }; port@3 { reg = <3>; label = "lan5"; }; port@4 { reg = <4>; label = "cpu"; ethernet = <&sw0_p5>; phy-mode = "rgmii"; fixed-link { speed = <1000>; full-duplex; }; }; }; }; }; }; Here's relevant part of the bootlog. Full bootlog is in the attachments. [ 2.027843] bcm_iproc 18029200.spi: using bspi-mspi mode [ 2.034744] libphy: Fixed MDIO Bus: probed [ 2.039638] libphy: iProc MDIO bus: probed [ 2.043764] iproc-mdio 18003000.mdio: Broadcom iProc MDIO bus registered [ 2.051215] libphy: mdio_mux: probed [ 2.055587] libphy: mdio_mux: probed [ 2.059196] mdio_bus 0.200: switch@1 has invalid PHY address [ 2.064894] mdio_bus 0.200: scan phy switch at address 0 [ 2.070231] mdio_bus 0.200: scan phy switch at address 1 [ 2.075554] mdio_bus 0.200: scan phy switch at address 2 [ 2.080894] mdio_bus 0.200: scan phy switch at address 3 [ 2.086217] mdio_bus 0.200: scan phy switch at address 4 [ 2.091549] mdio_bus 0.200: scan phy switch at address 5 [ 2.096870] mdio_bus 0.200: scan phy switch at address 6 [ 2.102202] mdio_bus 0.200: scan phy switch at address 7 [ 2.107523] mdio_bus 0.200: scan phy switch at address 8 [ 2.112864] mdio_bus 0.200: scan phy switch at address 9 [ 2.118186] mdio_bus 0.200: scan phy switch at address 10 [ 2.123608] mdio_bus 0.200: scan phy switch at address 11 [ 2.129022] mdio_bus 0.200: scan phy switch at address 12 [ 2.134442] mdio_bus 0.200: scan phy switch at address 13 [ 2.139858] mdio_bus 0.200: scan phy switch at address 14 [ 2.145274] mdio_bus 0.200: scan phy switch at address 15 [ 2.150697] mdio_bus 0.200: scan phy switch at address 16 [ 2.156110] mdio_bus 0.200: scan phy switch at address 17 [ 2.161528] mdio_bus 0.200: scan phy switch at address 18 [ 2.166937] mdio_bus 0.200: scan phy switch at address 19 [ 2.172355] mdio_bus 0.200: scan phy switch at address 20 [ 2.177764] mdio_bus 0.200: scan phy switch at address 21 [ 2.183183] mdio_bus 0.200: scan phy switch at address 22 [ 2.188592] mdio_bus 0.200: scan phy switch at address 23 [ 2.194011] mdio_bus 0.200: scan phy switch at address 24 [ 2.199427] mdio_bus 0.200: scan phy switch at address 25 [ 2.204834] mdio_bus 0.200: scan phy switch at address 26 [ 2.210253] mdio_bus 0.200: scan phy switch at address 27 [ 2.215662] mdio_bus 0.200: scan phy switch at address 28 [ 2.221080] mdio_bus 0.200: scan phy switch at address 29 [ 2.226490] mdio_bus 0.200: scan phy switch at address 30 [ 2.231914] mdio_bus 0.200: scan phy switch at address 31 [ 2.237939] b53-srab-switch 18007000.ethernet-switch: found switch: BCM53012, rev 0 [ 2.245957] bgmac_bcma: Broadcom 47xx GBit MAC driver loaded Looks like the switch is not on 0x200, what else can we try? Arınç