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Thu, 11 Mar 2021 14:30:06 +0000 Received: from [10.25.96.88] (172.20.145.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 11 Mar 2021 14:30:02 +0000 Subject: Re: [PATCH 1/3] ASoC: simple-card-utils: Fix device module clock To: Michael Walle CC: , , , , , , , , , References: <1612939421-19900-2-git-send-email-spujar@nvidia.com> <20210309144156.18887-1-michael@walle.cc> <611ed3362dee3b3b7c7a80edfe763fd0@walle.cc> From: Sameer Pujar Message-ID: <36c37df5-dffb-9168-d92f-4b3e482602fa@nvidia.com> Date: Thu, 11 Mar 2021 19:59:59 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.12.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-GB X-Originating-IP: [172.20.145.6] X-ClientProxiedBy: HQMAIL107.nvidia.com (172.20.187.13) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: df94c9ed-03ae-4ea2-e490-08d8e49a2ab1 X-MS-TrafficTypeDiagnostic: BYAPR12MB3045: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:10000; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Mar 2021 14:30:06.4123 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: df94c9ed-03ae-4ea2-e490-08d8e49a2ab1 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.34];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT052.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR12MB3045 Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org On 3/11/2021 4:46 PM, Michael Walle wrote: > Am 2021-03-11 12:05, schrieb Sameer Pujar: > >> It would work and initially I had similar patch, see [0] and related >> series. Suggestion is to always use "clocks" property with devices >> only. > > I see. But again, I don't think it is correct to change the clock of > the codec by default. What happens if this is for example a > compatible = "fixed-clock"? The codec rate won't be changed unless a corresponding "*mclk-fs" is provided. > > As you pointed out in the referred thread [0]. simple-audio-card has > that clock and judging from the code it is exactly for this reason: > to either change/enable it or not. > > With this patch you'll switch that to "always change it". Therefore, > shouldn't there be a dt flag to indicate wheter simple-audio-card/graph > should be in charge of the codecs clock input? As mentioned above, it does not change always. Requires "*mclk-fs" to do so. May be below could be a possible alternative? - Re-order if-else of clock parsing.    if (!of_property_read_u32(node, "system-clock-frequency", &val)) {        // Since you are fixing rate already via "assigned-clocks" this may be a duplication. OR        // "assigned-clocks" can be parsed to understand if a fixed rate is expected.        simple_dai->sysclk = val;    } else {        // fetch MCLK clock from device and setup sysclk        // a. If "*mclk-fs" is given and "clocks" is found, the rate would be updated.        // b. If "*mclk-fs" is not mentioned and "clocks" is found, then simple-card utils won't touch rate. It will just do clock enable/disable.    } > > And its fetching just the first clock, doesn't it? What happens if a > codec has two clock inputs? Yes, it would have been more descriptive if it were specifically looking for clock "mclk". I think the original assumption was codec takes one input clock (MCLK) and uses it for sysclk. > > -michael > > [0] > https://patchwork.kernel.org/project/alsa-devel/patch/1611944866-29373-4-git-send-email-spujar@nvidia.com/ > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 672FCC433E6 for ; Thu, 11 Mar 2021 14:31:24 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A2FA364FF5 for ; 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kernel.org; dkim=none (message not signed) header.d=none;kernel.org; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by CO1NAM11FT052.mail.protection.outlook.com (10.13.174.225) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.3933.31 via Frontend Transport; Thu, 11 Mar 2021 14:30:06 +0000 Received: from [10.25.96.88] (172.20.145.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 11 Mar 2021 14:30:02 +0000 Subject: Re: [PATCH 1/3] ASoC: simple-card-utils: Fix device module clock To: Michael Walle References: <1612939421-19900-2-git-send-email-spujar@nvidia.com> <20210309144156.18887-1-michael@walle.cc> <611ed3362dee3b3b7c7a80edfe763fd0@walle.cc> From: Sameer Pujar Message-ID: <36c37df5-dffb-9168-d92f-4b3e482602fa@nvidia.com> Date: Thu, 11 Mar 2021 19:59:59 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE; SFS:(4636009)(136003)(39860400002)(376002)(346002)(396003)(46966006)(36840700001)(70586007)(70206006)(6916009)(83380400001)(53546011)(966005)(36906005)(36756003)(2906002)(16526019)(6666004)(31686004)(5660300002)(186003)(16576012)(478600001)(47076005)(426003)(336012)(82310400003)(8676002)(2616005)(54906003)(31696002)(7636003)(8936002)(26005)(34070700002)(4326008)(36860700001)(356005)(82740400003)(316002)(86362001)(43740500002); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Mar 2021 14:30:06.4123 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: df94c9ed-03ae-4ea2-e490-08d8e49a2ab1 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT052.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR12MB3045 Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, kuninori.morimoto.gx@renesas.com, robh@kernel.org, linux-kernel@vger.kernel.org, jonathanh@nvidia.com, sharadg@nvidia.com, broonie@kernel.org, thierry.reding@gmail.com, linux-tegra@vger.kernel.org X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" On 3/11/2021 4:46 PM, Michael Walle wrote: > Am 2021-03-11 12:05, schrieb Sameer Pujar: > >> It would work and initially I had similar patch, see [0] and related >> series. Suggestion is to always use "clocks" property with devices >> only. > > I see. But again, I don't think it is correct to change the clock of > the codec by default. What happens if this is for example a > compatible = "fixed-clock"? The codec rate won't be changed unless a corresponding "*mclk-fs" is provided. > > As you pointed out in the referred thread [0]. simple-audio-card has > that clock and judging from the code it is exactly for this reason: > to either change/enable it or not. > > With this patch you'll switch that to "always change it". Therefore, > shouldn't there be a dt flag to indicate wheter simple-audio-card/graph > should be in charge of the codecs clock input? As mentioned above, it does not change always. Requires "*mclk-fs" to do so. May be below could be a possible alternative? - Re-order if-else of clock parsing.    if (!of_property_read_u32(node, "system-clock-frequency", &val)) {        // Since you are fixing rate already via "assigned-clocks" this may be a duplication. OR        // "assigned-clocks" can be parsed to understand if a fixed rate is expected.        simple_dai->sysclk = val;    } else {        // fetch MCLK clock from device and setup sysclk        // a. If "*mclk-fs" is given and "clocks" is found, the rate would be updated.        // b. If "*mclk-fs" is not mentioned and "clocks" is found, then simple-card utils won't touch rate. It will just do clock enable/disable.    } > > And its fetching just the first clock, doesn't it? What happens if a > codec has two clock inputs? Yes, it would have been more descriptive if it were specifically looking for clock "mclk". I think the original assumption was codec takes one input clock (MCLK) and uses it for sysclk. > > -michael > > [0] > https://patchwork.kernel.org/project/alsa-devel/patch/1611944866-29373-4-git-send-email-spujar@nvidia.com/ >