[PATCHv2 0/5] Add Arria10 System Manager Reset Controller

[PATCHv2 0/5] Add Arria10 System Manager Reset Controller

[thor.thayer]

From: Thor Thayer <thor.thayer@linux.intel.com>

This series of patches adds the Altera Arria10 Development Kit System
Resource Chip's Reset Controller.

Thor Thayer (5):
  dt-bindings: mfd: Add Altera Arria10 SR Reset Controller bindings
  dt-bindings: reset: a10sr: Add Arria10 SR Reset Controller offsets
  reset: Add Altera Arria10 SR Reset Controller
  mfd: altr_a10sr: Add Arria10 DevKit Reset Controller
  ARM: dts: socfpga: Add Devkit A10-SR Reset Controller

 .../devicetree/bindings/mfd/altera-a10sr.txt       |  11 ++
 MAINTAINERS                                        |   2 +
 arch/arm/boot/dts/socfpga_arria10_socdk.dtsi       |   5 +
 drivers/mfd/altera-a10sr.c                         |   4 +
 drivers/reset/Kconfig                              |   7 ++
 drivers/reset/Makefile                             |   1 +
 drivers/reset/reset-a10sr.c                        | 138 +++++++++++++++++++++
 include/dt-bindings/reset/altr,rst-mgr-a10sr.h     |  33 +++++
 8 files changed, 201 insertions(+)
 create mode 100644 drivers/reset/reset-a10sr.c
 create mode 100644 include/dt-bindings/reset/altr,rst-mgr-a10sr.h

-- 
1.9.1

[PATCHv2 0/5] Add Arria10 System Manager Reset Controller

[thor.thayer at linux.intel.com]

From: Thor Thayer <thor.thayer@linux.intel.com>

This series of patches adds the Altera Arria10 Development Kit System
Resource Chip's Reset Controller.

Thor Thayer (5):
  dt-bindings: mfd: Add Altera Arria10 SR Reset Controller bindings
  dt-bindings: reset: a10sr: Add Arria10 SR Reset Controller offsets
  reset: Add Altera Arria10 SR Reset Controller
  mfd: altr_a10sr: Add Arria10 DevKit Reset Controller
  ARM: dts: socfpga: Add Devkit A10-SR Reset Controller

 .../devicetree/bindings/mfd/altera-a10sr.txt       |  11 ++
 MAINTAINERS                                        |   2 +
 arch/arm/boot/dts/socfpga_arria10_socdk.dtsi       |   5 +
 drivers/mfd/altera-a10sr.c                         |   4 +
 drivers/reset/Kconfig                              |   7 ++
 drivers/reset/Makefile                             |   1 +
 drivers/reset/reset-a10sr.c                        | 138 +++++++++++++++++++++
 include/dt-bindings/reset/altr,rst-mgr-a10sr.h     |  33 +++++
 8 files changed, 201 insertions(+)
 create mode 100644 drivers/reset/reset-a10sr.c
 create mode 100644 include/dt-bindings/reset/altr,rst-mgr-a10sr.h

-- 
1.9.1

[PATCHv2 1/5] dt-bindings: mfd: Add Altera Arria10 SR Reset Controller bindings

[thor.thayer]

From: Thor Thayer <thor.thayer@linux.intel.com>

This patch adds documentation for the Altera A10-SR Reset
Controller DT bindings.

Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
---
v2  No change
---
 Documentation/devicetree/bindings/mfd/altera-a10sr.txt | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/Documentation/devicetree/bindings/mfd/altera-a10sr.txt b/Documentation/devicetree/bindings/mfd/altera-a10sr.txt
index ea151f2..c8a7365 100644
--- a/Documentation/devicetree/bindings/mfd/altera-a10sr.txt
+++ b/Documentation/devicetree/bindings/mfd/altera-a10sr.txt
@@ -18,6 +18,7 @@ The A10SR consists of these sub-devices:
 Device                   Description
 ------                   ----------
 a10sr_gpio               GPIO Controller
+a10sr_rst                Reset Controller
 
 Arria10 GPIO
 Required Properties:
@@ -27,6 +28,11 @@ Required Properties:
                       the second cell is used to specify flags.
                       See ../gpio/gpio.txt for more information.
 
+Arria10 Peripheral PHY Reset
+Required Properties:
+- compatible        : Should be "altr,a10sr-reset"
+- #reset-cells      : Should be one.
+
 Example:
 
         resource-manager@0 {
@@ -43,4 +49,9 @@ Example:
 			gpio-controller;
 			#gpio-cells = <2>;
 		};
+
+		a10sr_rst: reset-controller {
+			compatible = "altr,a10sr-reset";
+			#reset-cells = <1>;
+		};
 	};
-- 
1.9.1

[PATCHv2 1/5] dt-bindings: mfd: Add Altera Arria10 SR Reset Controller bindings

[thor.thayer at linux.intel.com]

From: Thor Thayer <thor.thayer@linux.intel.com>

This patch adds documentation for the Altera A10-SR Reset
Controller DT bindings.

Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
---
v2  No change
---
 Documentation/devicetree/bindings/mfd/altera-a10sr.txt | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/Documentation/devicetree/bindings/mfd/altera-a10sr.txt b/Documentation/devicetree/bindings/mfd/altera-a10sr.txt
index ea151f2..c8a7365 100644
--- a/Documentation/devicetree/bindings/mfd/altera-a10sr.txt
+++ b/Documentation/devicetree/bindings/mfd/altera-a10sr.txt
@@ -18,6 +18,7 @@ The A10SR consists of these sub-devices:
 Device                   Description
 ------                   ----------
 a10sr_gpio               GPIO Controller
+a10sr_rst                Reset Controller
 
 Arria10 GPIO
 Required Properties:
@@ -27,6 +28,11 @@ Required Properties:
                       the second cell is used to specify flags.
                       See ../gpio/gpio.txt for more information.
 
+Arria10 Peripheral PHY Reset
+Required Properties:
+- compatible        : Should be "altr,a10sr-reset"
+- #reset-cells      : Should be one.
+
 Example:
 
         resource-manager at 0 {
@@ -43,4 +49,9 @@ Example:
 			gpio-controller;
 			#gpio-cells = <2>;
 		};
+
+		a10sr_rst: reset-controller {
+			compatible = "altr,a10sr-reset";
+			#reset-cells = <1>;
+		};
 	};
-- 
1.9.1

[PATCHv2 2/5] dt-bindings: reset: a10sr: Add Arria10 SR Reset Controller offsets

[thor.thayer]

From: Thor Thayer <thor.thayer@linux.intel.com>

The Arria10 System Resource Chip reset controller handles the
Arria10 peripheral PHYs. This patch adds the offsets for
these PHYs.

Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
---
v2  Add NUM_RESETs to altr,rst-mgr-a10sr.h for maximum count.
---
 MAINTAINERS                                    |  1 +
 include/dt-bindings/reset/altr,rst-mgr-a10sr.h | 33 ++++++++++++++++++++++++++
 2 files changed, 34 insertions(+)
 create mode 100644 include/dt-bindings/reset/altr,rst-mgr-a10sr.h

diff --git a/MAINTAINERS b/MAINTAINERS
index b9af886..4b714bd 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -654,6 +654,7 @@ S:	Maintained
 F:	drivers/gpio/gpio-altera-a10sr.c
 F:	drivers/mfd/altera-a10sr.c
 F:	include/linux/mfd/altera-a10sr.h
+F:	include/dt-bindings/reset/altr,rst-mgr-a10sr.h
 
 ALTERA TRIPLE SPEED ETHERNET DRIVER
 M:	Vince Bridgers <vbridger@opensource.altera.com>
diff --git a/include/dt-bindings/reset/altr,rst-mgr-a10sr.h b/include/dt-bindings/reset/altr,rst-mgr-a10sr.h
new file mode 100644
index 0000000..9855925
--- /dev/null
+++ b/include/dt-bindings/reset/altr,rst-mgr-a10sr.h
@@ -0,0 +1,33 @@
+/*
+ *  Copyright Intel Corporation (C) 2017. All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ * Reset binding definitions for Altera Arria10 MAX5 System Resource Chip
+ *
+ * Adapted from altr,rst-mgr-a10.h
+ */
+
+#ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_H
+#define _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_H
+
+/* Peripheral PHY resets */
+#define A10SR_RESET_ENET_HPS	0
+#define A10SR_RESET_PCIE	1
+#define A10SR_RESET_FILE	2
+#define A10SR_RESET_BQSPI	3
+#define A10SR_RESET_USB		4
+
+#define A10SR_RESET_NUM		5
+
+#endif
-- 
1.9.1

[PATCHv2 2/5] dt-bindings: reset: a10sr: Add Arria10 SR Reset Controller offsets

[thor.thayer-VuQAYsv1563Yd54FQh9/CA]

From: Thor Thayer <thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>

The Arria10 System Resource Chip reset controller handles the
Arria10 peripheral PHYs. This patch adds the offsets for
these PHYs.

Signed-off-by: Thor Thayer <thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
---
v2  Add NUM_RESETs to altr,rst-mgr-a10sr.h for maximum count.
---
 MAINTAINERS                                    |  1 +
 include/dt-bindings/reset/altr,rst-mgr-a10sr.h | 33 ++++++++++++++++++++++++++
 2 files changed, 34 insertions(+)
 create mode 100644 include/dt-bindings/reset/altr,rst-mgr-a10sr.h

diff --git a/MAINTAINERS b/MAINTAINERS
index b9af886..4b714bd 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -654,6 +654,7 @@ S:	Maintained
 F:	drivers/gpio/gpio-altera-a10sr.c
 F:	drivers/mfd/altera-a10sr.c
 F:	include/linux/mfd/altera-a10sr.h
+F:	include/dt-bindings/reset/altr,rst-mgr-a10sr.h
 
 ALTERA TRIPLE SPEED ETHERNET DRIVER
 M:	Vince Bridgers <vbridger-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
diff --git a/include/dt-bindings/reset/altr,rst-mgr-a10sr.h b/include/dt-bindings/reset/altr,rst-mgr-a10sr.h
new file mode 100644
index 0000000..9855925
--- /dev/null
+++ b/include/dt-bindings/reset/altr,rst-mgr-a10sr.h
@@ -0,0 +1,33 @@
+/*
+ *  Copyright Intel Corporation (C) 2017. All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ * Reset binding definitions for Altera Arria10 MAX5 System Resource Chip
+ *
+ * Adapted from altr,rst-mgr-a10.h
+ */
+
+#ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_H
+#define _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_H
+
+/* Peripheral PHY resets */
+#define A10SR_RESET_ENET_HPS	0
+#define A10SR_RESET_PCIE	1
+#define A10SR_RESET_FILE	2
+#define A10SR_RESET_BQSPI	3
+#define A10SR_RESET_USB		4
+
+#define A10SR_RESET_NUM		5
+
+#endif
-- 
1.9.1

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[PATCHv2 2/5] dt-bindings: reset: a10sr: Add Arria10 SR Reset Controller offsets

[thor.thayer at linux.intel.com]

From: Thor Thayer <thor.thayer@linux.intel.com>

The Arria10 System Resource Chip reset controller handles the
Arria10 peripheral PHYs. This patch adds the offsets for
these PHYs.

Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
---
v2  Add NUM_RESETs to altr,rst-mgr-a10sr.h for maximum count.
---
 MAINTAINERS                                    |  1 +
 include/dt-bindings/reset/altr,rst-mgr-a10sr.h | 33 ++++++++++++++++++++++++++
 2 files changed, 34 insertions(+)
 create mode 100644 include/dt-bindings/reset/altr,rst-mgr-a10sr.h

diff --git a/MAINTAINERS b/MAINTAINERS
index b9af886..4b714bd 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -654,6 +654,7 @@ S:	Maintained
 F:	drivers/gpio/gpio-altera-a10sr.c
 F:	drivers/mfd/altera-a10sr.c
 F:	include/linux/mfd/altera-a10sr.h
+F:	include/dt-bindings/reset/altr,rst-mgr-a10sr.h
 
 ALTERA TRIPLE SPEED ETHERNET DRIVER
 M:	Vince Bridgers <vbridger@opensource.altera.com>
diff --git a/include/dt-bindings/reset/altr,rst-mgr-a10sr.h b/include/dt-bindings/reset/altr,rst-mgr-a10sr.h
new file mode 100644
index 0000000..9855925
--- /dev/null
+++ b/include/dt-bindings/reset/altr,rst-mgr-a10sr.h
@@ -0,0 +1,33 @@
+/*
+ *  Copyright Intel Corporation (C) 2017. All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ * Reset binding definitions for Altera Arria10 MAX5 System Resource Chip
+ *
+ * Adapted from altr,rst-mgr-a10.h
+ */
+
+#ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_H
+#define _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_H
+
+/* Peripheral PHY resets */
+#define A10SR_RESET_ENET_HPS	0
+#define A10SR_RESET_PCIE	1
+#define A10SR_RESET_FILE	2
+#define A10SR_RESET_BQSPI	3
+#define A10SR_RESET_USB		4
+
+#define A10SR_RESET_NUM		5
+
+#endif
-- 
1.9.1

[PATCHv2 3/5] reset: Add Altera Arria10 SR Reset Controller

[thor.thayer]

From: Thor Thayer <thor.thayer@linux.intel.com>

This patch adds the reset controller functionality for
Peripheral PHYs to the Arria10 System Resource Chip.

Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
---
V2  Rename and move new Kconfig to correct alphabetical order.
    Update Makefile with better Kconfig name.
    Alphabetize MAINTAINER drivers entry.
    Remove unused include files.
    Replace 16 reset size with actual size. Enumerate size in
    header file.
    Remove extra id in-range checks since framework checks this.
    Return error code from regmap_read() fail instead of fixed error.
    Remove device_node validation since framework handles this.
    Remove device_node and device local variables in cleanup.
    Delete a10sr_reset_remove() since using devm_ functions.
    Delete .remove function and .owner from platform_driver struct.
    Minor cleanup of commit header and commit description.
---
 MAINTAINERS                 |   1 +
 drivers/reset/Kconfig       |   7 +++
 drivers/reset/Makefile      |   1 +
 drivers/reset/reset-a10sr.c | 138 ++++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 147 insertions(+)
 create mode 100644 drivers/reset/reset-a10sr.c

diff --git a/MAINTAINERS b/MAINTAINERS
index 4b714bd..35ffb92 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -653,6 +653,7 @@ M:	Thor Thayer <thor.thayer@linux.intel.com>
 S:	Maintained
 F:	drivers/gpio/gpio-altera-a10sr.c
 F:	drivers/mfd/altera-a10sr.c
+F:	drivers/reset/reset-a10sr.c
 F:	include/linux/mfd/altera-a10sr.h
 F:	include/dt-bindings/reset/altr,rst-mgr-a10sr.h
 
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index f4cdfe9..54e4b8b 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -14,6 +14,13 @@ menuconfig RESET_CONTROLLER
 
 if RESET_CONTROLLER
 
+config RESET_A10SR
+	tristate "Altera Arria10 System Resource Reset"
+	depends on MFD_ALTERA_A10SR
+	help
+	  This option enables support for the external reset functions for
+	  peripheral PHYs on the Altera Arria10 System Resource Chip.
+
 config RESET_ATH79
 	bool "AR71xx Reset Driver" if COMPILE_TEST
 	default ATH79
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 2cd3f6c..8f6eb57 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -2,6 +2,7 @@ obj-y += core.o
 obj-y += hisilicon/
 obj-$(CONFIG_ARCH_STI) += sti/
 obj-$(CONFIG_ARCH_TEGRA) += tegra/
+obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
 obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
 obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o
 obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o
diff --git a/drivers/reset/reset-a10sr.c b/drivers/reset/reset-a10sr.c
new file mode 100644
index 0000000..37496bd
--- /dev/null
+++ b/drivers/reset/reset-a10sr.c
@@ -0,0 +1,138 @@
+/*
+ *  Copyright Intel Corporation (C) 2017. All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ * Reset driver for Altera Arria10 MAX5 System Resource Chip
+ *
+ * Adapted from reset-socfpga.c
+ */
+
+#include <linux/err.h>
+#include <linux/mfd/altera-a10sr.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/reset-controller.h>
+
+#include <dt-bindings/reset/altr,rst-mgr-a10sr.h>
+
+struct a10sr_reset {
+	struct reset_controller_dev     rcdev;
+	struct regmap *regmap;
+};
+
+static inline struct a10sr_reset *to_a10sr_rst(struct reset_controller_dev *rc)
+{
+	return container_of(rc, struct a10sr_reset, rcdev);
+}
+
+static inline int a10sr_reset_shift(unsigned long id)
+{
+	switch (id) {
+	case A10SR_RESET_ENET_HPS:
+		return 1;
+	case A10SR_RESET_PCIE:
+	case A10SR_RESET_FILE:
+	case A10SR_RESET_BQSPI:
+	case A10SR_RESET_USB:
+		return id + 11;
+	default:
+		return -EINVAL;
+	}
+}
+
+static int a10sr_reset_update(struct reset_controller_dev *rcdev,
+			      unsigned long id, bool assert)
+{
+	struct a10sr_reset *a10r = to_a10sr_rst(rcdev);
+	int offset = a10sr_reset_shift(id);
+	u8 mask = ALTR_A10SR_REG_BIT_MASK(offset);
+	int index = ALTR_A10SR_HPS_RST_REG + ALTR_A10SR_REG_OFFSET(offset);
+
+	return regmap_update_bits(a10r->regmap, index, mask, assert ? 0 : mask);
+}
+
+static int a10sr_reset_assert(struct reset_controller_dev *rcdev,
+			      unsigned long id)
+{
+	return a10sr_reset_update(rcdev, id, true);
+}
+
+static int a10sr_reset_deassert(struct reset_controller_dev *rcdev,
+				unsigned long id)
+{
+	return a10sr_reset_update(rcdev, id, false);
+}
+
+static int a10sr_reset_status(struct reset_controller_dev *rcdev,
+			      unsigned long id)
+{
+	int ret;
+	struct a10sr_reset *a10r = to_a10sr_rst(rcdev);
+	int offset = a10sr_reset_shift(id);
+	u8 mask = ALTR_A10SR_REG_BIT_MASK(offset);
+	int index = ALTR_A10SR_HPS_RST_REG + ALTR_A10SR_REG_OFFSET(offset);
+	unsigned int value;
+
+	ret = regmap_read(a10r->regmap, index, &value);
+	if (ret < 0)
+		return ret;
+
+	return !!(value & mask);
+}
+
+static const struct reset_control_ops a10sr_reset_ops = {
+	.assert		= a10sr_reset_assert,
+	.deassert	= a10sr_reset_deassert,
+	.status		= a10sr_reset_status,
+};
+
+static int a10sr_reset_probe(struct platform_device *pdev)
+{
+	struct altr_a10sr *a10sr = dev_get_drvdata(pdev->dev.parent);
+	struct a10sr_reset *a10r;
+
+	a10r = devm_kzalloc(&pdev->dev, sizeof(struct a10sr_reset),
+			    GFP_KERNEL);
+	if (!a10r)
+		return -ENOMEM;
+
+	a10r->rcdev.owner = THIS_MODULE;
+	a10r->rcdev.nr_resets = A10SR_RESET_NUM;
+	a10r->rcdev.ops = &a10sr_reset_ops;
+	a10r->rcdev.of_node = pdev->dev.of_node;
+	a10r->regmap = a10sr->regmap;
+
+	platform_set_drvdata(pdev, a10r);
+
+	return devm_reset_controller_register(&pdev->dev, &a10r->rcdev);
+}
+
+static const struct of_device_id a10sr_reset_of_match[] = {
+	{ .compatible = "altr,a10sr-reset" },
+	{ },
+};
+MODULE_DEVICE_TABLE(of, a10sr_reset_of_match);
+
+static struct platform_driver a10sr_reset_driver = {
+	.probe	= a10sr_reset_probe,
+	.driver = {
+		.name		= "altr_a10sr_reset",
+	},
+};
+module_platform_driver(a10sr_reset_driver);
+
+MODULE_AUTHOR("Thor Thayer <thor.thayer@linux.intel.com>");
+MODULE_DESCRIPTION("Altera Arria10 System Resource Reset Controller Driver");
+MODULE_LICENSE("GPL v2");
-- 
1.9.1

[PATCHv2 3/5] reset: Add Altera Arria10 SR Reset Controller

[thor.thayer]

From: Thor Thayer <thor.thayer@linux.intel.com>

This patch adds the reset controller functionality for
Peripheral PHYs to the Arria10 System Resource Chip.

Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
---
V2  Rename and move new Kconfig to correct alphabetical order.
    Update Makefile with better Kconfig name.
    Alphabetize MAINTAINER drivers entry.
    Remove unused include files.
    Replace 16 reset size with actual size. Enumerate size in
    header file.
    Remove extra id in-range checks since framework checks this.
    Return error code from regmap_read() fail instead of fixed error.
    Remove device_node validation since framework handles this.
    Remove device_node and device local variables in cleanup.
    Delete a10sr_reset_remove() since using devm_ functions.
    Delete .remove function and .owner from platform_driver struct.
    Minor cleanup of commit header and commit description.
---
 MAINTAINERS                 |   1 +
 drivers/reset/Kconfig       |   7 +++
 drivers/reset/Makefile      |   1 +
 drivers/reset/reset-a10sr.c | 138 ++++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 147 insertions(+)
 create mode 100644 drivers/reset/reset-a10sr.c

diff --git a/MAINTAINERS b/MAINTAINERS
index 4b714bd..35ffb92 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -653,6 +653,7 @@ M:	Thor Thayer <thor.thayer@linux.intel.com>
 S:	Maintained
 F:	drivers/gpio/gpio-altera-a10sr.c
 F:	drivers/mfd/altera-a10sr.c
+F:	drivers/reset/reset-a10sr.c
 F:	include/linux/mfd/altera-a10sr.h
 F:	include/dt-bindings/reset/altr,rst-mgr-a10sr.h
 
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index f4cdfe9..54e4b8b 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -14,6 +14,13 @@ menuconfig RESET_CONTROLLER
 
 if RESET_CONTROLLER
 
+config RESET_A10SR
+	tristate "Altera Arria10 System Resource Reset"
+	depends on MFD_ALTERA_A10SR
+	help
+	  This option enables support for the external reset functions for
+	  peripheral PHYs on the Altera Arria10 System Resource Chip.
+
 config RESET_ATH79
 	bool "AR71xx Reset Driver" if COMPILE_TEST
 	default ATH79
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 2cd3f6c..8f6eb57 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -2,6 +2,7 @@ obj-y += core.o
 obj-y += hisilicon/
 obj-$(CONFIG_ARCH_STI) += sti/
 obj-$(CONFIG_ARCH_TEGRA) += tegra/
+obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
 obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
 obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o
 obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o
diff --git a/drivers/reset/reset-a10sr.c b/drivers/reset/reset-a10sr.c
new file mode 100644
index 0000000..37496bd
--- /dev/null
+++ b/drivers/reset/reset-a10sr.c
@@ -0,0 +1,138 @@
+/*
+ *  Copyright Intel Corporation (C) 2017. All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ * Reset driver for Altera Arria10 MAX5 System Resource Chip
+ *
+ * Adapted from reset-socfpga.c
+ */
+
+#include <linux/err.h>
+#include <linux/mfd/altera-a10sr.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/reset-controller.h>
+
+#include <dt-bindings/reset/altr,rst-mgr-a10sr.h>
+
+struct a10sr_reset {
+	struct reset_controller_dev     rcdev;
+	struct regmap *regmap;
+};
+
+static inline struct a10sr_reset *to_a10sr_rst(struct reset_controller_dev *rc)
+{
+	return container_of(rc, struct a10sr_reset, rcdev);
+}
+
+static inline int a10sr_reset_shift(unsigned long id)
+{
+	switch (id) {
+	case A10SR_RESET_ENET_HPS:
+		return 1;
+	case A10SR_RESET_PCIE:
+	case A10SR_RESET_FILE:
+	case A10SR_RESET_BQSPI:
+	case A10SR_RESET_USB:
+		return id + 11;
+	default:
+		return -EINVAL;
+	}
+}
+
+static int a10sr_reset_update(struct reset_controller_dev *rcdev,
+			      unsigned long id, bool assert)
+{
+	struct a10sr_reset *a10r = to_a10sr_rst(rcdev);
+	int offset = a10sr_reset_shift(id);
+	u8 mask = ALTR_A10SR_REG_BIT_MASK(offset);
+	int index = ALTR_A10SR_HPS_RST_REG + ALTR_A10SR_REG_OFFSET(offset);
+
+	return regmap_update_bits(a10r->regmap, index, mask, assert ? 0 : mask);
+}
+
+static int a10sr_reset_assert(struct reset_controller_dev *rcdev,
+			      unsigned long id)
+{
+	return a10sr_reset_update(rcdev, id, true);
+}
+
+static int a10sr_reset_deassert(struct reset_controller_dev *rcdev,
+				unsigned long id)
+{
+	return a10sr_reset_update(rcdev, id, false);
+}
+
+static int a10sr_reset_status(struct reset_controller_dev *rcdev,
+			      unsigned long id)
+{
+	int ret;
+	struct a10sr_reset *a10r = to_a10sr_rst(rcdev);
+	int offset = a10sr_reset_shift(id);
+	u8 mask = ALTR_A10SR_REG_BIT_MASK(offset);
+	int index = ALTR_A10SR_HPS_RST_REG + ALTR_A10SR_REG_OFFSET(offset);
+	unsigned int value;
+
+	ret = regmap_read(a10r->regmap, index, &value);
+	if (ret < 0)
+		return ret;
+
+	return !!(value & mask);
+}
+
+static const struct reset_control_ops a10sr_reset_ops = {
+	.assert		= a10sr_reset_assert,
+	.deassert	= a10sr_reset_deassert,
+	.status		= a10sr_reset_status,
+};
+
+static int a10sr_reset_probe(struct platform_device *pdev)
+{
+	struct altr_a10sr *a10sr = dev_get_drvdata(pdev->dev.parent);
+	struct a10sr_reset *a10r;
+
+	a10r = devm_kzalloc(&pdev->dev, sizeof(struct a10sr_reset),
+			    GFP_KERNEL);
+	if (!a10r)
+		return -ENOMEM;
+
+	a10r->rcdev.owner = THIS_MODULE;
+	a10r->rcdev.nr_resets = A10SR_RESET_NUM;
+	a10r->rcdev.ops = &a10sr_reset_ops;
+	a10r->rcdev.of_node = pdev->dev.of_node;
+	a10r->regmap = a10sr->regmap;
+
+	platform_set_drvdata(pdev, a10r);
+
+	return devm_reset_controller_register(&pdev->dev, &a10r->rcdev);
+}
+
+static const struct of_device_id a10sr_reset_of_match[] = {
+	{ .compatible = "altr,a10sr-reset" },
+	{ },
+};
+MODULE_DEVICE_TABLE(of, a10sr_reset_of_match);
+
+static struct platform_driver a10sr_reset_driver = {
+	.probe	= a10sr_reset_probe,
+	.driver = {
+		.name		= "altr_a10sr_reset",
+	},
+};
+module_platform_driver(a10sr_reset_driver);
+
+MODULE_AUTHOR("Thor Thayer <thor.thayer@linux.intel.com>");
+MODULE_DESCRIPTION("Altera Arria10 System Resource Reset Controller Driver");
+MODULE_LICENSE("GPL v2");
-- 
1.9.1

[PATCHv2 3/5] reset: Add Altera Arria10 SR Reset Controller

[thor.thayer at linux.intel.com]

From: Thor Thayer <thor.thayer@linux.intel.com>

This patch adds the reset controller functionality for
Peripheral PHYs to the Arria10 System Resource Chip.

Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
---
V2  Rename and move new Kconfig to correct alphabetical order.
    Update Makefile with better Kconfig name.
    Alphabetize MAINTAINER drivers entry.
    Remove unused include files.
    Replace 16 reset size with actual size. Enumerate size in
    header file.
    Remove extra id in-range checks since framework checks this.
    Return error code from regmap_read() fail instead of fixed error.
    Remove device_node validation since framework handles this.
    Remove device_node and device local variables in cleanup.
    Delete a10sr_reset_remove() since using devm_ functions.
    Delete .remove function and .owner from platform_driver struct.
    Minor cleanup of commit header and commit description.
---
 MAINTAINERS                 |   1 +
 drivers/reset/Kconfig       |   7 +++
 drivers/reset/Makefile      |   1 +
 drivers/reset/reset-a10sr.c | 138 ++++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 147 insertions(+)
 create mode 100644 drivers/reset/reset-a10sr.c

diff --git a/MAINTAINERS b/MAINTAINERS
index 4b714bd..35ffb92 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -653,6 +653,7 @@ M:	Thor Thayer <thor.thayer@linux.intel.com>
 S:	Maintained
 F:	drivers/gpio/gpio-altera-a10sr.c
 F:	drivers/mfd/altera-a10sr.c
+F:	drivers/reset/reset-a10sr.c
 F:	include/linux/mfd/altera-a10sr.h
 F:	include/dt-bindings/reset/altr,rst-mgr-a10sr.h
 
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index f4cdfe9..54e4b8b 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -14,6 +14,13 @@ menuconfig RESET_CONTROLLER
 
 if RESET_CONTROLLER
 
+config RESET_A10SR
+	tristate "Altera Arria10 System Resource Reset"
+	depends on MFD_ALTERA_A10SR
+	help
+	  This option enables support for the external reset functions for
+	  peripheral PHYs on the Altera Arria10 System Resource Chip.
+
 config RESET_ATH79
 	bool "AR71xx Reset Driver" if COMPILE_TEST
 	default ATH79
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 2cd3f6c..8f6eb57 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -2,6 +2,7 @@ obj-y += core.o
 obj-y += hisilicon/
 obj-$(CONFIG_ARCH_STI) += sti/
 obj-$(CONFIG_ARCH_TEGRA) += tegra/
+obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
 obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
 obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o
 obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o
diff --git a/drivers/reset/reset-a10sr.c b/drivers/reset/reset-a10sr.c
new file mode 100644
index 0000000..37496bd
--- /dev/null
+++ b/drivers/reset/reset-a10sr.c
@@ -0,0 +1,138 @@
+/*
+ *  Copyright Intel Corporation (C) 2017. All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ * Reset driver for Altera Arria10 MAX5 System Resource Chip
+ *
+ * Adapted from reset-socfpga.c
+ */
+
+#include <linux/err.h>
+#include <linux/mfd/altera-a10sr.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/reset-controller.h>
+
+#include <dt-bindings/reset/altr,rst-mgr-a10sr.h>
+
+struct a10sr_reset {
+	struct reset_controller_dev     rcdev;
+	struct regmap *regmap;
+};
+
+static inline struct a10sr_reset *to_a10sr_rst(struct reset_controller_dev *rc)
+{
+	return container_of(rc, struct a10sr_reset, rcdev);
+}
+
+static inline int a10sr_reset_shift(unsigned long id)
+{
+	switch (id) {
+	case A10SR_RESET_ENET_HPS:
+		return 1;
+	case A10SR_RESET_PCIE:
+	case A10SR_RESET_FILE:
+	case A10SR_RESET_BQSPI:
+	case A10SR_RESET_USB:
+		return id + 11;
+	default:
+		return -EINVAL;
+	}
+}
+
+static int a10sr_reset_update(struct reset_controller_dev *rcdev,
+			      unsigned long id, bool assert)
+{
+	struct a10sr_reset *a10r = to_a10sr_rst(rcdev);
+	int offset = a10sr_reset_shift(id);
+	u8 mask = ALTR_A10SR_REG_BIT_MASK(offset);
+	int index = ALTR_A10SR_HPS_RST_REG + ALTR_A10SR_REG_OFFSET(offset);
+
+	return regmap_update_bits(a10r->regmap, index, mask, assert ? 0 : mask);
+}
+
+static int a10sr_reset_assert(struct reset_controller_dev *rcdev,
+			      unsigned long id)
+{
+	return a10sr_reset_update(rcdev, id, true);
+}
+
+static int a10sr_reset_deassert(struct reset_controller_dev *rcdev,
+				unsigned long id)
+{
+	return a10sr_reset_update(rcdev, id, false);
+}
+
+static int a10sr_reset_status(struct reset_controller_dev *rcdev,
+			      unsigned long id)
+{
+	int ret;
+	struct a10sr_reset *a10r = to_a10sr_rst(rcdev);
+	int offset = a10sr_reset_shift(id);
+	u8 mask = ALTR_A10SR_REG_BIT_MASK(offset);
+	int index = ALTR_A10SR_HPS_RST_REG + ALTR_A10SR_REG_OFFSET(offset);
+	unsigned int value;
+
+	ret = regmap_read(a10r->regmap, index, &value);
+	if (ret < 0)
+		return ret;
+
+	return !!(value & mask);
+}
+
+static const struct reset_control_ops a10sr_reset_ops = {
+	.assert		= a10sr_reset_assert,
+	.deassert	= a10sr_reset_deassert,
+	.status		= a10sr_reset_status,
+};
+
+static int a10sr_reset_probe(struct platform_device *pdev)
+{
+	struct altr_a10sr *a10sr = dev_get_drvdata(pdev->dev.parent);
+	struct a10sr_reset *a10r;
+
+	a10r = devm_kzalloc(&pdev->dev, sizeof(struct a10sr_reset),
+			    GFP_KERNEL);
+	if (!a10r)
+		return -ENOMEM;
+
+	a10r->rcdev.owner = THIS_MODULE;
+	a10r->rcdev.nr_resets = A10SR_RESET_NUM;
+	a10r->rcdev.ops = &a10sr_reset_ops;
+	a10r->rcdev.of_node = pdev->dev.of_node;
+	a10r->regmap = a10sr->regmap;
+
+	platform_set_drvdata(pdev, a10r);
+
+	return devm_reset_controller_register(&pdev->dev, &a10r->rcdev);
+}
+
+static const struct of_device_id a10sr_reset_of_match[] = {
+	{ .compatible = "altr,a10sr-reset" },
+	{ },
+};
+MODULE_DEVICE_TABLE(of, a10sr_reset_of_match);
+
+static struct platform_driver a10sr_reset_driver = {
+	.probe	= a10sr_reset_probe,
+	.driver = {
+		.name		= "altr_a10sr_reset",
+	},
+};
+module_platform_driver(a10sr_reset_driver);
+
+MODULE_AUTHOR("Thor Thayer <thor.thayer@linux.intel.com>");
+MODULE_DESCRIPTION("Altera Arria10 System Resource Reset Controller Driver");
+MODULE_LICENSE("GPL v2");
-- 
1.9.1

[PATCHv2 4/5] mfd: altr_a10sr: Add Arria10 DevKit Reset Controller

[thor.thayer]

From: Thor Thayer <thor.thayer@linux.intel.com>

Add Peripheral PHY Reset Controller to the Arria10
Development Kit System Resource Chip's MFD.

Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
---
v2  Changes to commit header & body for clarification.
---
 drivers/mfd/altera-a10sr.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/mfd/altera-a10sr.c b/drivers/mfd/altera-a10sr.c
index 06e1f7f..96e7d2c 100644
--- a/drivers/mfd/altera-a10sr.c
+++ b/drivers/mfd/altera-a10sr.c
@@ -33,6 +33,10 @@
 		.name = "altr_a10sr_gpio",
 		.of_compatible = "altr,a10sr-gpio",
 	},
+	{
+		.name = "altr_a10sr_reset",
+		.of_compatible = "altr,a10sr-reset",
+	},
 };
 
 static bool altr_a10sr_reg_readable(struct device *dev, unsigned int reg)
-- 
1.9.1

[PATCHv2 4/5] mfd: altr_a10sr: Add Arria10 DevKit Reset Controller

[thor.thayer at linux.intel.com]

From: Thor Thayer <thor.thayer@linux.intel.com>

Add Peripheral PHY Reset Controller to the Arria10
Development Kit System Resource Chip's MFD.

Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
---
v2  Changes to commit header & body for clarification.
---
 drivers/mfd/altera-a10sr.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/mfd/altera-a10sr.c b/drivers/mfd/altera-a10sr.c
index 06e1f7f..96e7d2c 100644
--- a/drivers/mfd/altera-a10sr.c
+++ b/drivers/mfd/altera-a10sr.c
@@ -33,6 +33,10 @@
 		.name = "altr_a10sr_gpio",
 		.of_compatible = "altr,a10sr-gpio",
 	},
+	{
+		.name = "altr_a10sr_reset",
+		.of_compatible = "altr,a10sr-reset",
+	},
 };
 
 static bool altr_a10sr_reg_readable(struct device *dev, unsigned int reg)
-- 
1.9.1

[PATCHv2 5/5] ARM: dts: socfpga: Add Devkit A10-SR Reset Controller

[thor.thayer]

From: Thor Thayer <thor.thayer@linux.intel.com>

Add the Altera Arria10 System Resource Reset Controller to the MFD

Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
---
v2  change commit header to ARM: dts: socfpga.
---
 arch/arm/boot/dts/socfpga_arria10_socdk.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
index c57e6ce..9329025 100644
--- a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
@@ -121,6 +121,11 @@
 			gpio-controller;
 			#gpio-cells = <2>;
 		};
+
+		a10sr_rst: reset-controller {
+			compatible = "altr,a10sr-reset";
+			#reset-cells = <1>;
+		};
 	};
 };
 
-- 
1.9.1

[PATCHv2 5/5] ARM: dts: socfpga: Add Devkit A10-SR Reset Controller

[thor.thayer-VuQAYsv1563Yd54FQh9/CA]

From: Thor Thayer <thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>

Add the Altera Arria10 System Resource Reset Controller to the MFD

Signed-off-by: Thor Thayer <thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
Acked-by: Dinh Nguyen <dinguyen-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
---
v2  change commit header to ARM: dts: socfpga.
---
 arch/arm/boot/dts/socfpga_arria10_socdk.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
index c57e6ce..9329025 100644
--- a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
@@ -121,6 +121,11 @@
 			gpio-controller;
 			#gpio-cells = <2>;
 		};
+
+		a10sr_rst: reset-controller {
+			compatible = "altr,a10sr-reset";
+			#reset-cells = <1>;
+		};
 	};
 };
 
-- 
1.9.1

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[PATCHv2 5/5] ARM: dts: socfpga: Add Devkit A10-SR Reset Controller

[thor.thayer at linux.intel.com]

From: Thor Thayer <thor.thayer@linux.intel.com>

Add the Altera Arria10 System Resource Reset Controller to the MFD

Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
---
v2  change commit header to ARM: dts: socfpga.
---
 arch/arm/boot/dts/socfpga_arria10_socdk.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
index c57e6ce..9329025 100644
--- a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
@@ -121,6 +121,11 @@
 			gpio-controller;
 			#gpio-cells = <2>;
 		};
+
+		a10sr_rst: reset-controller {
+			compatible = "altr,a10sr-reset";
+			#reset-cells = <1>;
+		};
 	};
 };
 
-- 
1.9.1

Re: [PATCHv2 1/5] dt-bindings: mfd: Add Altera Arria10 SR Reset Controller bindings

[Rob Herring]

On Wed, Feb 22, 2017 at 11:10:15AM -0600, thor.thayer@linux.intel.com wrote:
> From: Thor Thayer <thor.thayer@linux.intel.com>
> 
> This patch adds documentation for the Altera A10-SR Reset
> Controller DT bindings.
> 
> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
> ---
> v2  No change
> ---
>  Documentation/devicetree/bindings/mfd/altera-a10sr.txt | 11 +++++++++++
>  1 file changed, 11 insertions(+)

Acked-by: Rob Herring <robh@kernel.org>

Re: [PATCHv2 1/5] dt-bindings: mfd: Add Altera Arria10 SR Reset Controller bindings

[Rob Herring]

On Wed, Feb 22, 2017 at 11:10:15AM -0600, thor.thayer@linux.intel.com wrote:
> From: Thor Thayer <thor.thayer@linux.intel.com>
> 
> This patch adds documentation for the Altera A10-SR Reset
> Controller DT bindings.
> 
> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
> ---
> v2  No change
> ---
>  Documentation/devicetree/bindings/mfd/altera-a10sr.txt | 11 +++++++++++
>  1 file changed, 11 insertions(+)

Acked-by: Rob Herring <robh@kernel.org>

[PATCHv2 1/5] dt-bindings: mfd: Add Altera Arria10 SR Reset Controller bindings

[Rob Herring]

On Wed, Feb 22, 2017 at 11:10:15AM -0600, thor.thayer at linux.intel.com wrote:
> From: Thor Thayer <thor.thayer@linux.intel.com>
> 
> This patch adds documentation for the Altera A10-SR Reset
> Controller DT bindings.
> 
> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
> ---
> v2  No change
> ---
>  Documentation/devicetree/bindings/mfd/altera-a10sr.txt | 11 +++++++++++
>  1 file changed, 11 insertions(+)

Acked-by: Rob Herring <robh@kernel.org>

Re: [PATCHv2 4/5] mfd: altr_a10sr: Add Arria10 DevKit Reset Controller

[Philipp Zabel]

On Wed, 2017-02-22 at 11:10 -0600, thor.thayer@linux.intel.com wrote:
> From: Thor Thayer <thor.thayer@linux.intel.com>
> 
> Add Peripheral PHY Reset Controller to the Arria10
> Development Kit System Resource Chip's MFD.
> 
> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
> ---
> v2  Changes to commit header & body for clarification.
> ---
>  drivers/mfd/altera-a10sr.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/mfd/altera-a10sr.c b/drivers/mfd/altera-a10sr.c
> index 06e1f7f..96e7d2c 100644
> --- a/drivers/mfd/altera-a10sr.c
> +++ b/drivers/mfd/altera-a10sr.c
> @@ -33,6 +33,10 @@
>  		.name = "altr_a10sr_gpio",
>  		.of_compatible = "altr,a10sr-gpio",
>  	},
> +	{
> +		.name = "altr_a10sr_reset",
> +		.of_compatible = "altr,a10sr-reset",
> +	},
>  };
>  
>  static bool altr_a10sr_reg_readable(struct device *dev, unsigned int reg)

Lee, should this be merged through the reset tree? Otherwise I'll just
pick up patches 1-3.

regards
Philipp

Re: [PATCHv2 4/5] mfd: altr_a10sr: Add Arria10 DevKit Reset Controller

[Philipp Zabel]

On Wed, 2017-02-22 at 11:10 -0600, thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org wrote:
> From: Thor Thayer <thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
> 
> Add Peripheral PHY Reset Controller to the Arria10
> Development Kit System Resource Chip's MFD.
> 
> Signed-off-by: Thor Thayer <thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
> ---
> v2  Changes to commit header & body for clarification.
> ---
>  drivers/mfd/altera-a10sr.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/mfd/altera-a10sr.c b/drivers/mfd/altera-a10sr.c
> index 06e1f7f..96e7d2c 100644
> --- a/drivers/mfd/altera-a10sr.c
> +++ b/drivers/mfd/altera-a10sr.c
> @@ -33,6 +33,10 @@
>  		.name = "altr_a10sr_gpio",
>  		.of_compatible = "altr,a10sr-gpio",
>  	},
> +	{
> +		.name = "altr_a10sr_reset",
> +		.of_compatible = "altr,a10sr-reset",
> +	},
>  };
>  
>  static bool altr_a10sr_reg_readable(struct device *dev, unsigned int reg)

Lee, should this be merged through the reset tree? Otherwise I'll just
pick up patches 1-3.

regards
Philipp

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[PATCHv2 4/5] mfd: altr_a10sr: Add Arria10 DevKit Reset Controller

[Philipp Zabel]

On Wed, 2017-02-22 at 11:10 -0600, thor.thayer at linux.intel.com wrote:
> From: Thor Thayer <thor.thayer@linux.intel.com>
> 
> Add Peripheral PHY Reset Controller to the Arria10
> Development Kit System Resource Chip's MFD.
> 
> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
> ---
> v2  Changes to commit header & body for clarification.
> ---
>  drivers/mfd/altera-a10sr.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/mfd/altera-a10sr.c b/drivers/mfd/altera-a10sr.c
> index 06e1f7f..96e7d2c 100644
> --- a/drivers/mfd/altera-a10sr.c
> +++ b/drivers/mfd/altera-a10sr.c
> @@ -33,6 +33,10 @@
>  		.name = "altr_a10sr_gpio",
>  		.of_compatible = "altr,a10sr-gpio",
>  	},
> +	{
> +		.name = "altr_a10sr_reset",
> +		.of_compatible = "altr,a10sr-reset",
> +	},
>  };
>  
>  static bool altr_a10sr_reg_readable(struct device *dev, unsigned int reg)

Lee, should this be merged through the reset tree? Otherwise I'll just
pick up patches 1-3.

regards
Philipp

Re: [PATCHv2 4/5] mfd: altr_a10sr: Add Arria10 DevKit Reset Controller

[Thor Thayer]

Hi Lee,

On 02/28/2017 08:42 AM, Philipp Zabel wrote:
> On Wed, 2017-02-22 at 11:10 -0600, thor.thayer@linux.intel.com wrote:
>> From: Thor Thayer <thor.thayer@linux.intel.com>
>>
>> Add Peripheral PHY Reset Controller to the Arria10
>> Development Kit System Resource Chip's MFD.
>>
>> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
>> ---
>> v2  Changes to commit header & body for clarification.
>> ---
>>  drivers/mfd/altera-a10sr.c | 4 ++++
>>  1 file changed, 4 insertions(+)
>>
>> diff --git a/drivers/mfd/altera-a10sr.c b/drivers/mfd/altera-a10sr.c
>> index 06e1f7f..96e7d2c 100644
>> --- a/drivers/mfd/altera-a10sr.c
>> +++ b/drivers/mfd/altera-a10sr.c
>> @@ -33,6 +33,10 @@
>>  		.name = "altr_a10sr_gpio",
>>  		.of_compatible = "altr,a10sr-gpio",
>>  	},
>> +	{
>> +		.name = "altr_a10sr_reset",
>> +		.of_compatible = "altr,a10sr-reset",
>> +	},
>>  };
>>
>>  static bool altr_a10sr_reg_readable(struct device *dev, unsigned int reg)
>
> Lee, should this be merged through the reset tree? Otherwise I'll just
> pick up patches 1-3.
>
> regards
> Philipp
>

Any comments on this patch and the patch series?

Thanks,

Thor

Re: [PATCHv2 4/5] mfd: altr_a10sr: Add Arria10 DevKit Reset Controller

[Thor Thayer]

Hi Lee,

On 02/28/2017 08:42 AM, Philipp Zabel wrote:
> On Wed, 2017-02-22 at 11:10 -0600, thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org wrote:
>> From: Thor Thayer <thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
>>
>> Add Peripheral PHY Reset Controller to the Arria10
>> Development Kit System Resource Chip's MFD.
>>
>> Signed-off-by: Thor Thayer <thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
>> ---
>> v2  Changes to commit header & body for clarification.
>> ---
>>  drivers/mfd/altera-a10sr.c | 4 ++++
>>  1 file changed, 4 insertions(+)
>>
>> diff --git a/drivers/mfd/altera-a10sr.c b/drivers/mfd/altera-a10sr.c
>> index 06e1f7f..96e7d2c 100644
>> --- a/drivers/mfd/altera-a10sr.c
>> +++ b/drivers/mfd/altera-a10sr.c
>> @@ -33,6 +33,10 @@
>>  		.name = "altr_a10sr_gpio",
>>  		.of_compatible = "altr,a10sr-gpio",
>>  	},
>> +	{
>> +		.name = "altr_a10sr_reset",
>> +		.of_compatible = "altr,a10sr-reset",
>> +	},
>>  };
>>
>>  static bool altr_a10sr_reg_readable(struct device *dev, unsigned int reg)
>
> Lee, should this be merged through the reset tree? Otherwise I'll just
> pick up patches 1-3.
>
> regards
> Philipp
>

Any comments on this patch and the patch series?

Thanks,

Thor

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[PATCHv2 4/5] mfd: altr_a10sr: Add Arria10 DevKit Reset Controller

[Thor Thayer]

Hi Lee,

On 02/28/2017 08:42 AM, Philipp Zabel wrote:
> On Wed, 2017-02-22 at 11:10 -0600, thor.thayer at linux.intel.com wrote:
>> From: Thor Thayer <thor.thayer@linux.intel.com>
>>
>> Add Peripheral PHY Reset Controller to the Arria10
>> Development Kit System Resource Chip's MFD.
>>
>> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
>> ---
>> v2  Changes to commit header & body for clarification.
>> ---
>>  drivers/mfd/altera-a10sr.c | 4 ++++
>>  1 file changed, 4 insertions(+)
>>
>> diff --git a/drivers/mfd/altera-a10sr.c b/drivers/mfd/altera-a10sr.c
>> index 06e1f7f..96e7d2c 100644
>> --- a/drivers/mfd/altera-a10sr.c
>> +++ b/drivers/mfd/altera-a10sr.c
>> @@ -33,6 +33,10 @@
>>  		.name = "altr_a10sr_gpio",
>>  		.of_compatible = "altr,a10sr-gpio",
>>  	},
>> +	{
>> +		.name = "altr_a10sr_reset",
>> +		.of_compatible = "altr,a10sr-reset",
>> +	},
>>  };
>>
>>  static bool altr_a10sr_reg_readable(struct device *dev, unsigned int reg)
>
> Lee, should this be merged through the reset tree? Otherwise I'll just
> pick up patches 1-3.
>
> regards
> Philipp
>

Any comments on this patch and the patch series?

Thanks,

Thor

Re: [PATCHv2 4/5] mfd: altr_a10sr: Add Arria10 DevKit Reset Controller

[Philipp Zabel]

On Thu, 2017-03-09 at 10:03 -0600, Thor Thayer wrote:
> Hi Lee,
> 
> On 02/28/2017 08:42 AM, Philipp Zabel wrote:
> > On Wed, 2017-02-22 at 11:10 -0600, thor.thayer@linux.intel.com wrote:
> >> From: Thor Thayer <thor.thayer@linux.intel.com>
> >>
> >> Add Peripheral PHY Reset Controller to the Arria10
> >> Development Kit System Resource Chip's MFD.
> >>
> >> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
> >> ---
> >> v2  Changes to commit header & body for clarification.
> >> ---
> >>  drivers/mfd/altera-a10sr.c | 4 ++++
> >>  1 file changed, 4 insertions(+)
> >>
> >> diff --git a/drivers/mfd/altera-a10sr.c b/drivers/mfd/altera-a10sr.c
> >> index 06e1f7f..96e7d2c 100644
> >> --- a/drivers/mfd/altera-a10sr.c
> >> +++ b/drivers/mfd/altera-a10sr.c
> >> @@ -33,6 +33,10 @@
> >>  		.name = "altr_a10sr_gpio",
> >>  		.of_compatible = "altr,a10sr-gpio",
> >>  	},
> >> +	{
> >> +		.name = "altr_a10sr_reset",
> >> +		.of_compatible = "altr,a10sr-reset",
> >> +	},
> >>  };
> >>
> >>  static bool altr_a10sr_reg_readable(struct device *dev, unsigned int reg)
> >
> > Lee, should this be merged through the reset tree? Otherwise I'll just
> > pick up patches 1-3.

I have picked up patches 1-3, but I only just noticed that patch 1 also
would require Lee's ack for me to submit this.

regards
Philipp

[PATCHv2 4/5] mfd: altr_a10sr: Add Arria10 DevKit Reset Controller

[Philipp Zabel]

On Thu, 2017-03-09 at 10:03 -0600, Thor Thayer wrote:
> Hi Lee,
> 
> On 02/28/2017 08:42 AM, Philipp Zabel wrote:
> > On Wed, 2017-02-22 at 11:10 -0600, thor.thayer at linux.intel.com wrote:
> >> From: Thor Thayer <thor.thayer@linux.intel.com>
> >>
> >> Add Peripheral PHY Reset Controller to the Arria10
> >> Development Kit System Resource Chip's MFD.
> >>
> >> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
> >> ---
> >> v2  Changes to commit header & body for clarification.
> >> ---
> >>  drivers/mfd/altera-a10sr.c | 4 ++++
> >>  1 file changed, 4 insertions(+)
> >>
> >> diff --git a/drivers/mfd/altera-a10sr.c b/drivers/mfd/altera-a10sr.c
> >> index 06e1f7f..96e7d2c 100644
> >> --- a/drivers/mfd/altera-a10sr.c
> >> +++ b/drivers/mfd/altera-a10sr.c
> >> @@ -33,6 +33,10 @@
> >>  		.name = "altr_a10sr_gpio",
> >>  		.of_compatible = "altr,a10sr-gpio",
> >>  	},
> >> +	{
> >> +		.name = "altr_a10sr_reset",
> >> +		.of_compatible = "altr,a10sr-reset",
> >> +	},
> >>  };
> >>
> >>  static bool altr_a10sr_reg_readable(struct device *dev, unsigned int reg)
> >
> > Lee, should this be merged through the reset tree? Otherwise I'll just
> > pick up patches 1-3.

I have picked up patches 1-3, but I only just noticed that patch 1 also
would require Lee's ack for me to submit this.

regards
Philipp

Re: [PATCHv2 4/5] mfd: altr_a10sr: Add Arria10 DevKit Reset Controller

[Thor Thayer]

On 03/13/2017 09:42 AM, Philipp Zabel wrote:
> On Thu, 2017-03-09 at 10:03 -0600, Thor Thayer wrote:
>> Hi Lee,
>>
>> On 02/28/2017 08:42 AM, Philipp Zabel wrote:
>>> On Wed, 2017-02-22 at 11:10 -0600, thor.thayer@linux.intel.com wrote:
>>>> From: Thor Thayer <thor.thayer@linux.intel.com>
>>>>
>>>> Add Peripheral PHY Reset Controller to the Arria10
>>>> Development Kit System Resource Chip's MFD.
>>>>
>>>> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
>>>> ---
>>>> v2  Changes to commit header & body for clarification.
>>>> ---
>>>>  drivers/mfd/altera-a10sr.c | 4 ++++
>>>>  1 file changed, 4 insertions(+)
>>>>
>>>> diff --git a/drivers/mfd/altera-a10sr.c b/drivers/mfd/altera-a10sr.c
>>>> index 06e1f7f..96e7d2c 100644
>>>> --- a/drivers/mfd/altera-a10sr.c
>>>> +++ b/drivers/mfd/altera-a10sr.c
>>>> @@ -33,6 +33,10 @@
>>>>  		.name = "altr_a10sr_gpio",
>>>>  		.of_compatible = "altr,a10sr-gpio",
>>>>  	},
>>>> +	{
>>>> +		.name = "altr_a10sr_reset",
>>>> +		.of_compatible = "altr,a10sr-reset",
>>>> +	},
>>>>  };
>>>>
>>>>  static bool altr_a10sr_reg_readable(struct device *dev, unsigned int reg)
>>>
>>> Lee, should this be merged through the reset tree? Otherwise I'll just
>>> pick up patches 1-3.
>
> I have picked up patches 1-3, but I only just noticed that patch 1 also
> would require Lee's ack for me to submit this.
>
> regards
> Philipp
>
OK. Thanks Philipp.

FWIW, Patch 1 was acked by Rob Herring on 2/27/2017 although I 
understand that Lee may want a say in this as well.

Thanks again for reviewing and picking up those patches!

Thor

Re: [PATCHv2 4/5] mfd: altr_a10sr: Add Arria10 DevKit Reset Controller

[Thor Thayer]

On 03/13/2017 09:42 AM, Philipp Zabel wrote:
> On Thu, 2017-03-09 at 10:03 -0600, Thor Thayer wrote:
>> Hi Lee,
>>
>> On 02/28/2017 08:42 AM, Philipp Zabel wrote:
>>> On Wed, 2017-02-22 at 11:10 -0600, thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org wrote:
>>>> From: Thor Thayer <thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
>>>>
>>>> Add Peripheral PHY Reset Controller to the Arria10
>>>> Development Kit System Resource Chip's MFD.
>>>>
>>>> Signed-off-by: Thor Thayer <thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
>>>> ---
>>>> v2  Changes to commit header & body for clarification.
>>>> ---
>>>>  drivers/mfd/altera-a10sr.c | 4 ++++
>>>>  1 file changed, 4 insertions(+)
>>>>
>>>> diff --git a/drivers/mfd/altera-a10sr.c b/drivers/mfd/altera-a10sr.c
>>>> index 06e1f7f..96e7d2c 100644
>>>> --- a/drivers/mfd/altera-a10sr.c
>>>> +++ b/drivers/mfd/altera-a10sr.c
>>>> @@ -33,6 +33,10 @@
>>>>  		.name = "altr_a10sr_gpio",
>>>>  		.of_compatible = "altr,a10sr-gpio",
>>>>  	},
>>>> +	{
>>>> +		.name = "altr_a10sr_reset",
>>>> +		.of_compatible = "altr,a10sr-reset",
>>>> +	},
>>>>  };
>>>>
>>>>  static bool altr_a10sr_reg_readable(struct device *dev, unsigned int reg)
>>>
>>> Lee, should this be merged through the reset tree? Otherwise I'll just
>>> pick up patches 1-3.
>
> I have picked up patches 1-3, but I only just noticed that patch 1 also
> would require Lee's ack for me to submit this.
>
> regards
> Philipp
>
OK. Thanks Philipp.

FWIW, Patch 1 was acked by Rob Herring on 2/27/2017 although I 
understand that Lee may want a say in this as well.

Thanks again for reviewing and picking up those patches!

Thor
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[PATCHv2 4/5] mfd: altr_a10sr: Add Arria10 DevKit Reset Controller

[Thor Thayer]

On 03/13/2017 09:42 AM, Philipp Zabel wrote:
> On Thu, 2017-03-09 at 10:03 -0600, Thor Thayer wrote:
>> Hi Lee,
>>
>> On 02/28/2017 08:42 AM, Philipp Zabel wrote:
>>> On Wed, 2017-02-22 at 11:10 -0600, thor.thayer at linux.intel.com wrote:
>>>> From: Thor Thayer <thor.thayer@linux.intel.com>
>>>>
>>>> Add Peripheral PHY Reset Controller to the Arria10
>>>> Development Kit System Resource Chip's MFD.
>>>>
>>>> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
>>>> ---
>>>> v2  Changes to commit header & body for clarification.
>>>> ---
>>>>  drivers/mfd/altera-a10sr.c | 4 ++++
>>>>  1 file changed, 4 insertions(+)
>>>>
>>>> diff --git a/drivers/mfd/altera-a10sr.c b/drivers/mfd/altera-a10sr.c
>>>> index 06e1f7f..96e7d2c 100644
>>>> --- a/drivers/mfd/altera-a10sr.c
>>>> +++ b/drivers/mfd/altera-a10sr.c
>>>> @@ -33,6 +33,10 @@
>>>>  		.name = "altr_a10sr_gpio",
>>>>  		.of_compatible = "altr,a10sr-gpio",
>>>>  	},
>>>> +	{
>>>> +		.name = "altr_a10sr_reset",
>>>> +		.of_compatible = "altr,a10sr-reset",
>>>> +	},
>>>>  };
>>>>
>>>>  static bool altr_a10sr_reg_readable(struct device *dev, unsigned int reg)
>>>
>>> Lee, should this be merged through the reset tree? Otherwise I'll just
>>> pick up patches 1-3.
>
> I have picked up patches 1-3, but I only just noticed that patch 1 also
> would require Lee's ack for me to submit this.
>
> regards
> Philipp
>
OK. Thanks Philipp.

FWIW, Patch 1 was acked by Rob Herring on 2/27/2017 although I 
understand that Lee may want a say in this as well.

Thanks again for reviewing and picking up those patches!

Thor

Re: [PATCHv2 4/5] mfd: altr_a10sr: Add Arria10 DevKit Reset Controller

[Lee Jones]

On Wed, 22 Feb 2017, thor.thayer@linux.intel.com wrote:

> From: Thor Thayer <thor.thayer@linux.intel.com>
> 
> Add Peripheral PHY Reset Controller to the Arria10
> Development Kit System Resource Chip's MFD.
> 
> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
> ---
> v2  Changes to commit header & body for clarification.
> ---
>  drivers/mfd/altera-a10sr.c | 4 ++++
>  1 file changed, 4 insertions(+)

Sorry for the delay, I've been AFK on vacation and conferences.

Applied, thanks.

> diff --git a/drivers/mfd/altera-a10sr.c b/drivers/mfd/altera-a10sr.c
> index 06e1f7f..96e7d2c 100644
> --- a/drivers/mfd/altera-a10sr.c
> +++ b/drivers/mfd/altera-a10sr.c
> @@ -33,6 +33,10 @@
>  		.name = "altr_a10sr_gpio",
>  		.of_compatible = "altr,a10sr-gpio",
>  	},
> +	{
> +		.name = "altr_a10sr_reset",
> +		.of_compatible = "altr,a10sr-reset",
> +	},
>  };
>  
>  static bool altr_a10sr_reg_readable(struct device *dev, unsigned int reg)

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

Re: [PATCHv2 4/5] mfd: altr_a10sr: Add Arria10 DevKit Reset Controller

[Lee Jones]

On Wed, 22 Feb 2017, thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org wrote:

> From: Thor Thayer <thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
> 
> Add Peripheral PHY Reset Controller to the Arria10
> Development Kit System Resource Chip's MFD.
> 
> Signed-off-by: Thor Thayer <thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
> ---
> v2  Changes to commit header & body for clarification.
> ---
>  drivers/mfd/altera-a10sr.c | 4 ++++
>  1 file changed, 4 insertions(+)

Sorry for the delay, I've been AFK on vacation and conferences.

Applied, thanks.

> diff --git a/drivers/mfd/altera-a10sr.c b/drivers/mfd/altera-a10sr.c
> index 06e1f7f..96e7d2c 100644
> --- a/drivers/mfd/altera-a10sr.c
> +++ b/drivers/mfd/altera-a10sr.c
> @@ -33,6 +33,10 @@
>  		.name = "altr_a10sr_gpio",
>  		.of_compatible = "altr,a10sr-gpio",
>  	},
> +	{
> +		.name = "altr_a10sr_reset",
> +		.of_compatible = "altr,a10sr-reset",
> +	},
>  };
>  
>  static bool altr_a10sr_reg_readable(struct device *dev, unsigned int reg)

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
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[PATCHv2 4/5] mfd: altr_a10sr: Add Arria10 DevKit Reset Controller

[Lee Jones]

On Wed, 22 Feb 2017, thor.thayer at linux.intel.com wrote:

> From: Thor Thayer <thor.thayer@linux.intel.com>
> 
> Add Peripheral PHY Reset Controller to the Arria10
> Development Kit System Resource Chip's MFD.
> 
> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
> ---
> v2  Changes to commit header & body for clarification.
> ---
>  drivers/mfd/altera-a10sr.c | 4 ++++
>  1 file changed, 4 insertions(+)

Sorry for the delay, I've been AFK on vacation and conferences.

Applied, thanks.

> diff --git a/drivers/mfd/altera-a10sr.c b/drivers/mfd/altera-a10sr.c
> index 06e1f7f..96e7d2c 100644
> --- a/drivers/mfd/altera-a10sr.c
> +++ b/drivers/mfd/altera-a10sr.c
> @@ -33,6 +33,10 @@
>  		.name = "altr_a10sr_gpio",
>  		.of_compatible = "altr,a10sr-gpio",
>  	},
> +	{
> +		.name = "altr_a10sr_reset",
> +		.of_compatible = "altr,a10sr-reset",
> +	},
>  };
>  
>  static bool altr_a10sr_reg_readable(struct device *dev, unsigned int reg)

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

Re: [PATCHv2 1/5] dt-bindings: mfd: Add Altera Arria10 SR Reset Controller bindings

[Lee Jones]

On Wed, 22 Feb 2017, thor.thayer@linux.intel.com wrote:

> From: Thor Thayer <thor.thayer@linux.intel.com>
> 
> This patch adds documentation for the Altera A10-SR Reset
> Controller DT bindings.
> 
> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
> ---
> v2  No change
> ---
>  Documentation/devicetree/bindings/mfd/altera-a10sr.txt | 11 +++++++++++
>  1 file changed, 11 insertions(+)

Applied with Rob's Ack.

> diff --git a/Documentation/devicetree/bindings/mfd/altera-a10sr.txt b/Documentation/devicetree/bindings/mfd/altera-a10sr.txt
> index ea151f2..c8a7365 100644
> --- a/Documentation/devicetree/bindings/mfd/altera-a10sr.txt
> +++ b/Documentation/devicetree/bindings/mfd/altera-a10sr.txt
> @@ -18,6 +18,7 @@ The A10SR consists of these sub-devices:
>  Device                   Description
>  ------                   ----------
>  a10sr_gpio               GPIO Controller
> +a10sr_rst                Reset Controller
>  
>  Arria10 GPIO
>  Required Properties:
> @@ -27,6 +28,11 @@ Required Properties:
>                        the second cell is used to specify flags.
>                        See ../gpio/gpio.txt for more information.
>  
> +Arria10 Peripheral PHY Reset
> +Required Properties:
> +- compatible        : Should be "altr,a10sr-reset"
> +- #reset-cells      : Should be one.
> +
>  Example:
>  
>          resource-manager@0 {
> @@ -43,4 +49,9 @@ Example:
>  			gpio-controller;
>  			#gpio-cells = <2>;
>  		};
> +
> +		a10sr_rst: reset-controller {
> +			compatible = "altr,a10sr-reset";
> +			#reset-cells = <1>;
> +		};
>  	};

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

Re: [PATCHv2 1/5] dt-bindings: mfd: Add Altera Arria10 SR Reset Controller bindings

[Lee Jones]

On Wed, 22 Feb 2017, thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org wrote:

> From: Thor Thayer <thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
> 
> This patch adds documentation for the Altera A10-SR Reset
> Controller DT bindings.
> 
> Signed-off-by: Thor Thayer <thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
> ---
> v2  No change
> ---
>  Documentation/devicetree/bindings/mfd/altera-a10sr.txt | 11 +++++++++++
>  1 file changed, 11 insertions(+)

Applied with Rob's Ack.

> diff --git a/Documentation/devicetree/bindings/mfd/altera-a10sr.txt b/Documentation/devicetree/bindings/mfd/altera-a10sr.txt
> index ea151f2..c8a7365 100644
> --- a/Documentation/devicetree/bindings/mfd/altera-a10sr.txt
> +++ b/Documentation/devicetree/bindings/mfd/altera-a10sr.txt
> @@ -18,6 +18,7 @@ The A10SR consists of these sub-devices:
>  Device                   Description
>  ------                   ----------
>  a10sr_gpio               GPIO Controller
> +a10sr_rst                Reset Controller
>  
>  Arria10 GPIO
>  Required Properties:
> @@ -27,6 +28,11 @@ Required Properties:
>                        the second cell is used to specify flags.
>                        See ../gpio/gpio.txt for more information.
>  
> +Arria10 Peripheral PHY Reset
> +Required Properties:
> +- compatible        : Should be "altr,a10sr-reset"
> +- #reset-cells      : Should be one.
> +
>  Example:
>  
>          resource-manager@0 {
> @@ -43,4 +49,9 @@ Example:
>  			gpio-controller;
>  			#gpio-cells = <2>;
>  		};
> +
> +		a10sr_rst: reset-controller {
> +			compatible = "altr,a10sr-reset";
> +			#reset-cells = <1>;
> +		};
>  	};

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
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[PATCHv2 1/5] dt-bindings: mfd: Add Altera Arria10 SR Reset Controller bindings

[Lee Jones]

On Wed, 22 Feb 2017, thor.thayer at linux.intel.com wrote:

> From: Thor Thayer <thor.thayer@linux.intel.com>
> 
> This patch adds documentation for the Altera A10-SR Reset
> Controller DT bindings.
> 
> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
> ---
> v2  No change
> ---
>  Documentation/devicetree/bindings/mfd/altera-a10sr.txt | 11 +++++++++++
>  1 file changed, 11 insertions(+)

Applied with Rob's Ack.

> diff --git a/Documentation/devicetree/bindings/mfd/altera-a10sr.txt b/Documentation/devicetree/bindings/mfd/altera-a10sr.txt
> index ea151f2..c8a7365 100644
> --- a/Documentation/devicetree/bindings/mfd/altera-a10sr.txt
> +++ b/Documentation/devicetree/bindings/mfd/altera-a10sr.txt
> @@ -18,6 +18,7 @@ The A10SR consists of these sub-devices:
>  Device                   Description
>  ------                   ----------
>  a10sr_gpio               GPIO Controller
> +a10sr_rst                Reset Controller
>  
>  Arria10 GPIO
>  Required Properties:
> @@ -27,6 +28,11 @@ Required Properties:
>                        the second cell is used to specify flags.
>                        See ../gpio/gpio.txt for more information.
>  
> +Arria10 Peripheral PHY Reset
> +Required Properties:
> +- compatible        : Should be "altr,a10sr-reset"
> +- #reset-cells      : Should be one.
> +
>  Example:
>  
>          resource-manager at 0 {
> @@ -43,4 +49,9 @@ Example:
>  			gpio-controller;
>  			#gpio-cells = <2>;
>  		};
> +
> +		a10sr_rst: reset-controller {
> +			compatible = "altr,a10sr-reset";
> +			#reset-cells = <1>;
> +		};
>  	};

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

Re: [PATCHv2 1/5] dt-bindings: mfd: Add Altera Arria10 SR Reset Controller bindings

[Philipp Zabel]

On Wed, 2017-03-15 at 11:06 +0000, Lee Jones wrote:
> On Wed, 22 Feb 2017, thor.thayer@linux.intel.com wrote:
> 
> > From: Thor Thayer <thor.thayer@linux.intel.com>
> > 
> > This patch adds documentation for the Altera A10-SR Reset
> > Controller DT bindings.
> > 
> > Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
> > ---
> > v2  No change
> > ---
> >  Documentation/devicetree/bindings/mfd/altera-a10sr.txt | 11 +++++++++++
> >  1 file changed, 11 insertions(+)
> 
>Applied with Rob's Ack.

Thanks, I've picked up patches 2 and 3.

regards
Philipp

[PATCHv2 1/5] dt-bindings: mfd: Add Altera Arria10 SR Reset Controller bindings

[Philipp Zabel]

On Wed, 2017-03-15 at 11:06 +0000, Lee Jones wrote:
> On Wed, 22 Feb 2017, thor.thayer at linux.intel.com wrote:
> 
> > From: Thor Thayer <thor.thayer@linux.intel.com>
> > 
> > This patch adds documentation for the Altera A10-SR Reset
> > Controller DT bindings.
> > 
> > Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
> > ---
> > v2  No change
> > ---
> >  Documentation/devicetree/bindings/mfd/altera-a10sr.txt | 11 +++++++++++
> >  1 file changed, 11 insertions(+)
> 
>Applied with Rob's Ack.

Thanks, I've picked up patches 2 and 3.

regards
Philipp

Re: [PATCHv2 5/5] ARM: dts: socfpga: Add Devkit A10-SR Reset Controller

[Dinh Nguyen]

On 02/22/2017 11:10 AM, thor.thayer@linux.intel.com wrote:
> From: Thor Thayer <thor.thayer@linux.intel.com>
> 
> Add the Altera Arria10 System Resource Reset Controller to the MFD
> 
> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
> Acked-by: Dinh Nguyen <dinguyen@kernel.org>
> ---
> v2  change commit header to ARM: dts: socfpga.
> ---

Applied.

Thanks,
Dinh

[PATCHv2 5/5] ARM: dts: socfpga: Add Devkit A10-SR Reset Controller

[Dinh Nguyen]

On 02/22/2017 11:10 AM, thor.thayer at linux.intel.com wrote:
> From: Thor Thayer <thor.thayer@linux.intel.com>
> 
> Add the Altera Arria10 System Resource Reset Controller to the MFD
> 
> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
> Acked-by: Dinh Nguyen <dinguyen@kernel.org>
> ---
> v2  change commit header to ARM: dts: socfpga.
> ---

Applied.

Thanks,
Dinh