From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751463AbdAPKcn (ORCPT ); Mon, 16 Jan 2017 05:32:43 -0500 Received: from foss.arm.com ([217.140.101.70]:49162 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750880AbdAPKck (ORCPT ); Mon, 16 Jan 2017 05:32:40 -0500 Subject: Re: [PATCH v2 1/2] of: base: add support to find the level of the last cache To: Rob Herring References: <1484245772-31511-1-git-send-email-sudeep.holla@arm.com> Cc: Sudeep Holla , "linux-arm-kernel@lists.infradead.org" , Catalin Marinas , Will Deacon , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Tan Xiaojun , Mark Rutland From: Sudeep Holla Organization: ARM Message-ID: <36db95aa-4d96-bc45-9d38-28af7b17b42e@arm.com> Date: Mon, 16 Jan 2017 10:32:36 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.5.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 14/01/17 02:45, Rob Herring wrote: > On Thu, Jan 12, 2017 at 12:29 PM, Sudeep Holla wrote: >> It is useful to have helper function just to get the number of cache >> levels for a given logical cpu. We can obtain the same by just checking >> the level at which the last cache is present. This patch adds support >> to find the level of the last cache for a given cpu. >> >> It will be used on ARM64 platform where the device tree provides the >> information for the additional non-architected/transparent/external >> last level caches that are not integrated with the processors. >> >> Suggested-by: Rob Herring >> Cc: Rob Herring >> Cc: Mark Rutland >> Signed-off-by: Sudeep Holla >> --- >> drivers/of/base.c | 27 +++++++++++++++++++++++++++ >> include/linux/of.h | 1 + >> 2 files changed, 28 insertions(+) >> >> v1->v2: >> - Moved to using "cache-level" in the last level cache instead >> of counting through all the nodes as suggested by Rob >> >> diff --git a/drivers/of/base.c b/drivers/of/base.c >> index d4bea3c797d6..c1128a077aea 100644 >> --- a/drivers/of/base.c >> +++ b/drivers/of/base.c >> @@ -25,6 +25,7 @@ >> #include >> #include >> #include >> +#include >> #include >> #include >> #include >> @@ -2268,6 +2269,32 @@ struct device_node *of_find_next_cache_node(const struct device_node *np) >> } >> >> /** >> + * of_find_last_cache_level - Find the level at which the last cache is >> + * present for the given logical cpu >> + * >> + * @cpu: cpu number(logical index) for which the last cache level is needed >> + * >> + * Returns the the level at which the last cache is present. It is exactly >> + * same as the total number of cache levels for the given logical cpu. >> + */ >> +int of_find_last_cache_level(unsigned int cpu) >> +{ >> + int cache_level = 0; >> + struct device_node *prev = NULL, *np = of_cpu_device_node_get(cpu); >> + >> + while (np) { >> + prev = np; >> + of_node_put(np); >> + np = of_find_next_cache_node(np); >> + } >> + >> + if (prev) > > Probably don't need this check. Otherwise, > Sure I will drop the check. > Acked-by: Rob Herring > I assume you are fine taking this via arm64 tree. If not, let us know. -- Regards, Sudeep From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sudeep Holla Subject: Re: [PATCH v2 1/2] of: base: add support to find the level of the last cache Date: Mon, 16 Jan 2017 10:32:36 +0000 Message-ID: <36db95aa-4d96-bc45-9d38-28af7b17b42e@arm.com> References: <1484245772-31511-1-git-send-email-sudeep.holla@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Rob Herring Cc: Sudeep Holla , "linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" , Catalin Marinas , Will Deacon , "devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , Tan Xiaojun , Mark Rutland List-Id: devicetree@vger.kernel.org On 14/01/17 02:45, Rob Herring wrote: > On Thu, Jan 12, 2017 at 12:29 PM, Sudeep Holla wrote: >> It is useful to have helper function just to get the number of cache >> levels for a given logical cpu. We can obtain the same by just checking >> the level at which the last cache is present. This patch adds support >> to find the level of the last cache for a given cpu. >> >> It will be used on ARM64 platform where the device tree provides the >> information for the additional non-architected/transparent/external >> last level caches that are not integrated with the processors. >> >> Suggested-by: Rob Herring >> Cc: Rob Herring >> Cc: Mark Rutland >> Signed-off-by: Sudeep Holla >> --- >> drivers/of/base.c | 27 +++++++++++++++++++++++++++ >> include/linux/of.h | 1 + >> 2 files changed, 28 insertions(+) >> >> v1->v2: >> - Moved to using "cache-level" in the last level cache instead >> of counting through all the nodes as suggested by Rob >> >> diff --git a/drivers/of/base.c b/drivers/of/base.c >> index d4bea3c797d6..c1128a077aea 100644 >> --- a/drivers/of/base.c >> +++ b/drivers/of/base.c >> @@ -25,6 +25,7 @@ >> #include >> #include >> #include >> +#include >> #include >> #include >> #include >> @@ -2268,6 +2269,32 @@ struct device_node *of_find_next_cache_node(const struct device_node *np) >> } >> >> /** >> + * of_find_last_cache_level - Find the level at which the last cache is >> + * present for the given logical cpu >> + * >> + * @cpu: cpu number(logical index) for which the last cache level is needed >> + * >> + * Returns the the level at which the last cache is present. It is exactly >> + * same as the total number of cache levels for the given logical cpu. >> + */ >> +int of_find_last_cache_level(unsigned int cpu) >> +{ >> + int cache_level = 0; >> + struct device_node *prev = NULL, *np = of_cpu_device_node_get(cpu); >> + >> + while (np) { >> + prev = np; >> + of_node_put(np); >> + np = of_find_next_cache_node(np); >> + } >> + >> + if (prev) > > Probably don't need this check. Otherwise, > Sure I will drop the check. > Acked-by: Rob Herring > I assume you are fine taking this via arm64 tree. If not, let us know. -- Regards, Sudeep -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: sudeep.holla@arm.com (Sudeep Holla) Date: Mon, 16 Jan 2017 10:32:36 +0000 Subject: [PATCH v2 1/2] of: base: add support to find the level of the last cache In-Reply-To: References: <1484245772-31511-1-git-send-email-sudeep.holla@arm.com> Message-ID: <36db95aa-4d96-bc45-9d38-28af7b17b42e@arm.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 14/01/17 02:45, Rob Herring wrote: > On Thu, Jan 12, 2017 at 12:29 PM, Sudeep Holla wrote: >> It is useful to have helper function just to get the number of cache >> levels for a given logical cpu. We can obtain the same by just checking >> the level at which the last cache is present. This patch adds support >> to find the level of the last cache for a given cpu. >> >> It will be used on ARM64 platform where the device tree provides the >> information for the additional non-architected/transparent/external >> last level caches that are not integrated with the processors. >> >> Suggested-by: Rob Herring >> Cc: Rob Herring >> Cc: Mark Rutland >> Signed-off-by: Sudeep Holla >> --- >> drivers/of/base.c | 27 +++++++++++++++++++++++++++ >> include/linux/of.h | 1 + >> 2 files changed, 28 insertions(+) >> >> v1->v2: >> - Moved to using "cache-level" in the last level cache instead >> of counting through all the nodes as suggested by Rob >> >> diff --git a/drivers/of/base.c b/drivers/of/base.c >> index d4bea3c797d6..c1128a077aea 100644 >> --- a/drivers/of/base.c >> +++ b/drivers/of/base.c >> @@ -25,6 +25,7 @@ >> #include >> #include >> #include >> +#include >> #include >> #include >> #include >> @@ -2268,6 +2269,32 @@ struct device_node *of_find_next_cache_node(const struct device_node *np) >> } >> >> /** >> + * of_find_last_cache_level - Find the level at which the last cache is >> + * present for the given logical cpu >> + * >> + * @cpu: cpu number(logical index) for which the last cache level is needed >> + * >> + * Returns the the level at which the last cache is present. It is exactly >> + * same as the total number of cache levels for the given logical cpu. >> + */ >> +int of_find_last_cache_level(unsigned int cpu) >> +{ >> + int cache_level = 0; >> + struct device_node *prev = NULL, *np = of_cpu_device_node_get(cpu); >> + >> + while (np) { >> + prev = np; >> + of_node_put(np); >> + np = of_find_next_cache_node(np); >> + } >> + >> + if (prev) > > Probably don't need this check. Otherwise, > Sure I will drop the check. > Acked-by: Rob Herring > I assume you are fine taking this via arm64 tree. If not, let us know. -- Regards, Sudeep