[U-Boot] [PATCH 1/2] i.MX6Q: spl: Fix falcon to use dram_init_banksize

[Stefano Babic <sbabic@denx.de>]

Hi Jagan,

On 29/08/2017 11:09, Jagan Teki wrote:
> Hi Stefano,
> 
> On Mon, Aug 28, 2017 at 4:45 PM, Jagan Teki <jagannadh.teki@gmail.com> wrote:
>> From: Jagan Teki <jagan@amarulasolutions.com>
>>
>> Memory dt node update introduced by spl_fixup_fdt() in below
>> commit was making DDR configuration in-appropriate
>> to boot falcon mode. Hence added dram_init_banksize for
>> explicit assignment of  proper base and size of DDR.
>>
>> "boot: fdt: Perform arch_fixup_fdt() on the given device tree for falcon boot"
>> (sha1: 6e7585bb64b12f632681c80c4b193349e1985d92)
>>
>> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
>> ---
>>  arch/arm/mach-imx/spl.c | 12 ++++++++++++
>>  1 file changed, 12 insertions(+)
>>
>> diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
>> index 75698c4..0979458 100644
>> --- a/arch/arm/mach-imx/spl.c
>> +++ b/arch/arm/mach-imx/spl.c
>> @@ -15,6 +15,8 @@
>>  #include <spl.h>
>>  #include <asm/mach-imx/hab.h>
>>
>> +DECLARE_GLOBAL_DATA_PTR;
>> +
>>  #if defined(CONFIG_MX6)
>>  /* determine boot device from SRC_SBMR1 (BOOT_CFG[4:1]) or SRC_GPR9 register */
>>  u32 spl_boot_device(void)
>> @@ -126,3 +128,13 @@ __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
>>  }
>>
>>  #endif
>> +
>> +#if defined(CONFIG_MX6) && defined(CONFIG_SPL_OS_BOOT)
>> +int dram_init_banksize(void)
>> +{
>> +       gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
>> +       gd->bd->bi_dram[0].size = imx_ddr_size();
>> +
>> +       return 0;
>> +}
>> +#endif
> 
> I think these should be in-tree for the release? otherwise falcon broke.
> 

I pick it up.

Regards,
Stefano


-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================