From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755576AbcA1OYk (ORCPT ); Thu, 28 Jan 2016 09:24:40 -0500 Received: from mout.kundenserver.de ([212.227.126.135]:62062 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755432AbcA1OYd (ORCPT ); Thu, 28 Jan 2016 09:24:33 -0500 From: Arnd Bergmann To: Bharat Kumar Gogada Cc: "bhelgaas@google.com" , Michal Simek , "lorenzo.pieralisi@arm.com" , "paul.burton@imgtec.com" , "yinghai@kernel.org" , "wangyijing@huawei.com" , "robh@kernel.org" , "russell.joyce@york.ac.uk" , Soren Brinkmann , "jiang.liu@linux.intel.com" , "pawel.moll@arm.com" , "mark.rutland@arm.com" , "ijc+devicetree@hellion.org.uk" , "galak@codeaurora.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linux-pci@vger.kernel.org" , Ravikiran Gummaluri Subject: Re: [PATCH V2 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze Date: Thu, 28 Jan 2016 15:23:37 +0100 Message-ID: <3706176.5tvYx0gSBz@wuerfel> User-Agent: KMail/4.11.5 (Linux/3.16.0-10-generic; KDE/4.11.5; x86_64; ; ) In-Reply-To: <8520D5D51A55D047800579B094147198258741F5@XAP-PVEXMBX01.xlnx.xilinx.com> References: <1452620173-4905-1-git-send-email-bharatku@xilinx.com> <1917083.LB4Ng3Y2yP@wuerfel> <8520D5D51A55D047800579B094147198258741F5@XAP-PVEXMBX01.xlnx.xilinx.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Provags-ID: V03:K0:l85N0MMJWb29RUnS4FGa11jtuq8/ZKqO1rolllhLFnWOFGtqEgt 4nHmdnrc+u6i5FLDp2yEQuoUm80zVOU36SzbMTxesJ9CCxoVkpJ/zD9Im+dz3ti8q3aVtXb 13YDZ+wJoQJHI0iu5YLi9jdV+EtaFC3bEdZAfnjputKZAzPQJaQCshMfeE068J4QftPiSfs wjNh9of9EErIGzLMX02Ug== X-UI-Out-Filterresults: notjunk:1;V01:K0:RtKhQ72xx3A=:zWFz8bPTsJI6zrLFSMsfXH Cb/o+Tnbrv6bt1iKcWRX/3xf3XXur9DFfZiEOcAw5a2lvdvlz4nJJT4NQrTQlpF7CEqC59g6r zw4azs1TVJ/OGgCQzn5w2P8o1pVGpvsiB9wzw3LI1EaHyy1NpGh9UhtObNyjazZLTn+KyUduI h8I5LqffaSoPbpUbMl9Sa3iGzgcOy68iGvqXQxp8oY5TPS32R08FUg1Jv1HMxacDBlO4ROM+V 8LKKpjCbt/fhZZsItAWNX5owjAHtKJDvI34S9bFEqjkNgNDixbnrmf4o2jbpVl4iST7E8WuAK Vwk18AymRMT0KdNhEffO2yzzx6C+nnFIlnnXBwtfvwClT1mLnymo42WUB5zfpDX9NyMbTosh0 QLq/EZFj8eUGwPgQEmcHVBwOaSV1ThfOAkb5W2y78bKo2KMUrG+y3KIj5cZwisefJsjgLv7UY jYeDfKgJx6RNxSg+HgbXa2kXFsEISfIEHtN9SBjV9N1URpTblxjVGU/vJjU3d7MKh8fEJzQCt RLFZ7X3FigJ3rd9uVMC/ifbYYvaGNrHo1NsZiyLvI8fm3ganQSxK+rcneQ5EzUK4lEaZ1Xpgv r4i9/1Z0pi1CKDb9+Vmd3lPNs9inHDfqKweHA828NNgXOsQCGTVYvSZlsoGjdBKChsUiO02D2 AkfO7QslMSY8w/i+r4YsTzp4BhAoOM5nFO855+UBDrS1OJ5n+uU0U/yz17j6QhBv+m0WMds8u HYZpUBr10/maTyuy Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thursday 28 January 2016 14:18:15 Bharat Kumar Gogada wrote: > > > > I see. In the upstream code you seem to do it in > > pcibios_setup_bus_devices(), while arm64 and powerpc do it in > > pcibios_add_device(). > > > No that function is not getting called with generic API's, its getting called with pcibios_init flow which is tightly bound with struct pci_controller microblaze specific structure. So I added pcibios_add_device in pci-common.c. Ok > > > May be we can add similar on arm and test out, but we might need some > > > cleanup in arch/arm/kernel/bios32.c > > > > I think that would still just be a half-baked solution. This should really be fully > > automatic. We could do it in the __weak > > pcibios_add_device() for all architectures that don't override it when the bus > > was probed from DT, or we could do it in pci_read_irq(). > When will pci_read_irq() call get invoked ? This is called early on when a device gets created in pci_setup_device(), so platforms can still override the value later. The idea here is that normally a BIOS stores the interrupt number in the PCI_INTERRUPT_LINE config space byte, and we just read it from there. Generally speaking though, for non-PC systems we tend to not have a BIOS that writes these values to start with, and any values stored in here have no meaning in combination with SPARSE_IRQ and/or IRQ_DOMAINS because the bootloader or BIOS doesn't know what IRQ number will refer to hardware IRQ line in Linux. Arnd From mboxrd@z Thu Jan 1 00:00:00 1970 From: Arnd Bergmann Subject: Re: [PATCH V2 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze Date: Thu, 28 Jan 2016 15:23:37 +0100 Message-ID: <3706176.5tvYx0gSBz@wuerfel> References: <1452620173-4905-1-git-send-email-bharatku@xilinx.com> <1917083.LB4Ng3Y2yP@wuerfel> <8520D5D51A55D047800579B094147198258741F5@XAP-PVEXMBX01.xlnx.xilinx.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7Bit Return-path: In-Reply-To: <8520D5D51A55D047800579B094147198258741F5@XAP-PVEXMBX01.xlnx.xilinx.com> Sender: linux-kernel-owner@vger.kernel.org To: Bharat Kumar Gogada Cc: "bhelgaas@google.com" , Michal Simek , "lorenzo.pieralisi@arm.com" , "paul.burton@imgtec.com" , "yinghai@kernel.org" , "wangyijing@huawei.com" , "robh@kernel.org" , "russell.joyce@york.ac.uk" , Soren Brinkmann , "jiang.liu@linux.intel.com" , "pawel.moll@arm.com" , "mark.rutland@arm.com" , "ijc+devicetree@hellion.org.uk" , "galak@codeaurora.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , linux-p List-Id: devicetree@vger.kernel.org On Thursday 28 January 2016 14:18:15 Bharat Kumar Gogada wrote: > > > > I see. In the upstream code you seem to do it in > > pcibios_setup_bus_devices(), while arm64 and powerpc do it in > > pcibios_add_device(). > > > No that function is not getting called with generic API's, its getting called with pcibios_init flow which is tightly bound with struct pci_controller microblaze specific structure. So I added pcibios_add_device in pci-common.c. Ok > > > May be we can add similar on arm and test out, but we might need some > > > cleanup in arch/arm/kernel/bios32.c > > > > I think that would still just be a half-baked solution. This should really be fully > > automatic. We could do it in the __weak > > pcibios_add_device() for all architectures that don't override it when the bus > > was probed from DT, or we could do it in pci_read_irq(). > When will pci_read_irq() call get invoked ? This is called early on when a device gets created in pci_setup_device(), so platforms can still override the value later. The idea here is that normally a BIOS stores the interrupt number in the PCI_INTERRUPT_LINE config space byte, and we just read it from there. Generally speaking though, for non-PC systems we tend to not have a BIOS that writes these values to start with, and any values stored in here have no meaning in combination with SPARSE_IRQ and/or IRQ_DOMAINS because the bootloader or BIOS doesn't know what IRQ number will refer to hardware IRQ line in Linux. Arnd From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mout.kundenserver.de ([212.227.126.135]:62062 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755432AbcA1OYd (ORCPT ); Thu, 28 Jan 2016 09:24:33 -0500 From: Arnd Bergmann To: Bharat Kumar Gogada Cc: "bhelgaas@google.com" , Michal Simek , "lorenzo.pieralisi@arm.com" , "paul.burton@imgtec.com" , "yinghai@kernel.org" , "wangyijing@huawei.com" , "robh@kernel.org" , "russell.joyce@york.ac.uk" , Soren Brinkmann , "jiang.liu@linux.intel.com" , "pawel.moll@arm.com" , "mark.rutland@arm.com" , "ijc+devicetree@hellion.org.uk" , "galak@codeaurora.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linux-pci@vger.kernel.org" , Ravikiran Gummaluri Subject: Re: [PATCH V2 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze Date: Thu, 28 Jan 2016 15:23:37 +0100 Message-ID: <3706176.5tvYx0gSBz@wuerfel> In-Reply-To: <8520D5D51A55D047800579B094147198258741F5@XAP-PVEXMBX01.xlnx.xilinx.com> References: <1452620173-4905-1-git-send-email-bharatku@xilinx.com> <1917083.LB4Ng3Y2yP@wuerfel> <8520D5D51A55D047800579B094147198258741F5@XAP-PVEXMBX01.xlnx.xilinx.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Sender: linux-pci-owner@vger.kernel.org List-ID: On Thursday 28 January 2016 14:18:15 Bharat Kumar Gogada wrote: > > > > I see. In the upstream code you seem to do it in > > pcibios_setup_bus_devices(), while arm64 and powerpc do it in > > pcibios_add_device(). > > > No that function is not getting called with generic API's, its getting called with pcibios_init flow which is tightly bound with struct pci_controller microblaze specific structure. So I added pcibios_add_device in pci-common.c. Ok > > > May be we can add similar on arm and test out, but we might need some > > > cleanup in arch/arm/kernel/bios32.c > > > > I think that would still just be a half-baked solution. This should really be fully > > automatic. We could do it in the __weak > > pcibios_add_device() for all architectures that don't override it when the bus > > was probed from DT, or we could do it in pci_read_irq(). > When will pci_read_irq() call get invoked ? This is called early on when a device gets created in pci_setup_device(), so platforms can still override the value later. The idea here is that normally a BIOS stores the interrupt number in the PCI_INTERRUPT_LINE config space byte, and we just read it from there. Generally speaking though, for non-PC systems we tend to not have a BIOS that writes these values to start with, and any values stored in here have no meaning in combination with SPARSE_IRQ and/or IRQ_DOMAINS because the bootloader or BIOS doesn't know what IRQ number will refer to hardware IRQ line in Linux. Arnd From mboxrd@z Thu Jan 1 00:00:00 1970 From: arnd@arndb.de (Arnd Bergmann) Date: Thu, 28 Jan 2016 15:23:37 +0100 Subject: [PATCH V2 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze In-Reply-To: <8520D5D51A55D047800579B094147198258741F5@XAP-PVEXMBX01.xlnx.xilinx.com> References: <1452620173-4905-1-git-send-email-bharatku@xilinx.com> <1917083.LB4Ng3Y2yP@wuerfel> <8520D5D51A55D047800579B094147198258741F5@XAP-PVEXMBX01.xlnx.xilinx.com> Message-ID: <3706176.5tvYx0gSBz@wuerfel> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Thursday 28 January 2016 14:18:15 Bharat Kumar Gogada wrote: > > > > I see. In the upstream code you seem to do it in > > pcibios_setup_bus_devices(), while arm64 and powerpc do it in > > pcibios_add_device(). > > > No that function is not getting called with generic API's, its getting called with pcibios_init flow which is tightly bound with struct pci_controller microblaze specific structure. So I added pcibios_add_device in pci-common.c. Ok > > > May be we can add similar on arm and test out, but we might need some > > > cleanup in arch/arm/kernel/bios32.c > > > > I think that would still just be a half-baked solution. This should really be fully > > automatic. We could do it in the __weak > > pcibios_add_device() for all architectures that don't override it when the bus > > was probed from DT, or we could do it in pci_read_irq(). > When will pci_read_irq() call get invoked ? This is called early on when a device gets created in pci_setup_device(), so platforms can still override the value later. The idea here is that normally a BIOS stores the interrupt number in the PCI_INTERRUPT_LINE config space byte, and we just read it from there. Generally speaking though, for non-PC systems we tend to not have a BIOS that writes these values to start with, and any values stored in here have no meaning in combination with SPARSE_IRQ and/or IRQ_DOMAINS because the bootloader or BIOS doesn't know what IRQ number will refer to hardware IRQ line in Linux. Arnd