From: 潘庆霖 <panqinglin2020@iscas.ac.cn>
To: "Anup Patel" <apatel@ventanamicro.com>
Cc: "Palmer Dabbelt" <palmer@dabbelt.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Alexandre Ghiti" <alexandre.ghiti@canonical.com>,
"Atish Patra" <atishp@atishpatra.org>,
"Alistair Francis" <Alistair.Francis@wdc.com>,
"Anup Patel" <anup@brainfault.org>,
linux-riscv <linux-riscv@lists.infradead.org>,
"linux-kernel@vger.kernel.org List"
<linux-kernel@vger.kernel.org>,
"Mayuresh Chitale" <mchitale@ventanamicro.com>
Subject: Re: Re: [PATCH] RISC-V: mm: Fix set_satp_mode() for platform not having Sv57
Date: Fri, 15 Apr 2022 13:10:36 +0800 (GMT+08:00) [thread overview]
Message-ID: <373ad9c1.173d2.1802ba15993.Coremail.panqinglin2020@iscas.ac.cn> (raw)
In-Reply-To: <CAK9=C2V0kiV1_12kMDxv6d4nsQZ81-9W5=JifLhNaiZMoHJyuQ@mail.gmail.com>
Hi Anup,
>
> We can't assume that it will be the same pgd_index for Sv48 and Sv57.
>
> For example, some hypothetical SoC might have RAM starting after 1TB space.
>
> We should ensure that early_pg_dir is cleaned entirely for detecting the next
> mode.
>
Got it. Your idea is really more stable. Thank you for pointing out that!
Yours,
Qinglin
WARNING: multiple messages have this Message-ID (diff)
From: 潘庆霖 <panqinglin2020@iscas.ac.cn>
To: "Anup Patel" <apatel@ventanamicro.com>
Cc: "Palmer Dabbelt" <palmer@dabbelt.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Alexandre Ghiti" <alexandre.ghiti@canonical.com>,
"Atish Patra" <atishp@atishpatra.org>,
"Alistair Francis" <Alistair.Francis@wdc.com>,
"Anup Patel" <anup@brainfault.org>,
linux-riscv <linux-riscv@lists.infradead.org>,
"linux-kernel@vger.kernel.org List"
<linux-kernel@vger.kernel.org>,
"Mayuresh Chitale" <mchitale@ventanamicro.com>
Subject: Re: Re: [PATCH] RISC-V: mm: Fix set_satp_mode() for platform not having Sv57
Date: Fri, 15 Apr 2022 13:10:36 +0800 (GMT+08:00) [thread overview]
Message-ID: <373ad9c1.173d2.1802ba15993.Coremail.panqinglin2020@iscas.ac.cn> (raw)
In-Reply-To: <CAK9=C2V0kiV1_12kMDxv6d4nsQZ81-9W5=JifLhNaiZMoHJyuQ@mail.gmail.com>
Hi Anup,
>
> We can't assume that it will be the same pgd_index for Sv48 and Sv57.
>
> For example, some hypothetical SoC might have RAM starting after 1TB space.
>
> We should ensure that early_pg_dir is cleaned entirely for detecting the next
> mode.
>
Got it. Your idea is really more stable. Thank you for pointing out that!
Yours,
Qinglin
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2022-04-15 5:11 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-12 3:33 [PATCH] RISC-V: mm: Fix set_satp_mode() for platform not having Sv57 Anup Patel
2022-04-12 3:33 ` Anup Patel
2022-04-15 4:47 ` 潘庆霖
2022-04-15 4:47 ` 潘庆霖
2022-04-15 4:53 ` Anup Patel
2022-04-15 4:53 ` Anup Patel
2022-04-15 5:10 ` 潘庆霖 [this message]
2022-04-15 5:10 ` 潘庆霖
2022-04-15 5:47 ` Atish Patra
2022-04-15 5:47 ` Atish Patra
2022-04-21 9:30 ` Anup Patel
2022-04-21 9:30 ` Anup Patel
2022-04-21 21:12 ` Palmer Dabbelt
2022-04-21 21:12 ` Palmer Dabbelt
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