From: Jani Nikula <jani.nikula@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org, jani.nikula@intel.com,
ville.syrjala@linux.intel.com, manasi.d.navare@intel.com
Subject: [PATCH v3 10/13] drm/i915/dp: add HAS_DP20 macro
Date: Thu, 9 Sep 2021 15:52:02 +0300 [thread overview]
Message-ID: <3746e700641bc17eff270569387fe869707d92ed.1631191763.git.jani.nikula@intel.com> (raw)
In-Reply-To: <cover.1631191763.git.jani.nikula@intel.com>
Let's abstract the DP 2.0 feature. Initially just DG2.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 37c1ca266bcd..14416bd789b6 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1641,6 +1641,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define HAS_IPS(dev_priv) (IS_HSW_ULT(dev_priv) || IS_BROADWELL(dev_priv))
#define HAS_DP_MST(dev_priv) (INTEL_INFO(dev_priv)->display.has_dp_mst)
+#define HAS_DP20(dev_priv) (IS_DG2(dev_priv))
#define HAS_CDCLK_CRAWL(dev_priv) (INTEL_INFO(dev_priv)->display.has_cdclk_crawl)
#define HAS_DDI(dev_priv) (INTEL_INFO(dev_priv)->display.has_ddi)
--
2.30.2
WARNING: multiple messages have this Message-ID (diff)
From: Jani Nikula <jani.nikula@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org, jani.nikula@intel.com,
ville.syrjala@linux.intel.com, manasi.d.navare@intel.com
Subject: [Intel-gfx] [PATCH v3 10/13] drm/i915/dp: add HAS_DP20 macro
Date: Thu, 9 Sep 2021 15:52:02 +0300 [thread overview]
Message-ID: <3746e700641bc17eff270569387fe869707d92ed.1631191763.git.jani.nikula@intel.com> (raw)
In-Reply-To: <cover.1631191763.git.jani.nikula@intel.com>
Let's abstract the DP 2.0 feature. Initially just DG2.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 37c1ca266bcd..14416bd789b6 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1641,6 +1641,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define HAS_IPS(dev_priv) (IS_HSW_ULT(dev_priv) || IS_BROADWELL(dev_priv))
#define HAS_DP_MST(dev_priv) (INTEL_INFO(dev_priv)->display.has_dp_mst)
+#define HAS_DP20(dev_priv) (IS_DG2(dev_priv))
#define HAS_CDCLK_CRAWL(dev_priv) (INTEL_INFO(dev_priv)->display.has_cdclk_crawl)
#define HAS_DDI(dev_priv) (INTEL_INFO(dev_priv)->display.has_ddi)
--
2.30.2
next prev parent reply other threads:[~2021-09-09 12:53 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-09 12:51 [PATCH v3 00/13] drm/i915/dp: dp 2.0 enabling prep work Jani Nikula
2021-09-09 12:51 ` [Intel-gfx] " Jani Nikula
2021-09-09 12:51 ` [PATCH v3 01/13] drm/dp: add DP 2.0 UHBR link rate and bw code conversions Jani Nikula
2021-09-09 12:51 ` [Intel-gfx] " Jani Nikula
2021-09-17 12:40 ` Ville Syrjälä
2021-09-17 12:40 ` [Intel-gfx] " Ville Syrjälä
2021-09-09 12:51 ` [PATCH v3 02/13] drm/dp: use more of the extended receiver cap Jani Nikula
2021-09-09 12:51 ` [Intel-gfx] " Jani Nikula
2021-09-09 16:18 ` Lyude Paul
2021-09-09 16:18 ` Lyude Paul
2021-09-09 16:18 ` Lyude Paul
2021-09-09 16:18 ` [Intel-gfx] " Lyude Paul
2021-09-09 12:51 ` [PATCH v3 03/13] drm/dp: add LTTPR DP 2.0 DPCD addresses Jani Nikula
2021-09-09 12:51 ` [Intel-gfx] " Jani Nikula
2021-09-21 22:58 ` Nathan Chancellor
2021-09-22 0:45 ` Stephen Rothwell
2021-09-22 11:10 ` Jani Nikula
2021-09-22 13:49 ` Alex Deucher
2021-09-22 13:49 ` Alex Deucher
2021-09-22 17:32 ` [PATCH] drm/amd/display: Only define DP 2.0 symbols if not already defined Harry Wentland
2021-09-22 17:32 ` [Intel-gfx] " Harry Wentland
2021-09-09 12:51 ` [PATCH v3 04/13] drm/dp: add helper for extracting adjust 128b/132b TX FFE preset Jani Nikula
2021-09-09 12:51 ` [Intel-gfx] " Jani Nikula
2021-09-09 12:51 ` [PATCH v3 05/13] drm/i915/dg2: add DG2+ TRANS_DDI_FUNC_CTL DP 2.0 128b/132b mode Jani Nikula
2021-09-09 12:51 ` [Intel-gfx] " Jani Nikula
2021-09-17 12:54 ` Ville Syrjälä
2021-09-17 12:54 ` [Intel-gfx] " Ville Syrjälä
2021-09-09 12:51 ` [PATCH v3 06/13] drm/i915/dp: add helper for checking for UHBR link rate Jani Nikula
2021-09-09 12:51 ` [Intel-gfx] " Jani Nikula
2021-09-17 12:41 ` Ville Syrjälä
2021-09-17 12:41 ` [Intel-gfx] " Ville Syrjälä
2021-09-09 12:51 ` [PATCH v3 07/13] drm/i915/dp: use 128b/132b TPS2 for UHBR+ link rates Jani Nikula
2021-09-09 12:51 ` [Intel-gfx] " Jani Nikula
2021-09-09 12:52 ` [PATCH v3 08/13] drm/i915/dp: select 128b/132b channel encoding for UHBR rates Jani Nikula
2021-09-09 12:52 ` [Intel-gfx] " Jani Nikula
2021-09-09 12:52 ` [PATCH v3 09/13] drm/i915/dg2: configure TRANS_DP2_CTL for DP 2.0 Jani Nikula
2021-09-09 12:52 ` [Intel-gfx] " Jani Nikula
2021-09-09 12:52 ` Jani Nikula [this message]
2021-09-09 12:52 ` [Intel-gfx] [PATCH v3 10/13] drm/i915/dp: add HAS_DP20 macro Jani Nikula
2021-09-17 12:42 ` Ville Syrjälä
2021-09-17 12:42 ` [Intel-gfx] " Ville Syrjälä
2021-09-09 12:52 ` [PATCH v3 11/13] drm/i915/dg2: use 128b/132b transcoder DDI mode Jani Nikula
2021-09-09 12:52 ` [Intel-gfx] " Jani Nikula
2021-09-17 12:51 ` Ville Syrjälä
2021-09-17 12:51 ` [Intel-gfx] " Ville Syrjälä
2021-09-09 12:52 ` [PATCH v3 12/13] drm/i915/dg2: configure TRANS_DP2_VFREQ{HIGH, LOW} for 128b/132b Jani Nikula
2021-09-09 12:52 ` [Intel-gfx] " Jani Nikula
2021-09-17 12:53 ` [PATCH v3 12/13] drm/i915/dg2: configure TRANS_DP2_VFREQ{HIGH,LOW} " Ville Syrjälä
2021-09-17 12:53 ` [Intel-gfx] [PATCH v3 12/13] drm/i915/dg2: configure TRANS_DP2_VFREQ{HIGH, LOW} " Ville Syrjälä
2021-09-21 8:44 ` Jani Nikula
2021-09-21 8:44 ` [Intel-gfx] " Jani Nikula
2021-09-09 12:52 ` [PATCH v3 13/13] drm/i915/dg2: update link training " Jani Nikula
2021-09-09 12:52 ` [Intel-gfx] " Jani Nikula
2021-09-09 13:48 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dp: dp 2.0 enabling prep work (rev3) Patchwork
2021-09-09 13:50 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-09-09 14:17 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-09 16:25 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-09-17 12:54 ` [PATCH v3 00/13] drm/i915/dp: dp 2.0 enabling prep work Jani Nikula
2021-09-17 12:54 ` [Intel-gfx] " Jani Nikula
2021-09-17 16:56 ` Maxime Ripard
2021-09-17 16:56 ` [Intel-gfx] " Maxime Ripard
2021-09-21 8:44 ` Jani Nikula
2021-09-21 8:44 ` [Intel-gfx] " Jani Nikula
2021-09-22 12:54 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/dp: dp 2.0 enabling prep work (rev4) Patchwork
2021-09-22 18:24 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/dp: dp 2.0 enabling prep work (rev5) Patchwork
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